1 2menuconfig NAND 3 bool "NAND Device Support" 4if NAND 5 6config SYS_NAND_SELF_INIT 7 bool 8 help 9 This option, if enabled, provides more flexible and linux-like 10 NAND initialization process. 11 12config NAND_DENALI 13 bool "Support Denali NAND controller" 14 select SYS_NAND_SELF_INIT 15 imply CMD_NAND 16 help 17 Enable support for the Denali NAND controller. 18 19config NAND_DENALI_DT 20 bool "Support Denali NAND controller as a DT device" 21 depends on NAND_DENALI && OF_CONTROL && DM 22 help 23 Enable the driver for NAND flash on platforms using a Denali NAND 24 controller as a DT device. 25 26config SYS_NAND_DENALI_64BIT 27 bool "Use 64-bit variant of Denali NAND controller" 28 depends on NAND_DENALI 29 help 30 The Denali NAND controller IP has some variations in terms of 31 the bus interface. The DMA setup sequence is completely differenct 32 between 32bit / 64bit AXI bus variants. 33 34 If your Denali NAND controller is the 64-bit variant, say Y. 35 Otherwise (32 bit), say N. 36 37config NAND_DENALI_SPARE_AREA_SKIP_BYTES 38 int "Number of bytes skipped in OOB area" 39 depends on NAND_DENALI 40 range 0 63 41 help 42 This option specifies the number of bytes to skip from the beginning 43 of OOB area before last ECC sector data starts. This is potentially 44 used to preserve the bad block marker in the OOB area. 45 46config NAND_VF610_NFC 47 bool "Support for Freescale NFC for VF610" 48 select SYS_NAND_SELF_INIT 49 imply CMD_NAND 50 help 51 Enables support for NAND Flash Controller on some Freescale 52 processors like the VF610, MCF54418 or Kinetis K70. 53 The driver supports a maximum 2k page size. The driver 54 currently does not support hardware ECC. 55 56choice 57 prompt "Hardware ECC strength" 58 depends on NAND_VF610_NFC 59 default SYS_NAND_VF610_NFC_45_ECC_BYTES 60 help 61 Select the ECC strength used in the hardware BCH ECC block. 62 63config SYS_NAND_VF610_NFC_45_ECC_BYTES 64 bool "24-error correction (45 ECC bytes)" 65 66config SYS_NAND_VF610_NFC_60_ECC_BYTES 67 bool "32-error correction (60 ECC bytes)" 68 69endchoice 70 71config NAND_PXA3XX 72 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 73 select SYS_NAND_SELF_INIT 74 imply CMD_NAND 75 help 76 This enables the driver for the NAND flash device found on 77 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 78 79config NAND_ROCKCHIP 80 bool "Support for NAND on Rockchip SoCs" 81 select SYS_NAND_SELF_INIT 82 ---help--- 83 Enable support for Rockchip nand. 84 85config NAND_SUNXI 86 bool "Support for NAND on Allwinner SoCs" 87 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I 88 select SYS_NAND_SELF_INIT 89 select SYS_NAND_U_BOOT_LOCATIONS 90 imply CMD_NAND 91 ---help--- 92 Enable support for NAND. This option enables the standard and 93 SPL drivers. 94 The SPL driver only supports reading from the NAND using DMA 95 transfers. 96 97if NAND_SUNXI 98 99config NAND_SUNXI_SPL_ECC_STRENGTH 100 int "Allwinner NAND SPL ECC Strength" 101 default 64 102 103config NAND_SUNXI_SPL_ECC_SIZE 104 int "Allwinner NAND SPL ECC Step Size" 105 default 1024 106 107config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 108 int "Allwinner NAND SPL Usable Page Size" 109 default 1024 110 111endif 112 113config NAND_ARASAN 114 bool "Configure Arasan Nand" 115 imply CMD_NAND 116 help 117 This enables Nand driver support for Arasan nand flash 118 controller. This uses the hardware ECC for read and 119 write operations. 120 121config NAND_MXS 122 bool "MXS NAND support" 123 depends on MX6 || MX7 124 imply CMD_NAND 125 help 126 This enables NAND driver for the NAND flash controller on the 127 MXS processors. 128 129config NAND_ZYNQ 130 bool "Support for Zynq Nand controller" 131 select SYS_NAND_SELF_INIT 132 imply CMD_NAND 133 help 134 This enables Nand driver support for Nand flash controller 135 found on Zynq SoC. 136 137comment "Generic NAND options" 138 139# Enhance depends when converting drivers to Kconfig which use this config 140# option (mxc_nand, ndfc, omap_gpmc). 141config SYS_NAND_BUSWIDTH_16BIT 142 bool "Use 16-bit NAND interface" 143 depends on NAND_VF610_NFC 144 help 145 Indicates that NAND device has 16-bit wide data-bus. In absence of this 146 config, bus-width of NAND device is assumed to be either 8-bit and later 147 determined by reading ONFI params. 148 Above config is useful when NAND device's bus-width information cannot 149 be determined from on-chip ONFI params, like in following scenarios: 150 - SPL boot does not support reading of ONFI parameters. This is done to 151 keep SPL code foot-print small. 152 - In current U-Boot flow using nand_init(), driver initialization 153 happens in board_nand_init() which is called before any device probe 154 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 155 not available while configuring controller. So a static CONFIG_NAND_xx 156 is needed to know the device's bus-width in advance. 157 158if SPL 159 160config SYS_NAND_U_BOOT_LOCATIONS 161 bool "Define U-boot binaries locations in NAND" 162 help 163 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 164 This option should not be enabled when compiling U-boot for boards 165 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 166 file. 167 168config SYS_NAND_U_BOOT_OFFS 169 hex "Location in NAND to read U-Boot from" 170 default 0x800000 if NAND_SUNXI 171 depends on SYS_NAND_U_BOOT_LOCATIONS 172 help 173 Set the offset from the start of the nand where u-boot should be 174 loaded from. 175 176config SYS_NAND_U_BOOT_OFFS_REDUND 177 hex "Location in NAND to read U-Boot from" 178 default SYS_NAND_U_BOOT_OFFS 179 depends on SYS_NAND_U_BOOT_LOCATIONS 180 help 181 Set the offset from the start of the nand where the redundant u-boot 182 should be loaded from. 183 184config SPL_NAND_DENALI 185 bool "Support Denali NAND controller for SPL" 186 help 187 This is a small implementation of the Denali NAND controller 188 for use on SPL. 189 190endif 191 192endif # if NAND 193