1 2menuconfig NAND 3 bool "NAND Device Support" 4if NAND 5 6config SYS_NAND_SELF_INIT 7 bool 8 help 9 This option, if enabled, provides more flexible and linux-like 10 NAND initialization process. 11 12config NAND_ATMEL 13 bool "Support Atmel NAND controller" 14 imply SYS_NAND_USE_FLASH_BBT 15 help 16 Enable this driver for NAND flash platforms using an Atmel NAND 17 controller. 18 19config NAND_DENALI 20 bool 21 select SYS_NAND_SELF_INIT 22 imply CMD_NAND 23 24config NAND_DENALI_DT 25 bool "Support Denali NAND controller as a DT device" 26 select NAND_DENALI 27 depends on OF_CONTROL && DM 28 help 29 Enable the driver for NAND flash on platforms using a Denali NAND 30 controller as a DT device. 31 32config NAND_DENALI_SPARE_AREA_SKIP_BYTES 33 int "Number of bytes skipped in OOB area" 34 depends on NAND_DENALI 35 range 0 63 36 help 37 This option specifies the number of bytes to skip from the beginning 38 of OOB area before last ECC sector data starts. This is potentially 39 used to preserve the bad block marker in the OOB area. 40 41config NAND_LPC32XX_SLC 42 bool "Support LPC32XX_SLC controller" 43 help 44 Enable the LPC32XX SLC NAND controller. 45 46config NAND_OMAP_GPMC 47 bool "Support OMAP GPMC NAND controller" 48 depends on ARCH_OMAP2PLUS 49 help 50 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. 51 GPMC controller is used for parallel NAND flash devices, and can 52 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 53 and BCH16 ECC algorithms. 54 55config NAND_OMAP_GPMC_PREFETCH 56 bool "Enable GPMC Prefetch" 57 depends on NAND_OMAP_GPMC 58 default y 59 help 60 On OMAP platforms that use the GPMC controller 61 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that 62 uses the prefetch mode to speed up read operations. 63 64config NAND_OMAP_ELM 65 bool "Enable ELM driver for OMAPxx and AMxx platforms." 66 depends on NAND_OMAP_GPMC && !OMAP34XX 67 help 68 ELM controller is used for ECC error detection (not ECC calculation) 69 of BCH4, BCH8 and BCH16 ECC algorithms. 70 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 71 thus such SoC platforms need to depend on software library for ECC error 72 detection. However ECC calculation on such plaforms would still be 73 done by GPMC controller. 74 75config NAND_VF610_NFC 76 bool "Support for Freescale NFC for VF610" 77 select SYS_NAND_SELF_INIT 78 imply CMD_NAND 79 help 80 Enables support for NAND Flash Controller on some Freescale 81 processors like the VF610, MCF54418 or Kinetis K70. 82 The driver supports a maximum 2k page size. The driver 83 currently does not support hardware ECC. 84 85choice 86 prompt "Hardware ECC strength" 87 depends on NAND_VF610_NFC 88 default SYS_NAND_VF610_NFC_45_ECC_BYTES 89 help 90 Select the ECC strength used in the hardware BCH ECC block. 91 92config SYS_NAND_VF610_NFC_45_ECC_BYTES 93 bool "24-error correction (45 ECC bytes)" 94 95config SYS_NAND_VF610_NFC_60_ECC_BYTES 96 bool "32-error correction (60 ECC bytes)" 97 98endchoice 99 100config NAND_PXA3XX 101 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 102 select SYS_NAND_SELF_INIT 103 imply CMD_NAND 104 help 105 This enables the driver for the NAND flash device found on 106 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 107 108config NAND_ROCKCHIP 109 bool "Support for NAND on Rockchip SoCs" 110 select SYS_NAND_SELF_INIT 111 default n 112 ---help--- 113 Enable support for Rockchip nand. 114 115config NAND_ROCKCHIP_V9 116 bool "Support for NAND V9 on Rockchip SoCs" 117 select SYS_NAND_SELF_INIT 118 default n 119 ---help--- 120 Enable support for Rockchip nand v9. 121 122if NAND_ROCKCHIP || NAND_ROCKCHIP_V9 123config NAND_ROCKCHIP_DT 124 bool "Support Rockchip NAND controller as a DT device" 125 default y 126 help 127 Enable the driver for Rockchip NAND flash on platforms 128 using device tree. 129endif 130 131config NAND_SUNXI 132 bool "Support for NAND on Allwinner SoCs" 133 default ARCH_SUNXI 134 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I 135 select SYS_NAND_SELF_INIT 136 select SYS_NAND_U_BOOT_LOCATIONS 137 select SPL_NAND_SUPPORT 138 imply CMD_NAND 139 ---help--- 140 Enable support for NAND. This option enables the standard and 141 SPL drivers. 142 The SPL driver only supports reading from the NAND using DMA 143 transfers. 144 145if NAND_SUNXI 146 147config NAND_SUNXI_SPL_ECC_STRENGTH 148 int "Allwinner NAND SPL ECC Strength" 149 default 64 150 151config NAND_SUNXI_SPL_ECC_SIZE 152 int "Allwinner NAND SPL ECC Step Size" 153 default 1024 154 155config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 156 int "Allwinner NAND SPL Usable Page Size" 157 default 1024 158 159endif 160 161config NAND_ARASAN 162 bool "Configure Arasan Nand" 163 select SYS_NAND_SELF_INIT 164 imply CMD_NAND 165 help 166 This enables Nand driver support for Arasan nand flash 167 controller. This uses the hardware ECC for read and 168 write operations. 169 170config NAND_MXC 171 bool "MXC NAND support" 172 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 173 imply CMD_NAND 174 help 175 This enables the NAND driver for the NAND flash controller on the 176 i.MX27 / i.MX31 / i.MX5 rocessors. 177 178config NAND_MXS 179 bool "MXS NAND support" 180 depends on MX23 || MX28 || MX6 || MX7 181 select SYS_NAND_SELF_INIT 182 imply CMD_NAND 183 select APBH_DMA 184 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 185 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 186 help 187 This enables NAND driver for the NAND flash controller on the 188 MXS processors. 189 190if NAND_MXS 191 192config NAND_MXS_DT 193 bool "Support MXS NAND controller as a DT device" 194 depends on OF_CONTROL && MTD 195 help 196 Enable the driver for MXS NAND flash on platforms using 197 device tree. 198 199config NAND_MXS_USE_MINIMUM_ECC 200 bool "Use minimum ECC strength supported by the controller" 201 default false 202 203endif 204 205config NAND_ZYNQ 206 bool "Support for Zynq Nand controller" 207 select SYS_NAND_SELF_INIT 208 imply CMD_NAND 209 help 210 This enables Nand driver support for Nand flash controller 211 found on Zynq SoC. 212 213config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS 214 bool "Enable use of 1st stage bootloader timing for NAND" 215 depends on NAND_ZYNQ 216 help 217 This flag prevent U-boot reconfigure NAND flash controller and reuse 218 the NAND timing from 1st stage bootloader. 219 220comment "Generic NAND options" 221 222config SYS_NAND_BLOCK_SIZE 223 hex "NAND chip eraseblock size" 224 depends on ARCH_SUNXI 225 help 226 Number of data bytes in one eraseblock for the NAND chip on the 227 board. This is the multiple of NAND_PAGE_SIZE and the number of 228 pages. 229 230config SYS_NAND_PAGE_SIZE 231 hex "NAND chip page size" 232 depends on ARCH_SUNXI 233 help 234 Number of data bytes in one page for the NAND chip on the 235 board, not including the OOB area. 236 237config SYS_NAND_OOBSIZE 238 hex "NAND chip OOB size" 239 depends on ARCH_SUNXI 240 help 241 Number of bytes in the Out-Of-Band area for the NAND chip on 242 the board. 243 244# Enhance depends when converting drivers to Kconfig which use this config 245# option (mxc_nand, ndfc, omap_gpmc). 246config SYS_NAND_BUSWIDTH_16BIT 247 bool "Use 16-bit NAND interface" 248 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI 249 help 250 Indicates that NAND device has 16-bit wide data-bus. In absence of this 251 config, bus-width of NAND device is assumed to be either 8-bit and later 252 determined by reading ONFI params. 253 Above config is useful when NAND device's bus-width information cannot 254 be determined from on-chip ONFI params, like in following scenarios: 255 - SPL boot does not support reading of ONFI parameters. This is done to 256 keep SPL code foot-print small. 257 - In current U-Boot flow using nand_init(), driver initialization 258 happens in board_nand_init() which is called before any device probe 259 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 260 not available while configuring controller. So a static CONFIG_NAND_xx 261 is needed to know the device's bus-width in advance. 262 263if SPL 264 265config SYS_NAND_U_BOOT_LOCATIONS 266 bool "Define U-boot binaries locations in NAND" 267 help 268 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 269 This option should not be enabled when compiling U-boot for boards 270 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 271 file. 272 273config SYS_NAND_U_BOOT_OFFS 274 hex "Location in NAND to read U-Boot from" 275 default 0x800000 if NAND_SUNXI 276 depends on SYS_NAND_U_BOOT_LOCATIONS 277 help 278 Set the offset from the start of the nand where u-boot should be 279 loaded from. 280 281config SYS_NAND_U_BOOT_OFFS_REDUND 282 hex "Location in NAND to read U-Boot from" 283 default SYS_NAND_U_BOOT_OFFS 284 depends on SYS_NAND_U_BOOT_LOCATIONS 285 help 286 Set the offset from the start of the nand where the redundant u-boot 287 should be loaded from. 288 289config SPL_NAND_AM33XX_BCH 290 bool "Enables SPL-NAND driver which supports ELM based" 291 depends on NAND_OMAP_GPMC && !OMAP34XX 292 default y 293 help 294 Hardware ECC correction. This is useful for platforms which have ELM 295 hardware engine and use NAND boot mode. 296 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 297 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling 298 SPL-NAND driver with software ECC correction support. 299 300config SPL_NAND_DENALI 301 bool "Support Denali NAND controller for SPL" 302 help 303 This is a small implementation of the Denali NAND controller 304 for use on SPL. 305 306config SPL_NAND_SIMPLE 307 bool "Use simple SPL NAND driver" 308 depends on !SPL_NAND_AM33XX_BCH 309 help 310 Support for NAND boot using simple NAND drivers that 311 expose the cmd_ctrl() interface. 312endif 313 314endif # if NAND 315