1 2menuconfig NAND 3 bool "NAND Device Support" 4if NAND 5 6config SYS_NAND_SELF_INIT 7 bool 8 help 9 This option, if enabled, provides more flexible and linux-like 10 NAND initialization process. 11 12config NAND_DENALI 13 bool 14 select SYS_NAND_SELF_INIT 15 imply CMD_NAND 16 17config NAND_DENALI_DT 18 bool "Support Denali NAND controller as a DT device" 19 select NAND_DENALI 20 depends on OF_CONTROL && DM 21 help 22 Enable the driver for NAND flash on platforms using a Denali NAND 23 controller as a DT device. 24 25config NAND_DENALI_SPARE_AREA_SKIP_BYTES 26 int "Number of bytes skipped in OOB area" 27 depends on NAND_DENALI 28 range 0 63 29 help 30 This option specifies the number of bytes to skip from the beginning 31 of OOB area before last ECC sector data starts. This is potentially 32 used to preserve the bad block marker in the OOB area. 33 34config NAND_OMAP_GPMC 35 bool "Support OMAP GPMC NAND controller" 36 depends on ARCH_OMAP2PLUS 37 help 38 Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. 39 GPMC controller is used for parallel NAND flash devices, and can 40 do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 41 and BCH16 ECC algorithms. 42 43config NAND_OMAP_GPMC_PREFETCH 44 bool "Enable GPMC Prefetch" 45 depends on NAND_OMAP_GPMC 46 default y 47 help 48 On OMAP platforms that use the GPMC controller 49 (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that 50 uses the prefetch mode to speed up read operations. 51 52config NAND_OMAP_ELM 53 bool "Enable ELM driver for OMAPxx and AMxx platforms." 54 depends on NAND_OMAP_GPMC && !OMAP34XX 55 help 56 ELM controller is used for ECC error detection (not ECC calculation) 57 of BCH4, BCH8 and BCH16 ECC algorithms. 58 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 59 thus such SoC platforms need to depend on software library for ECC error 60 detection. However ECC calculation on such plaforms would still be 61 done by GPMC controller. 62 63config NAND_VF610_NFC 64 bool "Support for Freescale NFC for VF610" 65 select SYS_NAND_SELF_INIT 66 imply CMD_NAND 67 help 68 Enables support for NAND Flash Controller on some Freescale 69 processors like the VF610, MCF54418 or Kinetis K70. 70 The driver supports a maximum 2k page size. The driver 71 currently does not support hardware ECC. 72 73choice 74 prompt "Hardware ECC strength" 75 depends on NAND_VF610_NFC 76 default SYS_NAND_VF610_NFC_45_ECC_BYTES 77 help 78 Select the ECC strength used in the hardware BCH ECC block. 79 80config SYS_NAND_VF610_NFC_45_ECC_BYTES 81 bool "24-error correction (45 ECC bytes)" 82 83config SYS_NAND_VF610_NFC_60_ECC_BYTES 84 bool "32-error correction (60 ECC bytes)" 85 86endchoice 87 88config NAND_PXA3XX 89 bool "Support for NAND on PXA3xx and Armada 370/XP/38x" 90 select SYS_NAND_SELF_INIT 91 imply CMD_NAND 92 help 93 This enables the driver for the NAND flash device found on 94 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). 95 96config NAND_ROCKCHIP 97 bool "Support for NAND on Rockchip SoCs" 98 select SYS_NAND_SELF_INIT 99 default n 100 ---help--- 101 Enable support for Rockchip nand. 102 103config NAND_ROCKCHIP_V9 104 bool "Support for NAND V9 on Rockchip SoCs" 105 select SYS_NAND_SELF_INIT 106 default n 107 ---help--- 108 Enable support for Rockchip nand v9. 109 110if NAND_ROCKCHIP || NAND_ROCKCHIP_V9 111config NAND_ROCKCHIP_DT 112 bool "Support Rockchip NAND controller as a DT device" 113 default y 114 help 115 Enable the driver for Rockchip NAND flash on platforms 116 using device tree. 117endif 118 119config NAND_SUNXI 120 bool "Support for NAND on Allwinner SoCs" 121 default ARCH_SUNXI 122 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I 123 select SYS_NAND_SELF_INIT 124 select SYS_NAND_U_BOOT_LOCATIONS 125 select SPL_NAND_SUPPORT 126 imply CMD_NAND 127 ---help--- 128 Enable support for NAND. This option enables the standard and 129 SPL drivers. 130 The SPL driver only supports reading from the NAND using DMA 131 transfers. 132 133if NAND_SUNXI 134 135config NAND_SUNXI_SPL_ECC_STRENGTH 136 int "Allwinner NAND SPL ECC Strength" 137 default 64 138 139config NAND_SUNXI_SPL_ECC_SIZE 140 int "Allwinner NAND SPL ECC Step Size" 141 default 1024 142 143config NAND_SUNXI_SPL_USABLE_PAGE_SIZE 144 int "Allwinner NAND SPL Usable Page Size" 145 default 1024 146 147endif 148 149config NAND_ARASAN 150 bool "Configure Arasan Nand" 151 select SYS_NAND_SELF_INIT 152 imply CMD_NAND 153 help 154 This enables Nand driver support for Arasan nand flash 155 controller. This uses the hardware ECC for read and 156 write operations. 157 158config NAND_MXC 159 bool "MXC NAND support" 160 depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 161 imply CMD_NAND 162 help 163 This enables the NAND driver for the NAND flash controller on the 164 i.MX27 / i.MX31 / i.MX5 rocessors. 165 166config NAND_MXS 167 bool "MXS NAND support" 168 depends on MX23 || MX28 || MX6 || MX7 169 imply CMD_NAND 170 select APBH_DMA 171 select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 172 select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 173 help 174 This enables NAND driver for the NAND flash controller on the 175 MXS processors. 176 177config NAND_ZYNQ 178 bool "Support for Zynq Nand controller" 179 select SYS_NAND_SELF_INIT 180 imply CMD_NAND 181 help 182 This enables Nand driver support for Nand flash controller 183 found on Zynq SoC. 184 185config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS 186 bool "Enable use of 1st stage bootloader timing for NAND" 187 depends on NAND_ZYNQ 188 help 189 This flag prevent U-boot reconfigure NAND flash controller and reuse 190 the NAND timing from 1st stage bootloader. 191 192comment "Generic NAND options" 193 194config SYS_NAND_BLOCK_SIZE 195 hex "NAND chip eraseblock size" 196 depends on ARCH_SUNXI 197 help 198 Number of data bytes in one eraseblock for the NAND chip on the 199 board. This is the multiple of NAND_PAGE_SIZE and the number of 200 pages. 201 202config SYS_NAND_PAGE_SIZE 203 hex "NAND chip page size" 204 depends on ARCH_SUNXI 205 help 206 Number of data bytes in one page for the NAND chip on the 207 board, not including the OOB area. 208 209config SYS_NAND_OOBSIZE 210 hex "NAND chip OOB size" 211 depends on ARCH_SUNXI 212 help 213 Number of bytes in the Out-Of-Band area for the NAND chip on 214 the board. 215 216# Enhance depends when converting drivers to Kconfig which use this config 217# option (mxc_nand, ndfc, omap_gpmc). 218config SYS_NAND_BUSWIDTH_16BIT 219 bool "Use 16-bit NAND interface" 220 depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI 221 help 222 Indicates that NAND device has 16-bit wide data-bus. In absence of this 223 config, bus-width of NAND device is assumed to be either 8-bit and later 224 determined by reading ONFI params. 225 Above config is useful when NAND device's bus-width information cannot 226 be determined from on-chip ONFI params, like in following scenarios: 227 - SPL boot does not support reading of ONFI parameters. This is done to 228 keep SPL code foot-print small. 229 - In current U-Boot flow using nand_init(), driver initialization 230 happens in board_nand_init() which is called before any device probe 231 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are 232 not available while configuring controller. So a static CONFIG_NAND_xx 233 is needed to know the device's bus-width in advance. 234 235if SPL 236 237config SYS_NAND_U_BOOT_LOCATIONS 238 bool "Define U-boot binaries locations in NAND" 239 help 240 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. 241 This option should not be enabled when compiling U-boot for boards 242 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h 243 file. 244 245config SYS_NAND_U_BOOT_OFFS 246 hex "Location in NAND to read U-Boot from" 247 default 0x800000 if NAND_SUNXI 248 depends on SYS_NAND_U_BOOT_LOCATIONS 249 help 250 Set the offset from the start of the nand where u-boot should be 251 loaded from. 252 253config SYS_NAND_U_BOOT_OFFS_REDUND 254 hex "Location in NAND to read U-Boot from" 255 default SYS_NAND_U_BOOT_OFFS 256 depends on SYS_NAND_U_BOOT_LOCATIONS 257 help 258 Set the offset from the start of the nand where the redundant u-boot 259 should be loaded from. 260 261config SPL_NAND_AM33XX_BCH 262 bool "Enables SPL-NAND driver which supports ELM based" 263 depends on NAND_OMAP_GPMC && !OMAP34XX 264 default y 265 help 266 Hardware ECC correction. This is useful for platforms which have ELM 267 hardware engine and use NAND boot mode. 268 Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, 269 so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling 270 SPL-NAND driver with software ECC correction support. 271 272config SPL_NAND_DENALI 273 bool "Support Denali NAND controller for SPL" 274 help 275 This is a small implementation of the Denali NAND controller 276 for use on SPL. 277 278config SPL_NAND_SIMPLE 279 bool "Use simple SPL NAND driver" 280 depends on !SPL_NAND_AM33XX_BCH 281 help 282 Support for NAND boot using simple NAND drivers that 283 expose the cmd_ctrl() interface. 284endif 285 286endif # if NAND 287