1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 43 /* 44 * This file implements a Common Flash Interface (CFI) driver for 45 * U-Boot. 46 * 47 * The width of the port and the width of the chips are determined at 48 * initialization. These widths are used to calculate the address for 49 * access CFI data structures. 50 * 51 * References 52 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 56 * AMD CFI Specification, Release 2.0 December 1, 2001 57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 59 * 60 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 61 * reading and writing ... (yes there is such a Hardware). 62 */ 63 64 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 66 #endif 67 68 #define FLASH_CMD_CFI 0x98 69 #define FLASH_CMD_READ_ID 0x90 70 #define FLASH_CMD_RESET 0xff 71 #define FLASH_CMD_BLOCK_ERASE 0x20 72 #define FLASH_CMD_ERASE_CONFIRM 0xD0 73 #define FLASH_CMD_WRITE 0x40 74 #define FLASH_CMD_PROTECT 0x60 75 #define FLASH_CMD_PROTECT_SET 0x01 76 #define FLASH_CMD_PROTECT_CLEAR 0xD0 77 #define FLASH_CMD_CLEAR_STATUS 0x50 78 #define FLASH_CMD_READ_STATUS 0x70 79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9 81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 82 83 #define FLASH_STATUS_DONE 0x80 84 #define FLASH_STATUS_ESS 0x40 85 #define FLASH_STATUS_ECLBS 0x20 86 #define FLASH_STATUS_PSLBS 0x10 87 #define FLASH_STATUS_VPENS 0x08 88 #define FLASH_STATUS_PSS 0x04 89 #define FLASH_STATUS_DPS 0x02 90 #define FLASH_STATUS_R 0x01 91 #define FLASH_STATUS_PROTECT 0x01 92 93 #define AMD_CMD_RESET 0xF0 94 #define AMD_CMD_WRITE 0xA0 95 #define AMD_CMD_ERASE_START 0x80 96 #define AMD_CMD_ERASE_SECTOR 0x30 97 #define AMD_CMD_UNLOCK_START 0xAA 98 #define AMD_CMD_UNLOCK_ACK 0x55 99 #define AMD_CMD_WRITE_TO_BUFFER 0x25 100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 101 102 #define AMD_STATUS_TOGGLE 0x40 103 #define AMD_STATUS_ERROR 0x20 104 105 #define ATM_CMD_UNLOCK_SECT 0x70 106 #define ATM_CMD_SOFTLOCK_START 0x80 107 #define ATM_CMD_LOCK_SECT 0x40 108 109 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 110 #define FLASH_OFFSET_DEVICE_ID 0x01 111 #define FLASH_OFFSET_DEVICE_ID2 0x0E 112 #define FLASH_OFFSET_DEVICE_ID3 0x0F 113 #define FLASH_OFFSET_CFI 0x55 114 #define FLASH_OFFSET_CFI_ALT 0x555 115 #define FLASH_OFFSET_CFI_RESP 0x10 116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 117 /* extended query table primary address */ 118 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 119 #define FLASH_OFFSET_WTOUT 0x1F 120 #define FLASH_OFFSET_WBTOUT 0x20 121 #define FLASH_OFFSET_ETOUT 0x21 122 #define FLASH_OFFSET_CETOUT 0x22 123 #define FLASH_OFFSET_WMAX_TOUT 0x23 124 #define FLASH_OFFSET_WBMAX_TOUT 0x24 125 #define FLASH_OFFSET_EMAX_TOUT 0x25 126 #define FLASH_OFFSET_CEMAX_TOUT 0x26 127 #define FLASH_OFFSET_SIZE 0x27 128 #define FLASH_OFFSET_INTERFACE 0x28 129 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 130 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 131 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 132 #define FLASH_OFFSET_PROTECT 0x02 133 #define FLASH_OFFSET_USER_PROTECTION 0x85 134 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 135 136 #define CFI_CMDSET_NONE 0 137 #define CFI_CMDSET_INTEL_EXTENDED 1 138 #define CFI_CMDSET_AMD_STANDARD 2 139 #define CFI_CMDSET_INTEL_STANDARD 3 140 #define CFI_CMDSET_AMD_EXTENDED 4 141 #define CFI_CMDSET_MITSU_STANDARD 256 142 #define CFI_CMDSET_MITSU_EXTENDED 257 143 #define CFI_CMDSET_SST 258 144 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 145 146 #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 147 # undef FLASH_CMD_RESET 148 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 149 #endif 150 151 typedef union { 152 unsigned char c; 153 unsigned short w; 154 unsigned long l; 155 unsigned long long ll; 156 } cfiword_t; 157 158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 159 160 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 161 162 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 163 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 164 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 165 #else 166 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 167 #endif 168 169 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 170 171 /* 172 * Check if chip width is defined. If not, start detecting with 8bit. 173 */ 174 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 175 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 176 #endif 177 178 /* CFI standard query structure */ 179 struct cfi_qry { 180 u8 qry[3]; 181 u16 p_id; 182 u16 p_adr; 183 u16 a_id; 184 u16 a_adr; 185 u8 vcc_min; 186 u8 vcc_max; 187 u8 vpp_min; 188 u8 vpp_max; 189 u8 word_write_timeout_typ; 190 u8 buf_write_timeout_typ; 191 u8 block_erase_timeout_typ; 192 u8 chip_erase_timeout_typ; 193 u8 word_write_timeout_max; 194 u8 buf_write_timeout_max; 195 u8 block_erase_timeout_max; 196 u8 chip_erase_timeout_max; 197 u8 dev_size; 198 u16 interface_desc; 199 u16 max_buf_write_size; 200 u8 num_erase_regions; 201 u32 erase_region_info[NUM_ERASE_REGIONS]; 202 } __attribute__((packed)); 203 204 struct cfi_pri_hdr { 205 u8 pri[3]; 206 u8 major_version; 207 u8 minor_version; 208 } __attribute__((packed)); 209 210 static void __flash_write8(u8 value, void *addr) 211 { 212 __raw_writeb(value, addr); 213 } 214 215 static void __flash_write16(u16 value, void *addr) 216 { 217 __raw_writew(value, addr); 218 } 219 220 static void __flash_write32(u32 value, void *addr) 221 { 222 __raw_writel(value, addr); 223 } 224 225 static void __flash_write64(u64 value, void *addr) 226 { 227 /* No architectures currently implement __raw_writeq() */ 228 *(volatile u64 *)addr = value; 229 } 230 231 static u8 __flash_read8(void *addr) 232 { 233 return __raw_readb(addr); 234 } 235 236 static u16 __flash_read16(void *addr) 237 { 238 return __raw_readw(addr); 239 } 240 241 static u32 __flash_read32(void *addr) 242 { 243 return __raw_readl(addr); 244 } 245 246 static u64 __flash_read64(void *addr) 247 { 248 /* No architectures currently implement __raw_readq() */ 249 return *(volatile u64 *)addr; 250 } 251 252 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 253 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 254 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 255 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 256 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 257 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 258 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 259 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 260 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 261 #else 262 #define flash_write8 __flash_write8 263 #define flash_write16 __flash_write16 264 #define flash_write32 __flash_write32 265 #define flash_write64 __flash_write64 266 #define flash_read8 __flash_read8 267 #define flash_read16 __flash_read16 268 #define flash_read32 __flash_read32 269 #define flash_read64 __flash_read64 270 #endif 271 272 /*----------------------------------------------------------------------- 273 */ 274 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 275 static flash_info_t *flash_get_info(ulong base) 276 { 277 int i; 278 flash_info_t * info = 0; 279 280 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 281 info = & flash_info[i]; 282 if (info->size && info->start[0] <= base && 283 base <= info->start[0] + info->size - 1) 284 break; 285 } 286 287 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 288 } 289 #endif 290 291 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 292 { 293 if (sect != (info->sector_count - 1)) 294 return info->start[sect + 1] - info->start[sect]; 295 else 296 return info->start[0] + info->size - info->start[sect]; 297 } 298 299 /*----------------------------------------------------------------------- 300 * create an address based on the offset and the port width 301 */ 302 static inline void * 303 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 304 { 305 unsigned int byte_offset = offset * info->portwidth; 306 307 return map_physmem(info->start[sect] + byte_offset, 308 flash_sector_size(info, sect) - byte_offset, 309 MAP_NOCACHE); 310 } 311 312 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 313 unsigned int offset, void *addr) 314 { 315 unsigned int byte_offset = offset * info->portwidth; 316 317 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset); 318 } 319 320 /*----------------------------------------------------------------------- 321 * make a proper sized command based on the port and chip widths 322 */ 323 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 324 { 325 int i; 326 int cword_offset; 327 int cp_offset; 328 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 329 u32 cmd_le = cpu_to_le32(cmd); 330 #endif 331 uchar val; 332 uchar *cp = (uchar *) cmdbuf; 333 334 for (i = info->portwidth; i > 0; i--){ 335 cword_offset = (info->portwidth-i)%info->chipwidth; 336 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 337 cp_offset = info->portwidth - i; 338 val = *((uchar*)&cmd_le + cword_offset); 339 #else 340 cp_offset = i - 1; 341 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 342 #endif 343 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 344 } 345 } 346 347 #ifdef DEBUG 348 /*----------------------------------------------------------------------- 349 * Debug support 350 */ 351 static void print_longlong (char *str, unsigned long long data) 352 { 353 int i; 354 char *cp; 355 356 cp = (unsigned char *) &data; 357 for (i = 0; i < 8; i++) 358 sprintf (&str[i * 2], "%2.2x", *cp++); 359 } 360 361 static void flash_printqry (struct cfi_qry *qry) 362 { 363 u8 *p = (u8 *)qry; 364 int x, y; 365 366 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 367 debug("%02x : ", x); 368 for (y = 0; y < 16; y++) 369 debug("%2.2x ", p[x + y]); 370 debug(" "); 371 for (y = 0; y < 16; y++) { 372 unsigned char c = p[x + y]; 373 if (c >= 0x20 && c <= 0x7e) 374 debug("%c", c); 375 else 376 debug("."); 377 } 378 debug("\n"); 379 } 380 } 381 #endif 382 383 384 /*----------------------------------------------------------------------- 385 * read a character at a port width address 386 */ 387 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 388 { 389 uchar *cp; 390 uchar retval; 391 392 cp = flash_map (info, 0, offset); 393 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 394 retval = flash_read8(cp); 395 #else 396 retval = flash_read8(cp + info->portwidth - 1); 397 #endif 398 flash_unmap (info, 0, offset, cp); 399 return retval; 400 } 401 402 /*----------------------------------------------------------------------- 403 * read a word at a port width address, assume 16bit bus 404 */ 405 static inline ushort flash_read_word (flash_info_t * info, uint offset) 406 { 407 ushort *addr, retval; 408 409 addr = flash_map (info, 0, offset); 410 retval = flash_read16 (addr); 411 flash_unmap (info, 0, offset, addr); 412 return retval; 413 } 414 415 416 /*----------------------------------------------------------------------- 417 * read a long word by picking the least significant byte of each maximum 418 * port size word. Swap for ppc format. 419 */ 420 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 421 uint offset) 422 { 423 uchar *addr; 424 ulong retval; 425 426 #ifdef DEBUG 427 int x; 428 #endif 429 addr = flash_map (info, sect, offset); 430 431 #ifdef DEBUG 432 debug ("long addr is at %p info->portwidth = %d\n", addr, 433 info->portwidth); 434 for (x = 0; x < 4 * info->portwidth; x++) { 435 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 436 } 437 #endif 438 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 439 retval = ((flash_read8(addr) << 16) | 440 (flash_read8(addr + info->portwidth) << 24) | 441 (flash_read8(addr + 2 * info->portwidth)) | 442 (flash_read8(addr + 3 * info->portwidth) << 8)); 443 #else 444 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 445 (flash_read8(addr + info->portwidth - 1) << 16) | 446 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 447 (flash_read8(addr + 3 * info->portwidth - 1))); 448 #endif 449 flash_unmap(info, sect, offset, addr); 450 451 return retval; 452 } 453 454 /* 455 * Write a proper sized command to the correct address 456 */ 457 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 458 uint offset, u32 cmd) 459 { 460 461 void *addr; 462 cfiword_t cword; 463 464 addr = flash_map (info, sect, offset); 465 flash_make_cmd (info, cmd, &cword); 466 switch (info->portwidth) { 467 case FLASH_CFI_8BIT: 468 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 469 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 470 flash_write8(cword.c, addr); 471 break; 472 case FLASH_CFI_16BIT: 473 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 474 cmd, cword.w, 475 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 476 flash_write16(cword.w, addr); 477 break; 478 case FLASH_CFI_32BIT: 479 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 480 cmd, cword.l, 481 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 482 flash_write32(cword.l, addr); 483 break; 484 case FLASH_CFI_64BIT: 485 #ifdef DEBUG 486 { 487 char str[20]; 488 489 print_longlong (str, cword.ll); 490 491 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 492 addr, cmd, str, 493 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 494 } 495 #endif 496 flash_write64(cword.ll, addr); 497 break; 498 } 499 500 /* Ensure all the instructions are fully finished */ 501 sync(); 502 503 flash_unmap(info, sect, offset, addr); 504 } 505 506 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 507 { 508 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 509 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 510 } 511 512 /*----------------------------------------------------------------------- 513 */ 514 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 515 uint offset, uchar cmd) 516 { 517 void *addr; 518 cfiword_t cword; 519 int retval; 520 521 addr = flash_map (info, sect, offset); 522 flash_make_cmd (info, cmd, &cword); 523 524 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 525 switch (info->portwidth) { 526 case FLASH_CFI_8BIT: 527 debug ("is= %x %x\n", flash_read8(addr), cword.c); 528 retval = (flash_read8(addr) == cword.c); 529 break; 530 case FLASH_CFI_16BIT: 531 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 532 retval = (flash_read16(addr) == cword.w); 533 break; 534 case FLASH_CFI_32BIT: 535 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 536 retval = (flash_read32(addr) == cword.l); 537 break; 538 case FLASH_CFI_64BIT: 539 #ifdef DEBUG 540 { 541 char str1[20]; 542 char str2[20]; 543 544 print_longlong (str1, flash_read64(addr)); 545 print_longlong (str2, cword.ll); 546 debug ("is= %s %s\n", str1, str2); 547 } 548 #endif 549 retval = (flash_read64(addr) == cword.ll); 550 break; 551 default: 552 retval = 0; 553 break; 554 } 555 flash_unmap(info, sect, offset, addr); 556 557 return retval; 558 } 559 560 /*----------------------------------------------------------------------- 561 */ 562 static int flash_isset (flash_info_t * info, flash_sect_t sect, 563 uint offset, uchar cmd) 564 { 565 void *addr; 566 cfiword_t cword; 567 int retval; 568 569 addr = flash_map (info, sect, offset); 570 flash_make_cmd (info, cmd, &cword); 571 switch (info->portwidth) { 572 case FLASH_CFI_8BIT: 573 retval = ((flash_read8(addr) & cword.c) == cword.c); 574 break; 575 case FLASH_CFI_16BIT: 576 retval = ((flash_read16(addr) & cword.w) == cword.w); 577 break; 578 case FLASH_CFI_32BIT: 579 retval = ((flash_read32(addr) & cword.l) == cword.l); 580 break; 581 case FLASH_CFI_64BIT: 582 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 583 break; 584 default: 585 retval = 0; 586 break; 587 } 588 flash_unmap(info, sect, offset, addr); 589 590 return retval; 591 } 592 593 /*----------------------------------------------------------------------- 594 */ 595 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 596 uint offset, uchar cmd) 597 { 598 void *addr; 599 cfiword_t cword; 600 int retval; 601 602 addr = flash_map (info, sect, offset); 603 flash_make_cmd (info, cmd, &cword); 604 switch (info->portwidth) { 605 case FLASH_CFI_8BIT: 606 retval = flash_read8(addr) != flash_read8(addr); 607 break; 608 case FLASH_CFI_16BIT: 609 retval = flash_read16(addr) != flash_read16(addr); 610 break; 611 case FLASH_CFI_32BIT: 612 retval = flash_read32(addr) != flash_read32(addr); 613 break; 614 case FLASH_CFI_64BIT: 615 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 616 (flash_read32(addr+4) != flash_read32(addr+4)) ); 617 break; 618 default: 619 retval = 0; 620 break; 621 } 622 flash_unmap(info, sect, offset, addr); 623 624 return retval; 625 } 626 627 /* 628 * flash_is_busy - check to see if the flash is busy 629 * 630 * This routine checks the status of the chip and returns true if the 631 * chip is busy. 632 */ 633 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 634 { 635 int retval; 636 637 switch (info->vendor) { 638 case CFI_CMDSET_INTEL_PROG_REGIONS: 639 case CFI_CMDSET_INTEL_STANDARD: 640 case CFI_CMDSET_INTEL_EXTENDED: 641 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 642 break; 643 case CFI_CMDSET_AMD_STANDARD: 644 case CFI_CMDSET_AMD_EXTENDED: 645 #ifdef CONFIG_FLASH_CFI_LEGACY 646 case CFI_CMDSET_AMD_LEGACY: 647 #endif 648 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 649 break; 650 default: 651 retval = 0; 652 } 653 debug ("flash_is_busy: %d\n", retval); 654 return retval; 655 } 656 657 /*----------------------------------------------------------------------- 658 * wait for XSR.7 to be set. Time out with an error if it does not. 659 * This routine does not set the flash to read-array mode. 660 */ 661 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 662 ulong tout, char *prompt) 663 { 664 ulong start; 665 666 #if CONFIG_SYS_HZ != 1000 667 tout *= CONFIG_SYS_HZ/1000; 668 #endif 669 670 /* Wait for command completion */ 671 start = get_timer (0); 672 while (flash_is_busy (info, sector)) { 673 if (get_timer (start) > tout) { 674 printf ("Flash %s timeout at address %lx data %lx\n", 675 prompt, info->start[sector], 676 flash_read_long (info, sector, 0)); 677 flash_write_cmd (info, sector, 0, info->cmd_reset); 678 return ERR_TIMOUT; 679 } 680 udelay (1); /* also triggers watchdog */ 681 } 682 return ERR_OK; 683 } 684 685 /*----------------------------------------------------------------------- 686 * Wait for XSR.7 to be set, if it times out print an error, otherwise 687 * do a full status check. 688 * 689 * This routine sets the flash to read-array mode. 690 */ 691 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 692 ulong tout, char *prompt) 693 { 694 int retcode; 695 696 retcode = flash_status_check (info, sector, tout, prompt); 697 switch (info->vendor) { 698 case CFI_CMDSET_INTEL_PROG_REGIONS: 699 case CFI_CMDSET_INTEL_EXTENDED: 700 case CFI_CMDSET_INTEL_STANDARD: 701 if ((retcode != ERR_OK) 702 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 703 retcode = ERR_INVAL; 704 printf ("Flash %s error at address %lx\n", prompt, 705 info->start[sector]); 706 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 707 FLASH_STATUS_PSLBS)) { 708 puts ("Command Sequence Error.\n"); 709 } else if (flash_isset (info, sector, 0, 710 FLASH_STATUS_ECLBS)) { 711 puts ("Block Erase Error.\n"); 712 retcode = ERR_NOT_ERASED; 713 } else if (flash_isset (info, sector, 0, 714 FLASH_STATUS_PSLBS)) { 715 puts ("Locking Error\n"); 716 } 717 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 718 puts ("Block locked.\n"); 719 retcode = ERR_PROTECTED; 720 } 721 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 722 puts ("Vpp Low Error.\n"); 723 } 724 flash_write_cmd (info, sector, 0, info->cmd_reset); 725 break; 726 default: 727 break; 728 } 729 return retcode; 730 } 731 732 /*----------------------------------------------------------------------- 733 */ 734 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 735 { 736 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 737 unsigned short w; 738 unsigned int l; 739 unsigned long long ll; 740 #endif 741 742 switch (info->portwidth) { 743 case FLASH_CFI_8BIT: 744 cword->c = c; 745 break; 746 case FLASH_CFI_16BIT: 747 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 748 w = c; 749 w <<= 8; 750 cword->w = (cword->w >> 8) | w; 751 #else 752 cword->w = (cword->w << 8) | c; 753 #endif 754 break; 755 case FLASH_CFI_32BIT: 756 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 757 l = c; 758 l <<= 24; 759 cword->l = (cword->l >> 8) | l; 760 #else 761 cword->l = (cword->l << 8) | c; 762 #endif 763 break; 764 case FLASH_CFI_64BIT: 765 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 766 ll = c; 767 ll <<= 56; 768 cword->ll = (cword->ll >> 8) | ll; 769 #else 770 cword->ll = (cword->ll << 8) | c; 771 #endif 772 break; 773 } 774 } 775 776 /* loop through the sectors from the highest address when the passed 777 * address is greater or equal to the sector address we have a match 778 */ 779 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 780 { 781 flash_sect_t sector; 782 783 for (sector = info->sector_count - 1; sector >= 0; sector--) { 784 if (addr >= info->start[sector]) 785 break; 786 } 787 return sector; 788 } 789 790 /*----------------------------------------------------------------------- 791 */ 792 static int flash_write_cfiword (flash_info_t * info, ulong dest, 793 cfiword_t cword) 794 { 795 void *dstaddr; 796 int flag; 797 flash_sect_t sect; 798 799 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE); 800 801 /* Check if Flash is (sufficiently) erased */ 802 switch (info->portwidth) { 803 case FLASH_CFI_8BIT: 804 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 805 break; 806 case FLASH_CFI_16BIT: 807 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 808 break; 809 case FLASH_CFI_32BIT: 810 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 811 break; 812 case FLASH_CFI_64BIT: 813 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 814 break; 815 default: 816 flag = 0; 817 break; 818 } 819 if (!flag) { 820 unmap_physmem(dstaddr, info->portwidth); 821 return ERR_NOT_ERASED; 822 } 823 824 /* Disable interrupts which might cause a timeout here */ 825 flag = disable_interrupts (); 826 827 switch (info->vendor) { 828 case CFI_CMDSET_INTEL_PROG_REGIONS: 829 case CFI_CMDSET_INTEL_EXTENDED: 830 case CFI_CMDSET_INTEL_STANDARD: 831 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 832 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 833 break; 834 case CFI_CMDSET_AMD_EXTENDED: 835 case CFI_CMDSET_AMD_STANDARD: 836 #ifdef CONFIG_FLASH_CFI_LEGACY 837 case CFI_CMDSET_AMD_LEGACY: 838 #endif 839 sect = find_sector(info, dest); 840 flash_unlock_seq (info, sect); 841 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 842 break; 843 } 844 845 switch (info->portwidth) { 846 case FLASH_CFI_8BIT: 847 flash_write8(cword.c, dstaddr); 848 break; 849 case FLASH_CFI_16BIT: 850 flash_write16(cword.w, dstaddr); 851 break; 852 case FLASH_CFI_32BIT: 853 flash_write32(cword.l, dstaddr); 854 break; 855 case FLASH_CFI_64BIT: 856 flash_write64(cword.ll, dstaddr); 857 break; 858 } 859 860 /* re-enable interrupts if necessary */ 861 if (flag) 862 enable_interrupts (); 863 864 unmap_physmem(dstaddr, info->portwidth); 865 866 return flash_full_status_check (info, find_sector (info, dest), 867 info->write_tout, "write"); 868 } 869 870 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 871 872 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 873 int len) 874 { 875 flash_sect_t sector; 876 int cnt; 877 int retcode; 878 void *src = cp; 879 void *dst = map_physmem(dest, len, MAP_NOCACHE); 880 void *dst2 = dst; 881 int flag = 0; 882 uint offset = 0; 883 unsigned int shift; 884 uchar write_cmd; 885 886 switch (info->portwidth) { 887 case FLASH_CFI_8BIT: 888 shift = 0; 889 break; 890 case FLASH_CFI_16BIT: 891 shift = 1; 892 break; 893 case FLASH_CFI_32BIT: 894 shift = 2; 895 break; 896 case FLASH_CFI_64BIT: 897 shift = 3; 898 break; 899 default: 900 retcode = ERR_INVAL; 901 goto out_unmap; 902 } 903 904 cnt = len >> shift; 905 906 while ((cnt-- > 0) && (flag == 0)) { 907 switch (info->portwidth) { 908 case FLASH_CFI_8BIT: 909 flag = ((flash_read8(dst2) & flash_read8(src)) == 910 flash_read8(src)); 911 src += 1, dst2 += 1; 912 break; 913 case FLASH_CFI_16BIT: 914 flag = ((flash_read16(dst2) & flash_read16(src)) == 915 flash_read16(src)); 916 src += 2, dst2 += 2; 917 break; 918 case FLASH_CFI_32BIT: 919 flag = ((flash_read32(dst2) & flash_read32(src)) == 920 flash_read32(src)); 921 src += 4, dst2 += 4; 922 break; 923 case FLASH_CFI_64BIT: 924 flag = ((flash_read64(dst2) & flash_read64(src)) == 925 flash_read64(src)); 926 src += 8, dst2 += 8; 927 break; 928 } 929 } 930 if (!flag) { 931 retcode = ERR_NOT_ERASED; 932 goto out_unmap; 933 } 934 935 src = cp; 936 sector = find_sector (info, dest); 937 938 switch (info->vendor) { 939 case CFI_CMDSET_INTEL_PROG_REGIONS: 940 case CFI_CMDSET_INTEL_STANDARD: 941 case CFI_CMDSET_INTEL_EXTENDED: 942 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 943 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 944 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 945 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 946 flash_write_cmd (info, sector, 0, write_cmd); 947 retcode = flash_status_check (info, sector, 948 info->buffer_write_tout, 949 "write to buffer"); 950 if (retcode == ERR_OK) { 951 /* reduce the number of loops by the width of 952 * the port */ 953 cnt = len >> shift; 954 flash_write_cmd (info, sector, 0, cnt - 1); 955 while (cnt-- > 0) { 956 switch (info->portwidth) { 957 case FLASH_CFI_8BIT: 958 flash_write8(flash_read8(src), dst); 959 src += 1, dst += 1; 960 break; 961 case FLASH_CFI_16BIT: 962 flash_write16(flash_read16(src), dst); 963 src += 2, dst += 2; 964 break; 965 case FLASH_CFI_32BIT: 966 flash_write32(flash_read32(src), dst); 967 src += 4, dst += 4; 968 break; 969 case FLASH_CFI_64BIT: 970 flash_write64(flash_read64(src), dst); 971 src += 8, dst += 8; 972 break; 973 default: 974 retcode = ERR_INVAL; 975 goto out_unmap; 976 } 977 } 978 flash_write_cmd (info, sector, 0, 979 FLASH_CMD_WRITE_BUFFER_CONFIRM); 980 retcode = flash_full_status_check ( 981 info, sector, info->buffer_write_tout, 982 "buffer write"); 983 } 984 985 break; 986 987 case CFI_CMDSET_AMD_STANDARD: 988 case CFI_CMDSET_AMD_EXTENDED: 989 flash_unlock_seq(info,0); 990 991 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 992 offset = ((unsigned long)dst - info->start[sector]) >> shift; 993 #endif 994 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 995 cnt = len >> shift; 996 flash_write_cmd(info, sector, offset, (uchar)cnt - 1); 997 998 switch (info->portwidth) { 999 case FLASH_CFI_8BIT: 1000 while (cnt-- > 0) { 1001 flash_write8(flash_read8(src), dst); 1002 src += 1, dst += 1; 1003 } 1004 break; 1005 case FLASH_CFI_16BIT: 1006 while (cnt-- > 0) { 1007 flash_write16(flash_read16(src), dst); 1008 src += 2, dst += 2; 1009 } 1010 break; 1011 case FLASH_CFI_32BIT: 1012 while (cnt-- > 0) { 1013 flash_write32(flash_read32(src), dst); 1014 src += 4, dst += 4; 1015 } 1016 break; 1017 case FLASH_CFI_64BIT: 1018 while (cnt-- > 0) { 1019 flash_write64(flash_read64(src), dst); 1020 src += 8, dst += 8; 1021 } 1022 break; 1023 default: 1024 retcode = ERR_INVAL; 1025 goto out_unmap; 1026 } 1027 1028 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1029 retcode = flash_full_status_check (info, sector, 1030 info->buffer_write_tout, 1031 "buffer write"); 1032 break; 1033 1034 default: 1035 debug ("Unknown Command Set\n"); 1036 retcode = ERR_INVAL; 1037 break; 1038 } 1039 1040 out_unmap: 1041 unmap_physmem(dst, len); 1042 return retcode; 1043 } 1044 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1045 1046 1047 /*----------------------------------------------------------------------- 1048 */ 1049 int flash_erase (flash_info_t * info, int s_first, int s_last) 1050 { 1051 int rcode = 0; 1052 int prot; 1053 flash_sect_t sect; 1054 1055 if (info->flash_id != FLASH_MAN_CFI) { 1056 puts ("Can't erase unknown flash type - aborted\n"); 1057 return 1; 1058 } 1059 if ((s_first < 0) || (s_first > s_last)) { 1060 puts ("- no sectors to erase\n"); 1061 return 1; 1062 } 1063 1064 prot = 0; 1065 for (sect = s_first; sect <= s_last; ++sect) { 1066 if (info->protect[sect]) { 1067 prot++; 1068 } 1069 } 1070 if (prot) { 1071 printf ("- Warning: %d protected sectors will not be erased!\n", 1072 prot); 1073 } else { 1074 putc ('\n'); 1075 } 1076 1077 1078 for (sect = s_first; sect <= s_last; sect++) { 1079 if (info->protect[sect] == 0) { /* not protected */ 1080 switch (info->vendor) { 1081 case CFI_CMDSET_INTEL_PROG_REGIONS: 1082 case CFI_CMDSET_INTEL_STANDARD: 1083 case CFI_CMDSET_INTEL_EXTENDED: 1084 flash_write_cmd (info, sect, 0, 1085 FLASH_CMD_CLEAR_STATUS); 1086 flash_write_cmd (info, sect, 0, 1087 FLASH_CMD_BLOCK_ERASE); 1088 flash_write_cmd (info, sect, 0, 1089 FLASH_CMD_ERASE_CONFIRM); 1090 break; 1091 case CFI_CMDSET_AMD_STANDARD: 1092 case CFI_CMDSET_AMD_EXTENDED: 1093 flash_unlock_seq (info, sect); 1094 flash_write_cmd (info, sect, 1095 info->addr_unlock1, 1096 AMD_CMD_ERASE_START); 1097 flash_unlock_seq (info, sect); 1098 flash_write_cmd (info, sect, 0, 1099 AMD_CMD_ERASE_SECTOR); 1100 break; 1101 #ifdef CONFIG_FLASH_CFI_LEGACY 1102 case CFI_CMDSET_AMD_LEGACY: 1103 flash_unlock_seq (info, 0); 1104 flash_write_cmd (info, 0, info->addr_unlock1, 1105 AMD_CMD_ERASE_START); 1106 flash_unlock_seq (info, 0); 1107 flash_write_cmd (info, sect, 0, 1108 AMD_CMD_ERASE_SECTOR); 1109 break; 1110 #endif 1111 default: 1112 debug ("Unkown flash vendor %d\n", 1113 info->vendor); 1114 break; 1115 } 1116 1117 if (flash_full_status_check 1118 (info, sect, info->erase_blk_tout, "erase")) { 1119 rcode = 1; 1120 } else 1121 putc ('.'); 1122 } 1123 } 1124 puts (" done\n"); 1125 return rcode; 1126 } 1127 1128 /*----------------------------------------------------------------------- 1129 */ 1130 void flash_print_info (flash_info_t * info) 1131 { 1132 int i; 1133 1134 if (info->flash_id != FLASH_MAN_CFI) { 1135 puts ("missing or unknown FLASH type\n"); 1136 return; 1137 } 1138 1139 printf ("%s FLASH (%d x %d)", 1140 info->name, 1141 (info->portwidth << 3), (info->chipwidth << 3)); 1142 if (info->size < 1024*1024) 1143 printf (" Size: %ld kB in %d Sectors\n", 1144 info->size >> 10, info->sector_count); 1145 else 1146 printf (" Size: %ld MB in %d Sectors\n", 1147 info->size >> 20, info->sector_count); 1148 printf (" "); 1149 switch (info->vendor) { 1150 case CFI_CMDSET_INTEL_PROG_REGIONS: 1151 printf ("Intel Prog Regions"); 1152 break; 1153 case CFI_CMDSET_INTEL_STANDARD: 1154 printf ("Intel Standard"); 1155 break; 1156 case CFI_CMDSET_INTEL_EXTENDED: 1157 printf ("Intel Extended"); 1158 break; 1159 case CFI_CMDSET_AMD_STANDARD: 1160 printf ("AMD Standard"); 1161 break; 1162 case CFI_CMDSET_AMD_EXTENDED: 1163 printf ("AMD Extended"); 1164 break; 1165 #ifdef CONFIG_FLASH_CFI_LEGACY 1166 case CFI_CMDSET_AMD_LEGACY: 1167 printf ("AMD Legacy"); 1168 break; 1169 #endif 1170 default: 1171 printf ("Unknown (%d)", info->vendor); 1172 break; 1173 } 1174 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1175 info->manufacturer_id, info->device_id); 1176 if (info->device_id == 0x7E) { 1177 printf("%04X", info->device_id2); 1178 } 1179 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1180 info->erase_blk_tout, 1181 info->write_tout); 1182 if (info->buffer_size > 1) { 1183 printf (" Buffer write timeout: %ld ms, " 1184 "buffer size: %d bytes\n", 1185 info->buffer_write_tout, 1186 info->buffer_size); 1187 } 1188 1189 puts ("\n Sector Start Addresses:"); 1190 for (i = 0; i < info->sector_count; ++i) { 1191 if ((i % 5) == 0) 1192 printf ("\n"); 1193 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1194 int k; 1195 int size; 1196 int erased; 1197 volatile unsigned long *flash; 1198 1199 /* 1200 * Check if whole sector is erased 1201 */ 1202 size = flash_sector_size(info, i); 1203 erased = 1; 1204 flash = (volatile unsigned long *) info->start[i]; 1205 size = size >> 2; /* divide by 4 for longword access */ 1206 for (k = 0; k < size; k++) { 1207 if (*flash++ != 0xffffffff) { 1208 erased = 0; 1209 break; 1210 } 1211 } 1212 1213 /* print empty and read-only info */ 1214 printf (" %08lX %c %s ", 1215 info->start[i], 1216 erased ? 'E' : ' ', 1217 info->protect[i] ? "RO" : " "); 1218 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1219 printf (" %08lX %s ", 1220 info->start[i], 1221 info->protect[i] ? "RO" : " "); 1222 #endif 1223 } 1224 putc ('\n'); 1225 return; 1226 } 1227 1228 /*----------------------------------------------------------------------- 1229 * This is used in a few places in write_buf() to show programming 1230 * progress. Making it a function is nasty because it needs to do side 1231 * effect updates to digit and dots. Repeated code is nasty too, so 1232 * we define it once here. 1233 */ 1234 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1235 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1236 dots -= dots_sub; \ 1237 if ((scale > 0) && (dots <= 0)) { \ 1238 if ((digit % 5) == 0) \ 1239 printf ("%d", digit / 5); \ 1240 else \ 1241 putc ('.'); \ 1242 digit--; \ 1243 dots += scale; \ 1244 } 1245 #else 1246 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1247 #endif 1248 1249 /*----------------------------------------------------------------------- 1250 * Copy memory to flash, returns: 1251 * 0 - OK 1252 * 1 - write timeout 1253 * 2 - Flash not erased 1254 */ 1255 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1256 { 1257 ulong wp; 1258 uchar *p; 1259 int aln; 1260 cfiword_t cword; 1261 int i, rc; 1262 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1263 int buffered_size; 1264 #endif 1265 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1266 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1267 int scale = 0; 1268 int dots = 0; 1269 1270 /* 1271 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1272 */ 1273 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1274 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1275 CONFIG_FLASH_SHOW_PROGRESS); 1276 } 1277 #endif 1278 1279 /* get lower aligned address */ 1280 wp = (addr & ~(info->portwidth - 1)); 1281 1282 /* handle unaligned start */ 1283 if ((aln = addr - wp) != 0) { 1284 cword.l = 0; 1285 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1286 for (i = 0; i < aln; ++i) 1287 flash_add_byte (info, &cword, flash_read8(p + i)); 1288 1289 for (; (i < info->portwidth) && (cnt > 0); i++) { 1290 flash_add_byte (info, &cword, *src++); 1291 cnt--; 1292 } 1293 for (; (cnt == 0) && (i < info->portwidth); ++i) 1294 flash_add_byte (info, &cword, flash_read8(p + i)); 1295 1296 rc = flash_write_cfiword (info, wp, cword); 1297 unmap_physmem(p, info->portwidth); 1298 if (rc != 0) 1299 return rc; 1300 1301 wp += i; 1302 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1303 } 1304 1305 /* handle the aligned part */ 1306 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1307 buffered_size = (info->portwidth / info->chipwidth); 1308 buffered_size *= info->buffer_size; 1309 while (cnt >= info->portwidth) { 1310 /* prohibit buffer write when buffer_size is 1 */ 1311 if (info->buffer_size == 1) { 1312 cword.l = 0; 1313 for (i = 0; i < info->portwidth; i++) 1314 flash_add_byte (info, &cword, *src++); 1315 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1316 return rc; 1317 wp += info->portwidth; 1318 cnt -= info->portwidth; 1319 continue; 1320 } 1321 1322 /* write buffer until next buffered_size aligned boundary */ 1323 i = buffered_size - (wp % buffered_size); 1324 if (i > cnt) 1325 i = cnt; 1326 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1327 return rc; 1328 i -= i & (info->portwidth - 1); 1329 wp += i; 1330 src += i; 1331 cnt -= i; 1332 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1333 } 1334 #else 1335 while (cnt >= info->portwidth) { 1336 cword.l = 0; 1337 for (i = 0; i < info->portwidth; i++) { 1338 flash_add_byte (info, &cword, *src++); 1339 } 1340 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1341 return rc; 1342 wp += info->portwidth; 1343 cnt -= info->portwidth; 1344 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1345 } 1346 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1347 1348 if (cnt == 0) { 1349 return (0); 1350 } 1351 1352 /* 1353 * handle unaligned tail bytes 1354 */ 1355 cword.l = 0; 1356 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1357 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1358 flash_add_byte (info, &cword, *src++); 1359 --cnt; 1360 } 1361 for (; i < info->portwidth; ++i) 1362 flash_add_byte (info, &cword, flash_read8(p + i)); 1363 unmap_physmem(p, info->portwidth); 1364 1365 return flash_write_cfiword (info, wp, cword); 1366 } 1367 1368 /*----------------------------------------------------------------------- 1369 */ 1370 #ifdef CONFIG_SYS_FLASH_PROTECTION 1371 1372 int flash_real_protect (flash_info_t * info, long sector, int prot) 1373 { 1374 int retcode = 0; 1375 1376 switch (info->vendor) { 1377 case CFI_CMDSET_INTEL_PROG_REGIONS: 1378 case CFI_CMDSET_INTEL_STANDARD: 1379 case CFI_CMDSET_INTEL_EXTENDED: 1380 flash_write_cmd (info, sector, 0, 1381 FLASH_CMD_CLEAR_STATUS); 1382 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1383 if (prot) 1384 flash_write_cmd (info, sector, 0, 1385 FLASH_CMD_PROTECT_SET); 1386 else 1387 flash_write_cmd (info, sector, 0, 1388 FLASH_CMD_PROTECT_CLEAR); 1389 break; 1390 case CFI_CMDSET_AMD_EXTENDED: 1391 case CFI_CMDSET_AMD_STANDARD: 1392 /* U-Boot only checks the first byte */ 1393 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1394 if (prot) { 1395 flash_unlock_seq (info, 0); 1396 flash_write_cmd (info, 0, 1397 info->addr_unlock1, 1398 ATM_CMD_SOFTLOCK_START); 1399 flash_unlock_seq (info, 0); 1400 flash_write_cmd (info, sector, 0, 1401 ATM_CMD_LOCK_SECT); 1402 } else { 1403 flash_write_cmd (info, 0, 1404 info->addr_unlock1, 1405 AMD_CMD_UNLOCK_START); 1406 if (info->device_id == ATM_ID_BV6416) 1407 flash_write_cmd (info, sector, 1408 0, ATM_CMD_UNLOCK_SECT); 1409 } 1410 } 1411 break; 1412 #ifdef CONFIG_FLASH_CFI_LEGACY 1413 case CFI_CMDSET_AMD_LEGACY: 1414 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1415 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1416 if (prot) 1417 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1418 else 1419 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1420 #endif 1421 }; 1422 1423 if ((retcode = 1424 flash_full_status_check (info, sector, info->erase_blk_tout, 1425 prot ? "protect" : "unprotect")) == 0) { 1426 1427 info->protect[sector] = prot; 1428 1429 /* 1430 * On some of Intel's flash chips (marked via legacy_unlock) 1431 * unprotect unprotects all locking. 1432 */ 1433 if ((prot == 0) && (info->legacy_unlock)) { 1434 flash_sect_t i; 1435 1436 for (i = 0; i < info->sector_count; i++) { 1437 if (info->protect[i]) 1438 flash_real_protect (info, i, 1); 1439 } 1440 } 1441 } 1442 return retcode; 1443 } 1444 1445 /*----------------------------------------------------------------------- 1446 * flash_read_user_serial - read the OneTimeProgramming cells 1447 */ 1448 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1449 int len) 1450 { 1451 uchar *src; 1452 uchar *dst; 1453 1454 dst = buffer; 1455 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1456 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1457 memcpy (dst, src + offset, len); 1458 flash_write_cmd (info, 0, 0, info->cmd_reset); 1459 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1460 } 1461 1462 /* 1463 * flash_read_factory_serial - read the device Id from the protection area 1464 */ 1465 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1466 int len) 1467 { 1468 uchar *src; 1469 1470 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1471 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1472 memcpy (buffer, src + offset, len); 1473 flash_write_cmd (info, 0, 0, info->cmd_reset); 1474 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1475 } 1476 1477 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1478 1479 /*----------------------------------------------------------------------- 1480 * Reverse the order of the erase regions in the CFI QRY structure. 1481 * This is needed for chips that are either a) correctly detected as 1482 * top-boot, or b) buggy. 1483 */ 1484 static void cfi_reverse_geometry(struct cfi_qry *qry) 1485 { 1486 unsigned int i, j; 1487 u32 tmp; 1488 1489 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1490 tmp = qry->erase_region_info[i]; 1491 qry->erase_region_info[i] = qry->erase_region_info[j]; 1492 qry->erase_region_info[j] = tmp; 1493 } 1494 } 1495 1496 /*----------------------------------------------------------------------- 1497 * read jedec ids from device and set corresponding fields in info struct 1498 * 1499 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1500 * 1501 */ 1502 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1503 { 1504 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1505 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1506 udelay(1000); /* some flash are slow to respond */ 1507 info->manufacturer_id = flash_read_uchar (info, 1508 FLASH_OFFSET_MANUFACTURER_ID); 1509 info->device_id = flash_read_uchar (info, 1510 FLASH_OFFSET_DEVICE_ID); 1511 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1512 } 1513 1514 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1515 { 1516 info->cmd_reset = FLASH_CMD_RESET; 1517 1518 cmdset_intel_read_jedec_ids(info); 1519 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1520 1521 #ifdef CONFIG_SYS_FLASH_PROTECTION 1522 /* read legacy lock/unlock bit from intel flash */ 1523 if (info->ext_addr) { 1524 info->legacy_unlock = flash_read_uchar (info, 1525 info->ext_addr + 5) & 0x08; 1526 } 1527 #endif 1528 1529 return 0; 1530 } 1531 1532 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1533 { 1534 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1535 flash_unlock_seq(info, 0); 1536 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1537 udelay(1000); /* some flash are slow to respond */ 1538 1539 info->manufacturer_id = flash_read_uchar (info, 1540 FLASH_OFFSET_MANUFACTURER_ID); 1541 1542 switch (info->chipwidth){ 1543 case FLASH_CFI_8BIT: 1544 info->device_id = flash_read_uchar (info, 1545 FLASH_OFFSET_DEVICE_ID); 1546 if (info->device_id == 0x7E) { 1547 /* AMD 3-byte (expanded) device ids */ 1548 info->device_id2 = flash_read_uchar (info, 1549 FLASH_OFFSET_DEVICE_ID2); 1550 info->device_id2 <<= 8; 1551 info->device_id2 |= flash_read_uchar (info, 1552 FLASH_OFFSET_DEVICE_ID3); 1553 } 1554 break; 1555 case FLASH_CFI_16BIT: 1556 info->device_id = flash_read_word (info, 1557 FLASH_OFFSET_DEVICE_ID); 1558 break; 1559 default: 1560 break; 1561 } 1562 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1563 } 1564 1565 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1566 { 1567 info->cmd_reset = AMD_CMD_RESET; 1568 1569 cmdset_amd_read_jedec_ids(info); 1570 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1571 1572 return 0; 1573 } 1574 1575 #ifdef CONFIG_FLASH_CFI_LEGACY 1576 static void flash_read_jedec_ids (flash_info_t * info) 1577 { 1578 info->manufacturer_id = 0; 1579 info->device_id = 0; 1580 info->device_id2 = 0; 1581 1582 switch (info->vendor) { 1583 case CFI_CMDSET_INTEL_PROG_REGIONS: 1584 case CFI_CMDSET_INTEL_STANDARD: 1585 case CFI_CMDSET_INTEL_EXTENDED: 1586 cmdset_intel_read_jedec_ids(info); 1587 break; 1588 case CFI_CMDSET_AMD_STANDARD: 1589 case CFI_CMDSET_AMD_EXTENDED: 1590 cmdset_amd_read_jedec_ids(info); 1591 break; 1592 default: 1593 break; 1594 } 1595 } 1596 1597 /*----------------------------------------------------------------------- 1598 * Call board code to request info about non-CFI flash. 1599 * board_flash_get_legacy needs to fill in at least: 1600 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1601 */ 1602 static int flash_detect_legacy(ulong base, int banknum) 1603 { 1604 flash_info_t *info = &flash_info[banknum]; 1605 1606 if (board_flash_get_legacy(base, banknum, info)) { 1607 /* board code may have filled info completely. If not, we 1608 use JEDEC ID probing. */ 1609 if (!info->vendor) { 1610 int modes[] = { 1611 CFI_CMDSET_AMD_STANDARD, 1612 CFI_CMDSET_INTEL_STANDARD 1613 }; 1614 int i; 1615 1616 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1617 info->vendor = modes[i]; 1618 info->start[0] = base; 1619 if (info->portwidth == FLASH_CFI_8BIT 1620 && info->interface == FLASH_CFI_X8X16) { 1621 info->addr_unlock1 = 0x2AAA; 1622 info->addr_unlock2 = 0x5555; 1623 } else { 1624 info->addr_unlock1 = 0x5555; 1625 info->addr_unlock2 = 0x2AAA; 1626 } 1627 flash_read_jedec_ids(info); 1628 debug("JEDEC PROBE: ID %x %x %x\n", 1629 info->manufacturer_id, 1630 info->device_id, 1631 info->device_id2); 1632 if (jedec_flash_match(info, base)) 1633 break; 1634 } 1635 } 1636 1637 switch(info->vendor) { 1638 case CFI_CMDSET_INTEL_PROG_REGIONS: 1639 case CFI_CMDSET_INTEL_STANDARD: 1640 case CFI_CMDSET_INTEL_EXTENDED: 1641 info->cmd_reset = FLASH_CMD_RESET; 1642 break; 1643 case CFI_CMDSET_AMD_STANDARD: 1644 case CFI_CMDSET_AMD_EXTENDED: 1645 case CFI_CMDSET_AMD_LEGACY: 1646 info->cmd_reset = AMD_CMD_RESET; 1647 break; 1648 } 1649 info->flash_id = FLASH_MAN_CFI; 1650 return 1; 1651 } 1652 return 0; /* use CFI */ 1653 } 1654 #else 1655 static inline int flash_detect_legacy(ulong base, int banknum) 1656 { 1657 return 0; /* use CFI */ 1658 } 1659 #endif 1660 1661 /*----------------------------------------------------------------------- 1662 * detect if flash is compatible with the Common Flash Interface (CFI) 1663 * http://www.jedec.org/download/search/jesd68.pdf 1664 */ 1665 static void flash_read_cfi (flash_info_t *info, void *buf, 1666 unsigned int start, size_t len) 1667 { 1668 u8 *p = buf; 1669 unsigned int i; 1670 1671 for (i = 0; i < len; i++) 1672 p[i] = flash_read_uchar(info, start + i); 1673 } 1674 1675 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1676 { 1677 int cfi_offset; 1678 1679 /* We do not yet know what kind of commandset to use, so we issue 1680 the reset command in both Intel and AMD variants, in the hope 1681 that AMD flash roms ignore the Intel command. */ 1682 flash_write_cmd (info, 0, 0, AMD_CMD_RESET); 1683 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); 1684 1685 for (cfi_offset=0; 1686 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1687 cfi_offset++) { 1688 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1689 FLASH_CMD_CFI); 1690 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1691 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1692 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1693 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1694 sizeof(struct cfi_qry)); 1695 info->interface = le16_to_cpu(qry->interface_desc); 1696 1697 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1698 debug ("device interface is %d\n", 1699 info->interface); 1700 debug ("found port %d chip %d ", 1701 info->portwidth, info->chipwidth); 1702 debug ("port %d bits chip %d bits\n", 1703 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1704 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1705 1706 /* calculate command offsets as in the Linux driver */ 1707 info->addr_unlock1 = 0x555; 1708 info->addr_unlock2 = 0x2aa; 1709 1710 /* 1711 * modify the unlock address if we are 1712 * in compatibility mode 1713 */ 1714 if ( /* x8/x16 in x8 mode */ 1715 ((info->chipwidth == FLASH_CFI_BY8) && 1716 (info->interface == FLASH_CFI_X8X16)) || 1717 /* x16/x32 in x16 mode */ 1718 ((info->chipwidth == FLASH_CFI_BY16) && 1719 (info->interface == FLASH_CFI_X16X32))) 1720 { 1721 info->addr_unlock1 = 0xaaa; 1722 info->addr_unlock2 = 0x555; 1723 } 1724 1725 info->name = "CFI conformant"; 1726 return 1; 1727 } 1728 } 1729 1730 return 0; 1731 } 1732 1733 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1734 { 1735 debug ("flash detect cfi\n"); 1736 1737 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1738 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1739 for (info->chipwidth = FLASH_CFI_BY8; 1740 info->chipwidth <= info->portwidth; 1741 info->chipwidth <<= 1) 1742 if (__flash_detect_cfi(info, qry)) 1743 return 1; 1744 } 1745 debug ("not found\n"); 1746 return 0; 1747 } 1748 1749 /* 1750 * Manufacturer-specific quirks. Add workarounds for geometry 1751 * reversal, etc. here. 1752 */ 1753 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1754 { 1755 /* check if flash geometry needs reversal */ 1756 if (qry->num_erase_regions > 1) { 1757 /* reverse geometry if top boot part */ 1758 if (info->cfi_version < 0x3131) { 1759 /* CFI < 1.1, try to guess from device id */ 1760 if ((info->device_id & 0x80) != 0) 1761 cfi_reverse_geometry(qry); 1762 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1763 /* CFI >= 1.1, deduct from top/bottom flag */ 1764 /* note: ext_addr is valid since cfi_version > 0 */ 1765 cfi_reverse_geometry(qry); 1766 } 1767 } 1768 } 1769 1770 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1771 { 1772 int reverse_geometry = 0; 1773 1774 /* Check the "top boot" bit in the PRI */ 1775 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1776 reverse_geometry = 1; 1777 1778 /* AT49BV6416(T) list the erase regions in the wrong order. 1779 * However, the device ID is identical with the non-broken 1780 * AT49BV642D since u-boot only reads the low byte (they 1781 * differ in the high byte.) So leave out this fixup for now. 1782 */ 1783 #if 0 1784 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1785 reverse_geometry = !reverse_geometry; 1786 #endif 1787 1788 if (reverse_geometry) 1789 cfi_reverse_geometry(qry); 1790 } 1791 1792 /* 1793 * The following code cannot be run from FLASH! 1794 * 1795 */ 1796 ulong flash_get_size (ulong base, int banknum) 1797 { 1798 flash_info_t *info = &flash_info[banknum]; 1799 int i, j; 1800 flash_sect_t sect_cnt; 1801 unsigned long sector; 1802 unsigned long tmp; 1803 int size_ratio; 1804 uchar num_erase_regions; 1805 int erase_region_size; 1806 int erase_region_count; 1807 struct cfi_qry qry; 1808 1809 memset(&qry, 0, sizeof(qry)); 1810 1811 info->ext_addr = 0; 1812 info->cfi_version = 0; 1813 #ifdef CONFIG_SYS_FLASH_PROTECTION 1814 info->legacy_unlock = 0; 1815 #endif 1816 1817 info->start[0] = base; 1818 1819 if (flash_detect_cfi (info, &qry)) { 1820 info->vendor = le16_to_cpu(qry.p_id); 1821 info->ext_addr = le16_to_cpu(qry.p_adr); 1822 num_erase_regions = qry.num_erase_regions; 1823 1824 if (info->ext_addr) { 1825 info->cfi_version = (ushort) flash_read_uchar (info, 1826 info->ext_addr + 3) << 8; 1827 info->cfi_version |= (ushort) flash_read_uchar (info, 1828 info->ext_addr + 4); 1829 } 1830 1831 #ifdef DEBUG 1832 flash_printqry (&qry); 1833 #endif 1834 1835 switch (info->vendor) { 1836 case CFI_CMDSET_INTEL_PROG_REGIONS: 1837 case CFI_CMDSET_INTEL_STANDARD: 1838 case CFI_CMDSET_INTEL_EXTENDED: 1839 cmdset_intel_init(info, &qry); 1840 break; 1841 case CFI_CMDSET_AMD_STANDARD: 1842 case CFI_CMDSET_AMD_EXTENDED: 1843 cmdset_amd_init(info, &qry); 1844 break; 1845 default: 1846 printf("CFI: Unknown command set 0x%x\n", 1847 info->vendor); 1848 /* 1849 * Unfortunately, this means we don't know how 1850 * to get the chip back to Read mode. Might 1851 * as well try an Intel-style reset... 1852 */ 1853 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1854 return 0; 1855 } 1856 1857 /* Do manufacturer-specific fixups */ 1858 switch (info->manufacturer_id) { 1859 case 0x0001: 1860 flash_fixup_amd(info, &qry); 1861 break; 1862 case 0x001f: 1863 flash_fixup_atmel(info, &qry); 1864 break; 1865 } 1866 1867 debug ("manufacturer is %d\n", info->vendor); 1868 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1869 debug ("device id is 0x%x\n", info->device_id); 1870 debug ("device id2 is 0x%x\n", info->device_id2); 1871 debug ("cfi version is 0x%04x\n", info->cfi_version); 1872 1873 size_ratio = info->portwidth / info->chipwidth; 1874 /* if the chip is x8/x16 reduce the ratio by half */ 1875 if ((info->interface == FLASH_CFI_X8X16) 1876 && (info->chipwidth == FLASH_CFI_BY8)) { 1877 size_ratio >>= 1; 1878 } 1879 debug ("size_ratio %d port %d bits chip %d bits\n", 1880 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1881 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1882 debug ("found %d erase regions\n", num_erase_regions); 1883 sect_cnt = 0; 1884 sector = base; 1885 for (i = 0; i < num_erase_regions; i++) { 1886 if (i > NUM_ERASE_REGIONS) { 1887 printf ("%d erase regions found, only %d used\n", 1888 num_erase_regions, NUM_ERASE_REGIONS); 1889 break; 1890 } 1891 1892 tmp = le32_to_cpu(qry.erase_region_info[i]); 1893 debug("erase region %u: 0x%08lx\n", i, tmp); 1894 1895 erase_region_count = (tmp & 0xffff) + 1; 1896 tmp >>= 16; 1897 erase_region_size = 1898 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1899 debug ("erase_region_count = %d erase_region_size = %d\n", 1900 erase_region_count, erase_region_size); 1901 for (j = 0; j < erase_region_count; j++) { 1902 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1903 printf("ERROR: too many flash sectors\n"); 1904 break; 1905 } 1906 info->start[sect_cnt] = sector; 1907 sector += (erase_region_size * size_ratio); 1908 1909 /* 1910 * Only read protection status from 1911 * supported devices (intel...) 1912 */ 1913 switch (info->vendor) { 1914 case CFI_CMDSET_INTEL_PROG_REGIONS: 1915 case CFI_CMDSET_INTEL_EXTENDED: 1916 case CFI_CMDSET_INTEL_STANDARD: 1917 info->protect[sect_cnt] = 1918 flash_isset (info, sect_cnt, 1919 FLASH_OFFSET_PROTECT, 1920 FLASH_STATUS_PROTECT); 1921 break; 1922 default: 1923 /* default: not protected */ 1924 info->protect[sect_cnt] = 0; 1925 } 1926 1927 sect_cnt++; 1928 } 1929 } 1930 1931 info->sector_count = sect_cnt; 1932 info->size = 1 << qry.dev_size; 1933 /* multiply the size by the number of chips */ 1934 info->size *= size_ratio; 1935 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1936 tmp = 1 << qry.block_erase_timeout_typ; 1937 info->erase_blk_tout = tmp * 1938 (1 << qry.block_erase_timeout_max); 1939 tmp = (1 << qry.buf_write_timeout_typ) * 1940 (1 << qry.buf_write_timeout_max); 1941 1942 /* round up when converting to ms */ 1943 info->buffer_write_tout = (tmp + 999) / 1000; 1944 tmp = (1 << qry.word_write_timeout_typ) * 1945 (1 << qry.word_write_timeout_max); 1946 /* round up when converting to ms */ 1947 info->write_tout = (tmp + 999) / 1000; 1948 info->flash_id = FLASH_MAN_CFI; 1949 if ((info->interface == FLASH_CFI_X8X16) && 1950 (info->chipwidth == FLASH_CFI_BY8)) { 1951 /* XXX - Need to test on x8/x16 in parallel. */ 1952 info->portwidth >>= 1; 1953 } 1954 1955 flash_write_cmd (info, 0, 0, info->cmd_reset); 1956 } 1957 1958 return (info->size); 1959 } 1960 1961 /*----------------------------------------------------------------------- 1962 */ 1963 unsigned long flash_init (void) 1964 { 1965 unsigned long size = 0; 1966 int i; 1967 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 1968 struct apl_s { 1969 ulong start; 1970 ulong size; 1971 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 1972 #endif 1973 1974 #ifdef CONFIG_SYS_FLASH_PROTECTION 1975 char *s = getenv("unlock"); 1976 #endif 1977 1978 #define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 1979 1980 /* Init: no FLASHes known */ 1981 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 1982 flash_info[i].flash_id = FLASH_UNKNOWN; 1983 1984 if (!flash_detect_legacy (BANK_BASE(i), i)) 1985 flash_get_size (BANK_BASE(i), i); 1986 size += flash_info[i].size; 1987 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 1988 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 1989 printf ("## Unknown FLASH on Bank %d " 1990 "- Size = 0x%08lx = %ld MB\n", 1991 i+1, flash_info[i].size, 1992 flash_info[i].size << 20); 1993 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 1994 } 1995 #ifdef CONFIG_SYS_FLASH_PROTECTION 1996 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 1997 /* 1998 * Only the U-Boot image and it's environment 1999 * is protected, all other sectors are 2000 * unprotected (unlocked) if flash hardware 2001 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2002 * and the environment variable "unlock" is 2003 * set to "yes". 2004 */ 2005 if (flash_info[i].legacy_unlock) { 2006 int k; 2007 2008 /* 2009 * Disable legacy_unlock temporarily, 2010 * since flash_real_protect would 2011 * relock all other sectors again 2012 * otherwise. 2013 */ 2014 flash_info[i].legacy_unlock = 0; 2015 2016 /* 2017 * Legacy unlocking (e.g. Intel J3) -> 2018 * unlock only one sector. This will 2019 * unlock all sectors. 2020 */ 2021 flash_real_protect (&flash_info[i], 0, 0); 2022 2023 flash_info[i].legacy_unlock = 1; 2024 2025 /* 2026 * Manually mark other sectors as 2027 * unlocked (unprotected) 2028 */ 2029 for (k = 1; k < flash_info[i].sector_count; k++) 2030 flash_info[i].protect[k] = 0; 2031 } else { 2032 /* 2033 * No legancy unlocking -> unlock all sectors 2034 */ 2035 flash_protect (FLAG_PROTECT_CLEAR, 2036 flash_info[i].start[0], 2037 flash_info[i].start[0] 2038 + flash_info[i].size - 1, 2039 &flash_info[i]); 2040 } 2041 } 2042 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2043 } 2044 2045 /* Monitor protection ON by default */ 2046 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 2047 flash_protect (FLAG_PROTECT_SET, 2048 CONFIG_SYS_MONITOR_BASE, 2049 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2050 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2051 #endif 2052 2053 /* Environment protection ON by default */ 2054 #ifdef CONFIG_ENV_IS_IN_FLASH 2055 flash_protect (FLAG_PROTECT_SET, 2056 CONFIG_ENV_ADDR, 2057 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2058 flash_get_info(CONFIG_ENV_ADDR)); 2059 #endif 2060 2061 /* Redundant environment protection ON by default */ 2062 #ifdef CONFIG_ENV_ADDR_REDUND 2063 flash_protect (FLAG_PROTECT_SET, 2064 CONFIG_ENV_ADDR_REDUND, 2065 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1, 2066 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2067 #endif 2068 2069 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2070 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2071 debug("autoprotecting from %08x to %08x\n", 2072 apl[i].start, apl[i].start + apl[i].size - 1); 2073 flash_protect (FLAG_PROTECT_SET, 2074 apl[i].start, 2075 apl[i].start + apl[i].size - 1, 2076 flash_get_info(apl[i].start)); 2077 } 2078 #endif 2079 return (size); 2080 } 2081