1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #include <mtd/cfi_flash.h> 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 67 #endif 68 69 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 70 static uint flash_verbose = 1; 71 72 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 73 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 74 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 75 #else 76 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 77 #endif 78 79 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 80 81 /* 82 * Check if chip width is defined. If not, start detecting with 8bit. 83 */ 84 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 85 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 86 #endif 87 88 static void __flash_write8(u8 value, void *addr) 89 { 90 __raw_writeb(value, addr); 91 } 92 93 static void __flash_write16(u16 value, void *addr) 94 { 95 __raw_writew(value, addr); 96 } 97 98 static void __flash_write32(u32 value, void *addr) 99 { 100 __raw_writel(value, addr); 101 } 102 103 static void __flash_write64(u64 value, void *addr) 104 { 105 /* No architectures currently implement __raw_writeq() */ 106 *(volatile u64 *)addr = value; 107 } 108 109 static u8 __flash_read8(void *addr) 110 { 111 return __raw_readb(addr); 112 } 113 114 static u16 __flash_read16(void *addr) 115 { 116 return __raw_readw(addr); 117 } 118 119 static u32 __flash_read32(void *addr) 120 { 121 return __raw_readl(addr); 122 } 123 124 static u64 __flash_read64(void *addr) 125 { 126 /* No architectures currently implement __raw_readq() */ 127 return *(volatile u64 *)addr; 128 } 129 130 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 131 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 132 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 133 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 134 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 135 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 136 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 137 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 138 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 139 #else 140 #define flash_write8 __flash_write8 141 #define flash_write16 __flash_write16 142 #define flash_write32 __flash_write32 143 #define flash_write64 __flash_write64 144 #define flash_read8 __flash_read8 145 #define flash_read16 __flash_read16 146 #define flash_read32 __flash_read32 147 #define flash_read64 __flash_read64 148 #endif 149 150 /*----------------------------------------------------------------------- 151 */ 152 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 153 flash_info_t *flash_get_info(ulong base) 154 { 155 int i; 156 flash_info_t * info = 0; 157 158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 159 info = & flash_info[i]; 160 if (info->size && info->start[0] <= base && 161 base <= info->start[0] + info->size - 1) 162 break; 163 } 164 165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 166 } 167 #endif 168 169 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 170 { 171 if (sect != (info->sector_count - 1)) 172 return info->start[sect + 1] - info->start[sect]; 173 else 174 return info->start[0] + info->size - info->start[sect]; 175 } 176 177 /*----------------------------------------------------------------------- 178 * create an address based on the offset and the port width 179 */ 180 static inline void * 181 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 182 { 183 unsigned int byte_offset = offset * info->portwidth; 184 185 return (void *)(info->start[sect] + byte_offset); 186 } 187 188 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 189 unsigned int offset, void *addr) 190 { 191 } 192 193 /*----------------------------------------------------------------------- 194 * make a proper sized command based on the port and chip widths 195 */ 196 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 197 { 198 int i; 199 int cword_offset; 200 int cp_offset; 201 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 202 u32 cmd_le = cpu_to_le32(cmd); 203 #endif 204 uchar val; 205 uchar *cp = (uchar *) cmdbuf; 206 207 for (i = info->portwidth; i > 0; i--){ 208 cword_offset = (info->portwidth-i)%info->chipwidth; 209 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 210 cp_offset = info->portwidth - i; 211 val = *((uchar*)&cmd_le + cword_offset); 212 #else 213 cp_offset = i - 1; 214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 215 #endif 216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 217 } 218 } 219 220 #ifdef DEBUG 221 /*----------------------------------------------------------------------- 222 * Debug support 223 */ 224 static void print_longlong (char *str, unsigned long long data) 225 { 226 int i; 227 char *cp; 228 229 cp = (char *) &data; 230 for (i = 0; i < 8; i++) 231 sprintf (&str[i * 2], "%2.2x", *cp++); 232 } 233 234 static void flash_printqry (struct cfi_qry *qry) 235 { 236 u8 *p = (u8 *)qry; 237 int x, y; 238 239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 240 debug("%02x : ", x); 241 for (y = 0; y < 16; y++) 242 debug("%2.2x ", p[x + y]); 243 debug(" "); 244 for (y = 0; y < 16; y++) { 245 unsigned char c = p[x + y]; 246 if (c >= 0x20 && c <= 0x7e) 247 debug("%c", c); 248 else 249 debug("."); 250 } 251 debug("\n"); 252 } 253 } 254 #endif 255 256 257 /*----------------------------------------------------------------------- 258 * read a character at a port width address 259 */ 260 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 261 { 262 uchar *cp; 263 uchar retval; 264 265 cp = flash_map (info, 0, offset); 266 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 267 retval = flash_read8(cp); 268 #else 269 retval = flash_read8(cp + info->portwidth - 1); 270 #endif 271 flash_unmap (info, 0, offset, cp); 272 return retval; 273 } 274 275 /*----------------------------------------------------------------------- 276 * read a word at a port width address, assume 16bit bus 277 */ 278 static inline ushort flash_read_word (flash_info_t * info, uint offset) 279 { 280 ushort *addr, retval; 281 282 addr = flash_map (info, 0, offset); 283 retval = flash_read16 (addr); 284 flash_unmap (info, 0, offset, addr); 285 return retval; 286 } 287 288 289 /*----------------------------------------------------------------------- 290 * read a long word by picking the least significant byte of each maximum 291 * port size word. Swap for ppc format. 292 */ 293 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 294 uint offset) 295 { 296 uchar *addr; 297 ulong retval; 298 299 #ifdef DEBUG 300 int x; 301 #endif 302 addr = flash_map (info, sect, offset); 303 304 #ifdef DEBUG 305 debug ("long addr is at %p info->portwidth = %d\n", addr, 306 info->portwidth); 307 for (x = 0; x < 4 * info->portwidth; x++) { 308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 309 } 310 #endif 311 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 312 retval = ((flash_read8(addr) << 16) | 313 (flash_read8(addr + info->portwidth) << 24) | 314 (flash_read8(addr + 2 * info->portwidth)) | 315 (flash_read8(addr + 3 * info->portwidth) << 8)); 316 #else 317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 318 (flash_read8(addr + info->portwidth - 1) << 16) | 319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 320 (flash_read8(addr + 3 * info->portwidth - 1))); 321 #endif 322 flash_unmap(info, sect, offset, addr); 323 324 return retval; 325 } 326 327 /* 328 * Write a proper sized command to the correct address 329 */ 330 void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 331 uint offset, u32 cmd) 332 { 333 334 void *addr; 335 cfiword_t cword; 336 337 addr = flash_map (info, sect, offset); 338 flash_make_cmd (info, cmd, &cword); 339 switch (info->portwidth) { 340 case FLASH_CFI_8BIT: 341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 343 flash_write8(cword.c, addr); 344 break; 345 case FLASH_CFI_16BIT: 346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 347 cmd, cword.w, 348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 349 flash_write16(cword.w, addr); 350 break; 351 case FLASH_CFI_32BIT: 352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 353 cmd, cword.l, 354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 355 flash_write32(cword.l, addr); 356 break; 357 case FLASH_CFI_64BIT: 358 #ifdef DEBUG 359 { 360 char str[20]; 361 362 print_longlong (str, cword.ll); 363 364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 365 addr, cmd, str, 366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 367 } 368 #endif 369 flash_write64(cword.ll, addr); 370 break; 371 } 372 373 /* Ensure all the instructions are fully finished */ 374 sync(); 375 376 flash_unmap(info, sect, offset, addr); 377 } 378 379 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 380 { 381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 383 } 384 385 /*----------------------------------------------------------------------- 386 */ 387 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 388 uint offset, uchar cmd) 389 { 390 void *addr; 391 cfiword_t cword; 392 int retval; 393 394 addr = flash_map (info, sect, offset); 395 flash_make_cmd (info, cmd, &cword); 396 397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 398 switch (info->portwidth) { 399 case FLASH_CFI_8BIT: 400 debug ("is= %x %x\n", flash_read8(addr), cword.c); 401 retval = (flash_read8(addr) == cword.c); 402 break; 403 case FLASH_CFI_16BIT: 404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 405 retval = (flash_read16(addr) == cword.w); 406 break; 407 case FLASH_CFI_32BIT: 408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 409 retval = (flash_read32(addr) == cword.l); 410 break; 411 case FLASH_CFI_64BIT: 412 #ifdef DEBUG 413 { 414 char str1[20]; 415 char str2[20]; 416 417 print_longlong (str1, flash_read64(addr)); 418 print_longlong (str2, cword.ll); 419 debug ("is= %s %s\n", str1, str2); 420 } 421 #endif 422 retval = (flash_read64(addr) == cword.ll); 423 break; 424 default: 425 retval = 0; 426 break; 427 } 428 flash_unmap(info, sect, offset, addr); 429 430 return retval; 431 } 432 433 /*----------------------------------------------------------------------- 434 */ 435 static int flash_isset (flash_info_t * info, flash_sect_t sect, 436 uint offset, uchar cmd) 437 { 438 void *addr; 439 cfiword_t cword; 440 int retval; 441 442 addr = flash_map (info, sect, offset); 443 flash_make_cmd (info, cmd, &cword); 444 switch (info->portwidth) { 445 case FLASH_CFI_8BIT: 446 retval = ((flash_read8(addr) & cword.c) == cword.c); 447 break; 448 case FLASH_CFI_16BIT: 449 retval = ((flash_read16(addr) & cword.w) == cword.w); 450 break; 451 case FLASH_CFI_32BIT: 452 retval = ((flash_read32(addr) & cword.l) == cword.l); 453 break; 454 case FLASH_CFI_64BIT: 455 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 456 break; 457 default: 458 retval = 0; 459 break; 460 } 461 flash_unmap(info, sect, offset, addr); 462 463 return retval; 464 } 465 466 /*----------------------------------------------------------------------- 467 */ 468 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 469 uint offset, uchar cmd) 470 { 471 void *addr; 472 cfiword_t cword; 473 int retval; 474 475 addr = flash_map (info, sect, offset); 476 flash_make_cmd (info, cmd, &cword); 477 switch (info->portwidth) { 478 case FLASH_CFI_8BIT: 479 retval = flash_read8(addr) != flash_read8(addr); 480 break; 481 case FLASH_CFI_16BIT: 482 retval = flash_read16(addr) != flash_read16(addr); 483 break; 484 case FLASH_CFI_32BIT: 485 retval = flash_read32(addr) != flash_read32(addr); 486 break; 487 case FLASH_CFI_64BIT: 488 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 489 (flash_read32(addr+4) != flash_read32(addr+4)) ); 490 break; 491 default: 492 retval = 0; 493 break; 494 } 495 flash_unmap(info, sect, offset, addr); 496 497 return retval; 498 } 499 500 /* 501 * flash_is_busy - check to see if the flash is busy 502 * 503 * This routine checks the status of the chip and returns true if the 504 * chip is busy. 505 */ 506 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 507 { 508 int retval; 509 510 switch (info->vendor) { 511 case CFI_CMDSET_INTEL_PROG_REGIONS: 512 case CFI_CMDSET_INTEL_STANDARD: 513 case CFI_CMDSET_INTEL_EXTENDED: 514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 515 break; 516 case CFI_CMDSET_AMD_STANDARD: 517 case CFI_CMDSET_AMD_EXTENDED: 518 #ifdef CONFIG_FLASH_CFI_LEGACY 519 case CFI_CMDSET_AMD_LEGACY: 520 #endif 521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 522 break; 523 default: 524 retval = 0; 525 } 526 debug ("flash_is_busy: %d\n", retval); 527 return retval; 528 } 529 530 /*----------------------------------------------------------------------- 531 * wait for XSR.7 to be set. Time out with an error if it does not. 532 * This routine does not set the flash to read-array mode. 533 */ 534 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 535 ulong tout, char *prompt) 536 { 537 ulong start; 538 539 #if CONFIG_SYS_HZ != 1000 540 if ((ulong)CONFIG_SYS_HZ > 100000) 541 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 542 else 543 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 544 #endif 545 546 /* Wait for command completion */ 547 start = get_timer (0); 548 while (flash_is_busy (info, sector)) { 549 if (get_timer (start) > tout) { 550 printf ("Flash %s timeout at address %lx data %lx\n", 551 prompt, info->start[sector], 552 flash_read_long (info, sector, 0)); 553 flash_write_cmd (info, sector, 0, info->cmd_reset); 554 return ERR_TIMOUT; 555 } 556 udelay (1); /* also triggers watchdog */ 557 } 558 return ERR_OK; 559 } 560 561 /*----------------------------------------------------------------------- 562 * Wait for XSR.7 to be set, if it times out print an error, otherwise 563 * do a full status check. 564 * 565 * This routine sets the flash to read-array mode. 566 */ 567 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 568 ulong tout, char *prompt) 569 { 570 int retcode; 571 572 retcode = flash_status_check (info, sector, tout, prompt); 573 switch (info->vendor) { 574 case CFI_CMDSET_INTEL_PROG_REGIONS: 575 case CFI_CMDSET_INTEL_EXTENDED: 576 case CFI_CMDSET_INTEL_STANDARD: 577 if ((retcode != ERR_OK) 578 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 579 retcode = ERR_INVAL; 580 printf ("Flash %s error at address %lx\n", prompt, 581 info->start[sector]); 582 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 583 FLASH_STATUS_PSLBS)) { 584 puts ("Command Sequence Error.\n"); 585 } else if (flash_isset (info, sector, 0, 586 FLASH_STATUS_ECLBS)) { 587 puts ("Block Erase Error.\n"); 588 retcode = ERR_NOT_ERASED; 589 } else if (flash_isset (info, sector, 0, 590 FLASH_STATUS_PSLBS)) { 591 puts ("Locking Error\n"); 592 } 593 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 594 puts ("Block locked.\n"); 595 retcode = ERR_PROTECTED; 596 } 597 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 598 puts ("Vpp Low Error.\n"); 599 } 600 flash_write_cmd (info, sector, 0, info->cmd_reset); 601 break; 602 default: 603 break; 604 } 605 return retcode; 606 } 607 608 static int use_flash_status_poll(flash_info_t *info) 609 { 610 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 611 if (info->vendor == CFI_CMDSET_AMD_EXTENDED || 612 info->vendor == CFI_CMDSET_AMD_STANDARD) 613 return 1; 614 #endif 615 return 0; 616 } 617 618 static int flash_status_poll(flash_info_t *info, void *src, void *dst, 619 ulong tout, char *prompt) 620 { 621 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 622 ulong start; 623 int ready; 624 625 #if CONFIG_SYS_HZ != 1000 626 if ((ulong)CONFIG_SYS_HZ > 100000) 627 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 628 else 629 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 630 #endif 631 632 /* Wait for command completion */ 633 start = get_timer(0); 634 while (1) { 635 switch (info->portwidth) { 636 case FLASH_CFI_8BIT: 637 ready = flash_read8(dst) == flash_read8(src); 638 break; 639 case FLASH_CFI_16BIT: 640 ready = flash_read16(dst) == flash_read16(src); 641 break; 642 case FLASH_CFI_32BIT: 643 ready = flash_read32(dst) == flash_read32(src); 644 break; 645 case FLASH_CFI_64BIT: 646 ready = flash_read64(dst) == flash_read64(src); 647 break; 648 default: 649 ready = 0; 650 break; 651 } 652 if (ready) 653 break; 654 if (get_timer(start) > tout) { 655 printf("Flash %s timeout at address %lx data %lx\n", 656 prompt, (ulong)dst, (ulong)flash_read8(dst)); 657 return ERR_TIMOUT; 658 } 659 udelay(1); /* also triggers watchdog */ 660 } 661 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */ 662 return ERR_OK; 663 } 664 665 /*----------------------------------------------------------------------- 666 */ 667 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 668 { 669 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 670 unsigned short w; 671 unsigned int l; 672 unsigned long long ll; 673 #endif 674 675 switch (info->portwidth) { 676 case FLASH_CFI_8BIT: 677 cword->c = c; 678 break; 679 case FLASH_CFI_16BIT: 680 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 681 w = c; 682 w <<= 8; 683 cword->w = (cword->w >> 8) | w; 684 #else 685 cword->w = (cword->w << 8) | c; 686 #endif 687 break; 688 case FLASH_CFI_32BIT: 689 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 690 l = c; 691 l <<= 24; 692 cword->l = (cword->l >> 8) | l; 693 #else 694 cword->l = (cword->l << 8) | c; 695 #endif 696 break; 697 case FLASH_CFI_64BIT: 698 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 699 ll = c; 700 ll <<= 56; 701 cword->ll = (cword->ll >> 8) | ll; 702 #else 703 cword->ll = (cword->ll << 8) | c; 704 #endif 705 break; 706 } 707 } 708 709 /* 710 * Loop through the sector table starting from the previously found sector. 711 * Searches forwards or backwards, dependent on the passed address. 712 */ 713 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 714 { 715 static flash_sect_t saved_sector = 0; /* previously found sector */ 716 flash_sect_t sector = saved_sector; 717 718 while ((info->start[sector] < addr) 719 && (sector < info->sector_count - 1)) 720 sector++; 721 while ((info->start[sector] > addr) && (sector > 0)) 722 /* 723 * also decrements the sector in case of an overshot 724 * in the first loop 725 */ 726 sector--; 727 728 saved_sector = sector; 729 return sector; 730 } 731 732 /*----------------------------------------------------------------------- 733 */ 734 static int flash_write_cfiword (flash_info_t * info, ulong dest, 735 cfiword_t cword) 736 { 737 void *dstaddr = (void *)dest; 738 int flag; 739 flash_sect_t sect = 0; 740 char sect_found = 0; 741 742 /* Check if Flash is (sufficiently) erased */ 743 switch (info->portwidth) { 744 case FLASH_CFI_8BIT: 745 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 746 break; 747 case FLASH_CFI_16BIT: 748 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 749 break; 750 case FLASH_CFI_32BIT: 751 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 752 break; 753 case FLASH_CFI_64BIT: 754 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 755 break; 756 default: 757 flag = 0; 758 break; 759 } 760 if (!flag) 761 return ERR_NOT_ERASED; 762 763 /* Disable interrupts which might cause a timeout here */ 764 flag = disable_interrupts (); 765 766 switch (info->vendor) { 767 case CFI_CMDSET_INTEL_PROG_REGIONS: 768 case CFI_CMDSET_INTEL_EXTENDED: 769 case CFI_CMDSET_INTEL_STANDARD: 770 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 771 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 772 break; 773 case CFI_CMDSET_AMD_EXTENDED: 774 case CFI_CMDSET_AMD_STANDARD: 775 sect = find_sector(info, dest); 776 flash_unlock_seq (info, sect); 777 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 778 sect_found = 1; 779 break; 780 #ifdef CONFIG_FLASH_CFI_LEGACY 781 case CFI_CMDSET_AMD_LEGACY: 782 sect = find_sector(info, dest); 783 flash_unlock_seq (info, 0); 784 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 785 sect_found = 1; 786 break; 787 #endif 788 } 789 790 switch (info->portwidth) { 791 case FLASH_CFI_8BIT: 792 flash_write8(cword.c, dstaddr); 793 break; 794 case FLASH_CFI_16BIT: 795 flash_write16(cword.w, dstaddr); 796 break; 797 case FLASH_CFI_32BIT: 798 flash_write32(cword.l, dstaddr); 799 break; 800 case FLASH_CFI_64BIT: 801 flash_write64(cword.ll, dstaddr); 802 break; 803 } 804 805 /* re-enable interrupts if necessary */ 806 if (flag) 807 enable_interrupts (); 808 809 if (!sect_found) 810 sect = find_sector (info, dest); 811 812 if (use_flash_status_poll(info)) 813 return flash_status_poll(info, &cword, dstaddr, 814 info->write_tout, "write"); 815 else 816 return flash_full_status_check(info, sect, 817 info->write_tout, "write"); 818 } 819 820 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 821 822 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 823 int len) 824 { 825 flash_sect_t sector; 826 int cnt; 827 int retcode; 828 void *src = cp; 829 void *dst = (void *)dest; 830 void *dst2 = dst; 831 int flag = 0; 832 uint offset = 0; 833 unsigned int shift; 834 uchar write_cmd; 835 836 switch (info->portwidth) { 837 case FLASH_CFI_8BIT: 838 shift = 0; 839 break; 840 case FLASH_CFI_16BIT: 841 shift = 1; 842 break; 843 case FLASH_CFI_32BIT: 844 shift = 2; 845 break; 846 case FLASH_CFI_64BIT: 847 shift = 3; 848 break; 849 default: 850 retcode = ERR_INVAL; 851 goto out_unmap; 852 } 853 854 cnt = len >> shift; 855 856 while ((cnt-- > 0) && (flag == 0)) { 857 switch (info->portwidth) { 858 case FLASH_CFI_8BIT: 859 flag = ((flash_read8(dst2) & flash_read8(src)) == 860 flash_read8(src)); 861 src += 1, dst2 += 1; 862 break; 863 case FLASH_CFI_16BIT: 864 flag = ((flash_read16(dst2) & flash_read16(src)) == 865 flash_read16(src)); 866 src += 2, dst2 += 2; 867 break; 868 case FLASH_CFI_32BIT: 869 flag = ((flash_read32(dst2) & flash_read32(src)) == 870 flash_read32(src)); 871 src += 4, dst2 += 4; 872 break; 873 case FLASH_CFI_64BIT: 874 flag = ((flash_read64(dst2) & flash_read64(src)) == 875 flash_read64(src)); 876 src += 8, dst2 += 8; 877 break; 878 } 879 } 880 if (!flag) { 881 retcode = ERR_NOT_ERASED; 882 goto out_unmap; 883 } 884 885 src = cp; 886 sector = find_sector (info, dest); 887 888 switch (info->vendor) { 889 case CFI_CMDSET_INTEL_PROG_REGIONS: 890 case CFI_CMDSET_INTEL_STANDARD: 891 case CFI_CMDSET_INTEL_EXTENDED: 892 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 893 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 894 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 895 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 896 flash_write_cmd (info, sector, 0, write_cmd); 897 retcode = flash_status_check (info, sector, 898 info->buffer_write_tout, 899 "write to buffer"); 900 if (retcode == ERR_OK) { 901 /* reduce the number of loops by the width of 902 * the port */ 903 cnt = len >> shift; 904 flash_write_cmd (info, sector, 0, cnt - 1); 905 while (cnt-- > 0) { 906 switch (info->portwidth) { 907 case FLASH_CFI_8BIT: 908 flash_write8(flash_read8(src), dst); 909 src += 1, dst += 1; 910 break; 911 case FLASH_CFI_16BIT: 912 flash_write16(flash_read16(src), dst); 913 src += 2, dst += 2; 914 break; 915 case FLASH_CFI_32BIT: 916 flash_write32(flash_read32(src), dst); 917 src += 4, dst += 4; 918 break; 919 case FLASH_CFI_64BIT: 920 flash_write64(flash_read64(src), dst); 921 src += 8, dst += 8; 922 break; 923 default: 924 retcode = ERR_INVAL; 925 goto out_unmap; 926 } 927 } 928 flash_write_cmd (info, sector, 0, 929 FLASH_CMD_WRITE_BUFFER_CONFIRM); 930 retcode = flash_full_status_check ( 931 info, sector, info->buffer_write_tout, 932 "buffer write"); 933 } 934 935 break; 936 937 case CFI_CMDSET_AMD_STANDARD: 938 case CFI_CMDSET_AMD_EXTENDED: 939 flash_unlock_seq(info,0); 940 941 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 942 offset = ((unsigned long)dst - info->start[sector]) >> shift; 943 #endif 944 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 945 cnt = len >> shift; 946 flash_write_cmd(info, sector, offset, cnt - 1); 947 948 switch (info->portwidth) { 949 case FLASH_CFI_8BIT: 950 while (cnt-- > 0) { 951 flash_write8(flash_read8(src), dst); 952 src += 1, dst += 1; 953 } 954 break; 955 case FLASH_CFI_16BIT: 956 while (cnt-- > 0) { 957 flash_write16(flash_read16(src), dst); 958 src += 2, dst += 2; 959 } 960 break; 961 case FLASH_CFI_32BIT: 962 while (cnt-- > 0) { 963 flash_write32(flash_read32(src), dst); 964 src += 4, dst += 4; 965 } 966 break; 967 case FLASH_CFI_64BIT: 968 while (cnt-- > 0) { 969 flash_write64(flash_read64(src), dst); 970 src += 8, dst += 8; 971 } 972 break; 973 default: 974 retcode = ERR_INVAL; 975 goto out_unmap; 976 } 977 978 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 979 if (use_flash_status_poll(info)) 980 retcode = flash_status_poll(info, src - (1 << shift), 981 dst - (1 << shift), 982 info->buffer_write_tout, 983 "buffer write"); 984 else 985 retcode = flash_full_status_check(info, sector, 986 info->buffer_write_tout, 987 "buffer write"); 988 break; 989 990 default: 991 debug ("Unknown Command Set\n"); 992 retcode = ERR_INVAL; 993 break; 994 } 995 996 out_unmap: 997 return retcode; 998 } 999 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1000 1001 1002 /*----------------------------------------------------------------------- 1003 */ 1004 int flash_erase (flash_info_t * info, int s_first, int s_last) 1005 { 1006 int rcode = 0; 1007 int prot; 1008 flash_sect_t sect; 1009 int st; 1010 1011 if (info->flash_id != FLASH_MAN_CFI) { 1012 puts ("Can't erase unknown flash type - aborted\n"); 1013 return 1; 1014 } 1015 if ((s_first < 0) || (s_first > s_last)) { 1016 puts ("- no sectors to erase\n"); 1017 return 1; 1018 } 1019 1020 prot = 0; 1021 for (sect = s_first; sect <= s_last; ++sect) { 1022 if (info->protect[sect]) { 1023 prot++; 1024 } 1025 } 1026 if (prot) { 1027 printf ("- Warning: %d protected sectors will not be erased!\n", 1028 prot); 1029 } else if (flash_verbose) { 1030 putc ('\n'); 1031 } 1032 1033 1034 for (sect = s_first; sect <= s_last; sect++) { 1035 if (info->protect[sect] == 0) { /* not protected */ 1036 switch (info->vendor) { 1037 case CFI_CMDSET_INTEL_PROG_REGIONS: 1038 case CFI_CMDSET_INTEL_STANDARD: 1039 case CFI_CMDSET_INTEL_EXTENDED: 1040 flash_write_cmd (info, sect, 0, 1041 FLASH_CMD_CLEAR_STATUS); 1042 flash_write_cmd (info, sect, 0, 1043 FLASH_CMD_BLOCK_ERASE); 1044 flash_write_cmd (info, sect, 0, 1045 FLASH_CMD_ERASE_CONFIRM); 1046 break; 1047 case CFI_CMDSET_AMD_STANDARD: 1048 case CFI_CMDSET_AMD_EXTENDED: 1049 flash_unlock_seq (info, sect); 1050 flash_write_cmd (info, sect, 1051 info->addr_unlock1, 1052 AMD_CMD_ERASE_START); 1053 flash_unlock_seq (info, sect); 1054 flash_write_cmd (info, sect, 0, 1055 AMD_CMD_ERASE_SECTOR); 1056 break; 1057 #ifdef CONFIG_FLASH_CFI_LEGACY 1058 case CFI_CMDSET_AMD_LEGACY: 1059 flash_unlock_seq (info, 0); 1060 flash_write_cmd (info, 0, info->addr_unlock1, 1061 AMD_CMD_ERASE_START); 1062 flash_unlock_seq (info, 0); 1063 flash_write_cmd (info, sect, 0, 1064 AMD_CMD_ERASE_SECTOR); 1065 break; 1066 #endif 1067 default: 1068 debug ("Unkown flash vendor %d\n", 1069 info->vendor); 1070 break; 1071 } 1072 1073 if (use_flash_status_poll(info)) { 1074 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL; 1075 void *dest; 1076 dest = flash_map(info, sect, 0); 1077 st = flash_status_poll(info, &cword, dest, 1078 info->erase_blk_tout, "erase"); 1079 flash_unmap(info, sect, 0, dest); 1080 } else 1081 st = flash_full_status_check(info, sect, 1082 info->erase_blk_tout, 1083 "erase"); 1084 if (st) 1085 rcode = 1; 1086 else if (flash_verbose) 1087 putc ('.'); 1088 } 1089 } 1090 1091 if (flash_verbose) 1092 puts (" done\n"); 1093 1094 return rcode; 1095 } 1096 1097 /*----------------------------------------------------------------------- 1098 */ 1099 void flash_print_info (flash_info_t * info) 1100 { 1101 int i; 1102 1103 if (info->flash_id != FLASH_MAN_CFI) { 1104 puts ("missing or unknown FLASH type\n"); 1105 return; 1106 } 1107 1108 printf ("%s FLASH (%d x %d)", 1109 info->name, 1110 (info->portwidth << 3), (info->chipwidth << 3)); 1111 if (info->size < 1024*1024) 1112 printf (" Size: %ld kB in %d Sectors\n", 1113 info->size >> 10, info->sector_count); 1114 else 1115 printf (" Size: %ld MB in %d Sectors\n", 1116 info->size >> 20, info->sector_count); 1117 printf (" "); 1118 switch (info->vendor) { 1119 case CFI_CMDSET_INTEL_PROG_REGIONS: 1120 printf ("Intel Prog Regions"); 1121 break; 1122 case CFI_CMDSET_INTEL_STANDARD: 1123 printf ("Intel Standard"); 1124 break; 1125 case CFI_CMDSET_INTEL_EXTENDED: 1126 printf ("Intel Extended"); 1127 break; 1128 case CFI_CMDSET_AMD_STANDARD: 1129 printf ("AMD Standard"); 1130 break; 1131 case CFI_CMDSET_AMD_EXTENDED: 1132 printf ("AMD Extended"); 1133 break; 1134 #ifdef CONFIG_FLASH_CFI_LEGACY 1135 case CFI_CMDSET_AMD_LEGACY: 1136 printf ("AMD Legacy"); 1137 break; 1138 #endif 1139 default: 1140 printf ("Unknown (%d)", info->vendor); 1141 break; 1142 } 1143 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1144 info->manufacturer_id, info->device_id); 1145 if (info->device_id == 0x7E) { 1146 printf("%04X", info->device_id2); 1147 } 1148 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1149 info->erase_blk_tout, 1150 info->write_tout); 1151 if (info->buffer_size > 1) { 1152 printf (" Buffer write timeout: %ld ms, " 1153 "buffer size: %d bytes\n", 1154 info->buffer_write_tout, 1155 info->buffer_size); 1156 } 1157 1158 puts ("\n Sector Start Addresses:"); 1159 for (i = 0; i < info->sector_count; ++i) { 1160 if ((i % 5) == 0) 1161 printf ("\n"); 1162 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1163 int k; 1164 int size; 1165 int erased; 1166 volatile unsigned long *flash; 1167 1168 /* 1169 * Check if whole sector is erased 1170 */ 1171 size = flash_sector_size(info, i); 1172 erased = 1; 1173 flash = (volatile unsigned long *) info->start[i]; 1174 size = size >> 2; /* divide by 4 for longword access */ 1175 for (k = 0; k < size; k++) { 1176 if (*flash++ != 0xffffffff) { 1177 erased = 0; 1178 break; 1179 } 1180 } 1181 1182 /* print empty and read-only info */ 1183 printf (" %08lX %c %s ", 1184 info->start[i], 1185 erased ? 'E' : ' ', 1186 info->protect[i] ? "RO" : " "); 1187 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1188 printf (" %08lX %s ", 1189 info->start[i], 1190 info->protect[i] ? "RO" : " "); 1191 #endif 1192 } 1193 putc ('\n'); 1194 return; 1195 } 1196 1197 /*----------------------------------------------------------------------- 1198 * This is used in a few places in write_buf() to show programming 1199 * progress. Making it a function is nasty because it needs to do side 1200 * effect updates to digit and dots. Repeated code is nasty too, so 1201 * we define it once here. 1202 */ 1203 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1204 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1205 if (flash_verbose) { \ 1206 dots -= dots_sub; \ 1207 if ((scale > 0) && (dots <= 0)) { \ 1208 if ((digit % 5) == 0) \ 1209 printf ("%d", digit / 5); \ 1210 else \ 1211 putc ('.'); \ 1212 digit--; \ 1213 dots += scale; \ 1214 } \ 1215 } 1216 #else 1217 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1218 #endif 1219 1220 /*----------------------------------------------------------------------- 1221 * Copy memory to flash, returns: 1222 * 0 - OK 1223 * 1 - write timeout 1224 * 2 - Flash not erased 1225 */ 1226 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1227 { 1228 ulong wp; 1229 uchar *p; 1230 int aln; 1231 cfiword_t cword; 1232 int i, rc; 1233 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1234 int buffered_size; 1235 #endif 1236 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1237 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1238 int scale = 0; 1239 int dots = 0; 1240 1241 /* 1242 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1243 */ 1244 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1245 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1246 CONFIG_FLASH_SHOW_PROGRESS); 1247 } 1248 #endif 1249 1250 /* get lower aligned address */ 1251 wp = (addr & ~(info->portwidth - 1)); 1252 1253 /* handle unaligned start */ 1254 if ((aln = addr - wp) != 0) { 1255 cword.l = 0; 1256 p = (uchar *)wp; 1257 for (i = 0; i < aln; ++i) 1258 flash_add_byte (info, &cword, flash_read8(p + i)); 1259 1260 for (; (i < info->portwidth) && (cnt > 0); i++) { 1261 flash_add_byte (info, &cword, *src++); 1262 cnt--; 1263 } 1264 for (; (cnt == 0) && (i < info->portwidth); ++i) 1265 flash_add_byte (info, &cword, flash_read8(p + i)); 1266 1267 rc = flash_write_cfiword (info, wp, cword); 1268 if (rc != 0) 1269 return rc; 1270 1271 wp += i; 1272 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1273 } 1274 1275 /* handle the aligned part */ 1276 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1277 buffered_size = (info->portwidth / info->chipwidth); 1278 buffered_size *= info->buffer_size; 1279 while (cnt >= info->portwidth) { 1280 /* prohibit buffer write when buffer_size is 1 */ 1281 if (info->buffer_size == 1) { 1282 cword.l = 0; 1283 for (i = 0; i < info->portwidth; i++) 1284 flash_add_byte (info, &cword, *src++); 1285 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1286 return rc; 1287 wp += info->portwidth; 1288 cnt -= info->portwidth; 1289 continue; 1290 } 1291 1292 /* write buffer until next buffered_size aligned boundary */ 1293 i = buffered_size - (wp % buffered_size); 1294 if (i > cnt) 1295 i = cnt; 1296 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1297 return rc; 1298 i -= i & (info->portwidth - 1); 1299 wp += i; 1300 src += i; 1301 cnt -= i; 1302 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1303 } 1304 #else 1305 while (cnt >= info->portwidth) { 1306 cword.l = 0; 1307 for (i = 0; i < info->portwidth; i++) { 1308 flash_add_byte (info, &cword, *src++); 1309 } 1310 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1311 return rc; 1312 wp += info->portwidth; 1313 cnt -= info->portwidth; 1314 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1315 } 1316 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1317 1318 if (cnt == 0) { 1319 return (0); 1320 } 1321 1322 /* 1323 * handle unaligned tail bytes 1324 */ 1325 cword.l = 0; 1326 p = (uchar *)wp; 1327 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1328 flash_add_byte (info, &cword, *src++); 1329 --cnt; 1330 } 1331 for (; i < info->portwidth; ++i) 1332 flash_add_byte (info, &cword, flash_read8(p + i)); 1333 1334 return flash_write_cfiword (info, wp, cword); 1335 } 1336 1337 /*----------------------------------------------------------------------- 1338 */ 1339 #ifdef CONFIG_SYS_FLASH_PROTECTION 1340 1341 int flash_real_protect (flash_info_t * info, long sector, int prot) 1342 { 1343 int retcode = 0; 1344 1345 switch (info->vendor) { 1346 case CFI_CMDSET_INTEL_PROG_REGIONS: 1347 case CFI_CMDSET_INTEL_STANDARD: 1348 case CFI_CMDSET_INTEL_EXTENDED: 1349 flash_write_cmd (info, sector, 0, 1350 FLASH_CMD_CLEAR_STATUS); 1351 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1352 if (prot) 1353 flash_write_cmd (info, sector, 0, 1354 FLASH_CMD_PROTECT_SET); 1355 else 1356 flash_write_cmd (info, sector, 0, 1357 FLASH_CMD_PROTECT_CLEAR); 1358 break; 1359 case CFI_CMDSET_AMD_EXTENDED: 1360 case CFI_CMDSET_AMD_STANDARD: 1361 /* U-Boot only checks the first byte */ 1362 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1363 if (prot) { 1364 flash_unlock_seq (info, 0); 1365 flash_write_cmd (info, 0, 1366 info->addr_unlock1, 1367 ATM_CMD_SOFTLOCK_START); 1368 flash_unlock_seq (info, 0); 1369 flash_write_cmd (info, sector, 0, 1370 ATM_CMD_LOCK_SECT); 1371 } else { 1372 flash_write_cmd (info, 0, 1373 info->addr_unlock1, 1374 AMD_CMD_UNLOCK_START); 1375 if (info->device_id == ATM_ID_BV6416) 1376 flash_write_cmd (info, sector, 1377 0, ATM_CMD_UNLOCK_SECT); 1378 } 1379 } 1380 break; 1381 #ifdef CONFIG_FLASH_CFI_LEGACY 1382 case CFI_CMDSET_AMD_LEGACY: 1383 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1384 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1385 if (prot) 1386 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1387 else 1388 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1389 #endif 1390 }; 1391 1392 if ((retcode = 1393 flash_full_status_check (info, sector, info->erase_blk_tout, 1394 prot ? "protect" : "unprotect")) == 0) { 1395 1396 info->protect[sector] = prot; 1397 1398 /* 1399 * On some of Intel's flash chips (marked via legacy_unlock) 1400 * unprotect unprotects all locking. 1401 */ 1402 if ((prot == 0) && (info->legacy_unlock)) { 1403 flash_sect_t i; 1404 1405 for (i = 0; i < info->sector_count; i++) { 1406 if (info->protect[i]) 1407 flash_real_protect (info, i, 1); 1408 } 1409 } 1410 } 1411 return retcode; 1412 } 1413 1414 /*----------------------------------------------------------------------- 1415 * flash_read_user_serial - read the OneTimeProgramming cells 1416 */ 1417 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1418 int len) 1419 { 1420 uchar *src; 1421 uchar *dst; 1422 1423 dst = buffer; 1424 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1425 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1426 memcpy (dst, src + offset, len); 1427 flash_write_cmd (info, 0, 0, info->cmd_reset); 1428 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1429 } 1430 1431 /* 1432 * flash_read_factory_serial - read the device Id from the protection area 1433 */ 1434 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1435 int len) 1436 { 1437 uchar *src; 1438 1439 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1440 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1441 memcpy (buffer, src + offset, len); 1442 flash_write_cmd (info, 0, 0, info->cmd_reset); 1443 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1444 } 1445 1446 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1447 1448 /*----------------------------------------------------------------------- 1449 * Reverse the order of the erase regions in the CFI QRY structure. 1450 * This is needed for chips that are either a) correctly detected as 1451 * top-boot, or b) buggy. 1452 */ 1453 static void cfi_reverse_geometry(struct cfi_qry *qry) 1454 { 1455 unsigned int i, j; 1456 u32 tmp; 1457 1458 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1459 tmp = qry->erase_region_info[i]; 1460 qry->erase_region_info[i] = qry->erase_region_info[j]; 1461 qry->erase_region_info[j] = tmp; 1462 } 1463 } 1464 1465 /*----------------------------------------------------------------------- 1466 * read jedec ids from device and set corresponding fields in info struct 1467 * 1468 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1469 * 1470 */ 1471 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1472 { 1473 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1474 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1475 udelay(1000); /* some flash are slow to respond */ 1476 info->manufacturer_id = flash_read_uchar (info, 1477 FLASH_OFFSET_MANUFACTURER_ID); 1478 info->device_id = flash_read_uchar (info, 1479 FLASH_OFFSET_DEVICE_ID); 1480 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1481 } 1482 1483 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1484 { 1485 info->cmd_reset = FLASH_CMD_RESET; 1486 1487 cmdset_intel_read_jedec_ids(info); 1488 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1489 1490 #ifdef CONFIG_SYS_FLASH_PROTECTION 1491 /* read legacy lock/unlock bit from intel flash */ 1492 if (info->ext_addr) { 1493 info->legacy_unlock = flash_read_uchar (info, 1494 info->ext_addr + 5) & 0x08; 1495 } 1496 #endif 1497 1498 return 0; 1499 } 1500 1501 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1502 { 1503 ushort bankId = 0; 1504 uchar manuId; 1505 1506 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1507 flash_unlock_seq(info, 0); 1508 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1509 udelay(1000); /* some flash are slow to respond */ 1510 1511 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1512 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1513 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1514 bankId += 0x100; 1515 manuId = flash_read_uchar (info, 1516 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1517 } 1518 info->manufacturer_id = manuId; 1519 1520 switch (info->chipwidth){ 1521 case FLASH_CFI_8BIT: 1522 info->device_id = flash_read_uchar (info, 1523 FLASH_OFFSET_DEVICE_ID); 1524 if (info->device_id == 0x7E) { 1525 /* AMD 3-byte (expanded) device ids */ 1526 info->device_id2 = flash_read_uchar (info, 1527 FLASH_OFFSET_DEVICE_ID2); 1528 info->device_id2 <<= 8; 1529 info->device_id2 |= flash_read_uchar (info, 1530 FLASH_OFFSET_DEVICE_ID3); 1531 } 1532 break; 1533 case FLASH_CFI_16BIT: 1534 info->device_id = flash_read_word (info, 1535 FLASH_OFFSET_DEVICE_ID); 1536 break; 1537 default: 1538 break; 1539 } 1540 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1541 } 1542 1543 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1544 { 1545 info->cmd_reset = AMD_CMD_RESET; 1546 1547 cmdset_amd_read_jedec_ids(info); 1548 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1549 1550 return 0; 1551 } 1552 1553 #ifdef CONFIG_FLASH_CFI_LEGACY 1554 static void flash_read_jedec_ids (flash_info_t * info) 1555 { 1556 info->manufacturer_id = 0; 1557 info->device_id = 0; 1558 info->device_id2 = 0; 1559 1560 switch (info->vendor) { 1561 case CFI_CMDSET_INTEL_PROG_REGIONS: 1562 case CFI_CMDSET_INTEL_STANDARD: 1563 case CFI_CMDSET_INTEL_EXTENDED: 1564 cmdset_intel_read_jedec_ids(info); 1565 break; 1566 case CFI_CMDSET_AMD_STANDARD: 1567 case CFI_CMDSET_AMD_EXTENDED: 1568 cmdset_amd_read_jedec_ids(info); 1569 break; 1570 default: 1571 break; 1572 } 1573 } 1574 1575 /*----------------------------------------------------------------------- 1576 * Call board code to request info about non-CFI flash. 1577 * board_flash_get_legacy needs to fill in at least: 1578 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1579 */ 1580 static int flash_detect_legacy(phys_addr_t base, int banknum) 1581 { 1582 flash_info_t *info = &flash_info[banknum]; 1583 1584 if (board_flash_get_legacy(base, banknum, info)) { 1585 /* board code may have filled info completely. If not, we 1586 use JEDEC ID probing. */ 1587 if (!info->vendor) { 1588 int modes[] = { 1589 CFI_CMDSET_AMD_STANDARD, 1590 CFI_CMDSET_INTEL_STANDARD 1591 }; 1592 int i; 1593 1594 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1595 info->vendor = modes[i]; 1596 info->start[0] = 1597 (ulong)map_physmem(base, 1598 info->portwidth, 1599 MAP_NOCACHE); 1600 if (info->portwidth == FLASH_CFI_8BIT 1601 && info->interface == FLASH_CFI_X8X16) { 1602 info->addr_unlock1 = 0x2AAA; 1603 info->addr_unlock2 = 0x5555; 1604 } else { 1605 info->addr_unlock1 = 0x5555; 1606 info->addr_unlock2 = 0x2AAA; 1607 } 1608 flash_read_jedec_ids(info); 1609 debug("JEDEC PROBE: ID %x %x %x\n", 1610 info->manufacturer_id, 1611 info->device_id, 1612 info->device_id2); 1613 if (jedec_flash_match(info, info->start[0])) 1614 break; 1615 else 1616 unmap_physmem((void *)info->start[0], 1617 MAP_NOCACHE); 1618 } 1619 } 1620 1621 switch(info->vendor) { 1622 case CFI_CMDSET_INTEL_PROG_REGIONS: 1623 case CFI_CMDSET_INTEL_STANDARD: 1624 case CFI_CMDSET_INTEL_EXTENDED: 1625 info->cmd_reset = FLASH_CMD_RESET; 1626 break; 1627 case CFI_CMDSET_AMD_STANDARD: 1628 case CFI_CMDSET_AMD_EXTENDED: 1629 case CFI_CMDSET_AMD_LEGACY: 1630 info->cmd_reset = AMD_CMD_RESET; 1631 break; 1632 } 1633 info->flash_id = FLASH_MAN_CFI; 1634 return 1; 1635 } 1636 return 0; /* use CFI */ 1637 } 1638 #else 1639 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1640 { 1641 return 0; /* use CFI */ 1642 } 1643 #endif 1644 1645 /*----------------------------------------------------------------------- 1646 * detect if flash is compatible with the Common Flash Interface (CFI) 1647 * http://www.jedec.org/download/search/jesd68.pdf 1648 */ 1649 static void flash_read_cfi (flash_info_t *info, void *buf, 1650 unsigned int start, size_t len) 1651 { 1652 u8 *p = buf; 1653 unsigned int i; 1654 1655 for (i = 0; i < len; i++) 1656 p[i] = flash_read_uchar(info, start + i); 1657 } 1658 1659 void __flash_cmd_reset(flash_info_t *info) 1660 { 1661 /* 1662 * We do not yet know what kind of commandset to use, so we issue 1663 * the reset command in both Intel and AMD variants, in the hope 1664 * that AMD flash roms ignore the Intel command. 1665 */ 1666 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1667 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1668 } 1669 void flash_cmd_reset(flash_info_t *info) 1670 __attribute__((weak,alias("__flash_cmd_reset"))); 1671 1672 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1673 { 1674 int cfi_offset; 1675 1676 /* Issue FLASH reset command */ 1677 flash_cmd_reset(info); 1678 1679 for (cfi_offset=0; 1680 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1681 cfi_offset++) { 1682 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1683 FLASH_CMD_CFI); 1684 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1685 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1686 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1687 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1688 sizeof(struct cfi_qry)); 1689 info->interface = le16_to_cpu(qry->interface_desc); 1690 1691 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1692 debug ("device interface is %d\n", 1693 info->interface); 1694 debug ("found port %d chip %d ", 1695 info->portwidth, info->chipwidth); 1696 debug ("port %d bits chip %d bits\n", 1697 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1698 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1699 1700 /* calculate command offsets as in the Linux driver */ 1701 info->addr_unlock1 = 0x555; 1702 info->addr_unlock2 = 0x2aa; 1703 1704 /* 1705 * modify the unlock address if we are 1706 * in compatibility mode 1707 */ 1708 if ( /* x8/x16 in x8 mode */ 1709 ((info->chipwidth == FLASH_CFI_BY8) && 1710 (info->interface == FLASH_CFI_X8X16)) || 1711 /* x16/x32 in x16 mode */ 1712 ((info->chipwidth == FLASH_CFI_BY16) && 1713 (info->interface == FLASH_CFI_X16X32))) 1714 { 1715 info->addr_unlock1 = 0xaaa; 1716 info->addr_unlock2 = 0x555; 1717 } 1718 1719 info->name = "CFI conformant"; 1720 return 1; 1721 } 1722 } 1723 1724 return 0; 1725 } 1726 1727 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1728 { 1729 debug ("flash detect cfi\n"); 1730 1731 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1732 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1733 for (info->chipwidth = FLASH_CFI_BY8; 1734 info->chipwidth <= info->portwidth; 1735 info->chipwidth <<= 1) 1736 if (__flash_detect_cfi(info, qry)) 1737 return 1; 1738 } 1739 debug ("not found\n"); 1740 return 0; 1741 } 1742 1743 /* 1744 * Manufacturer-specific quirks. Add workarounds for geometry 1745 * reversal, etc. here. 1746 */ 1747 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1748 { 1749 /* check if flash geometry needs reversal */ 1750 if (qry->num_erase_regions > 1) { 1751 /* reverse geometry if top boot part */ 1752 if (info->cfi_version < 0x3131) { 1753 /* CFI < 1.1, try to guess from device id */ 1754 if ((info->device_id & 0x80) != 0) 1755 cfi_reverse_geometry(qry); 1756 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1757 /* CFI >= 1.1, deduct from top/bottom flag */ 1758 /* note: ext_addr is valid since cfi_version > 0 */ 1759 cfi_reverse_geometry(qry); 1760 } 1761 } 1762 } 1763 1764 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1765 { 1766 int reverse_geometry = 0; 1767 1768 /* Check the "top boot" bit in the PRI */ 1769 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1770 reverse_geometry = 1; 1771 1772 /* AT49BV6416(T) list the erase regions in the wrong order. 1773 * However, the device ID is identical with the non-broken 1774 * AT49BV642D they differ in the high byte. 1775 */ 1776 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1777 reverse_geometry = !reverse_geometry; 1778 1779 if (reverse_geometry) 1780 cfi_reverse_geometry(qry); 1781 } 1782 1783 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1784 { 1785 /* check if flash geometry needs reversal */ 1786 if (qry->num_erase_regions > 1) { 1787 /* reverse geometry if top boot part */ 1788 if (info->cfi_version < 0x3131) { 1789 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ 1790 if (info->device_id == 0x22CA || 1791 info->device_id == 0x2256) { 1792 cfi_reverse_geometry(qry); 1793 } 1794 } 1795 } 1796 } 1797 1798 /* 1799 * The following code cannot be run from FLASH! 1800 * 1801 */ 1802 ulong flash_get_size (phys_addr_t base, int banknum) 1803 { 1804 flash_info_t *info = &flash_info[banknum]; 1805 int i, j; 1806 flash_sect_t sect_cnt; 1807 phys_addr_t sector; 1808 unsigned long tmp; 1809 int size_ratio; 1810 uchar num_erase_regions; 1811 int erase_region_size; 1812 int erase_region_count; 1813 struct cfi_qry qry; 1814 1815 memset(&qry, 0, sizeof(qry)); 1816 1817 info->ext_addr = 0; 1818 info->cfi_version = 0; 1819 #ifdef CONFIG_SYS_FLASH_PROTECTION 1820 info->legacy_unlock = 0; 1821 #endif 1822 1823 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1824 1825 if (flash_detect_cfi (info, &qry)) { 1826 info->vendor = le16_to_cpu(qry.p_id); 1827 info->ext_addr = le16_to_cpu(qry.p_adr); 1828 num_erase_regions = qry.num_erase_regions; 1829 1830 if (info->ext_addr) { 1831 info->cfi_version = (ushort) flash_read_uchar (info, 1832 info->ext_addr + 3) << 8; 1833 info->cfi_version |= (ushort) flash_read_uchar (info, 1834 info->ext_addr + 4); 1835 } 1836 1837 #ifdef DEBUG 1838 flash_printqry (&qry); 1839 #endif 1840 1841 switch (info->vendor) { 1842 case CFI_CMDSET_INTEL_PROG_REGIONS: 1843 case CFI_CMDSET_INTEL_STANDARD: 1844 case CFI_CMDSET_INTEL_EXTENDED: 1845 cmdset_intel_init(info, &qry); 1846 break; 1847 case CFI_CMDSET_AMD_STANDARD: 1848 case CFI_CMDSET_AMD_EXTENDED: 1849 cmdset_amd_init(info, &qry); 1850 break; 1851 default: 1852 printf("CFI: Unknown command set 0x%x\n", 1853 info->vendor); 1854 /* 1855 * Unfortunately, this means we don't know how 1856 * to get the chip back to Read mode. Might 1857 * as well try an Intel-style reset... 1858 */ 1859 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1860 return 0; 1861 } 1862 1863 /* Do manufacturer-specific fixups */ 1864 switch (info->manufacturer_id) { 1865 case 0x0001: 1866 flash_fixup_amd(info, &qry); 1867 break; 1868 case 0x001f: 1869 flash_fixup_atmel(info, &qry); 1870 break; 1871 case 0x0020: 1872 flash_fixup_stm(info, &qry); 1873 break; 1874 } 1875 1876 debug ("manufacturer is %d\n", info->vendor); 1877 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1878 debug ("device id is 0x%x\n", info->device_id); 1879 debug ("device id2 is 0x%x\n", info->device_id2); 1880 debug ("cfi version is 0x%04x\n", info->cfi_version); 1881 1882 size_ratio = info->portwidth / info->chipwidth; 1883 /* if the chip is x8/x16 reduce the ratio by half */ 1884 if ((info->interface == FLASH_CFI_X8X16) 1885 && (info->chipwidth == FLASH_CFI_BY8)) { 1886 size_ratio >>= 1; 1887 } 1888 debug ("size_ratio %d port %d bits chip %d bits\n", 1889 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1890 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1891 debug ("found %d erase regions\n", num_erase_regions); 1892 sect_cnt = 0; 1893 sector = base; 1894 for (i = 0; i < num_erase_regions; i++) { 1895 if (i > NUM_ERASE_REGIONS) { 1896 printf ("%d erase regions found, only %d used\n", 1897 num_erase_regions, NUM_ERASE_REGIONS); 1898 break; 1899 } 1900 1901 tmp = le32_to_cpu(qry.erase_region_info[i]); 1902 debug("erase region %u: 0x%08lx\n", i, tmp); 1903 1904 erase_region_count = (tmp & 0xffff) + 1; 1905 tmp >>= 16; 1906 erase_region_size = 1907 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1908 debug ("erase_region_count = %d erase_region_size = %d\n", 1909 erase_region_count, erase_region_size); 1910 for (j = 0; j < erase_region_count; j++) { 1911 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1912 printf("ERROR: too many flash sectors\n"); 1913 break; 1914 } 1915 info->start[sect_cnt] = 1916 (ulong)map_physmem(sector, 1917 info->portwidth, 1918 MAP_NOCACHE); 1919 sector += (erase_region_size * size_ratio); 1920 1921 /* 1922 * Only read protection status from 1923 * supported devices (intel...) 1924 */ 1925 switch (info->vendor) { 1926 case CFI_CMDSET_INTEL_PROG_REGIONS: 1927 case CFI_CMDSET_INTEL_EXTENDED: 1928 case CFI_CMDSET_INTEL_STANDARD: 1929 info->protect[sect_cnt] = 1930 flash_isset (info, sect_cnt, 1931 FLASH_OFFSET_PROTECT, 1932 FLASH_STATUS_PROTECT); 1933 break; 1934 default: 1935 /* default: not protected */ 1936 info->protect[sect_cnt] = 0; 1937 } 1938 1939 sect_cnt++; 1940 } 1941 } 1942 1943 info->sector_count = sect_cnt; 1944 info->size = 1 << qry.dev_size; 1945 /* multiply the size by the number of chips */ 1946 info->size *= size_ratio; 1947 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1948 tmp = 1 << qry.block_erase_timeout_typ; 1949 info->erase_blk_tout = tmp * 1950 (1 << qry.block_erase_timeout_max); 1951 tmp = (1 << qry.buf_write_timeout_typ) * 1952 (1 << qry.buf_write_timeout_max); 1953 1954 /* round up when converting to ms */ 1955 info->buffer_write_tout = (tmp + 999) / 1000; 1956 tmp = (1 << qry.word_write_timeout_typ) * 1957 (1 << qry.word_write_timeout_max); 1958 /* round up when converting to ms */ 1959 info->write_tout = (tmp + 999) / 1000; 1960 info->flash_id = FLASH_MAN_CFI; 1961 if ((info->interface == FLASH_CFI_X8X16) && 1962 (info->chipwidth == FLASH_CFI_BY8)) { 1963 /* XXX - Need to test on x8/x16 in parallel. */ 1964 info->portwidth >>= 1; 1965 } 1966 1967 flash_write_cmd (info, 0, 0, info->cmd_reset); 1968 } 1969 1970 return (info->size); 1971 } 1972 1973 void flash_set_verbose(uint v) 1974 { 1975 flash_verbose = v; 1976 } 1977 1978 /*----------------------------------------------------------------------- 1979 */ 1980 unsigned long flash_init (void) 1981 { 1982 unsigned long size = 0; 1983 int i; 1984 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 1985 struct apl_s { 1986 ulong start; 1987 ulong size; 1988 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 1989 #endif 1990 1991 #ifdef CONFIG_SYS_FLASH_PROTECTION 1992 /* read environment from EEPROM */ 1993 char s[64]; 1994 getenv_r ("unlock", s, sizeof(s)); 1995 #endif 1996 1997 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 1998 1999 /* Init: no FLASHes known */ 2000 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 2001 flash_info[i].flash_id = FLASH_UNKNOWN; 2002 2003 if (!flash_detect_legacy (BANK_BASE(i), i)) 2004 flash_get_size (BANK_BASE(i), i); 2005 size += flash_info[i].size; 2006 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2007 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2008 printf ("## Unknown FLASH on Bank %d " 2009 "- Size = 0x%08lx = %ld MB\n", 2010 i+1, flash_info[i].size, 2011 flash_info[i].size << 20); 2012 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2013 } 2014 #ifdef CONFIG_SYS_FLASH_PROTECTION 2015 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 2016 /* 2017 * Only the U-Boot image and it's environment 2018 * is protected, all other sectors are 2019 * unprotected (unlocked) if flash hardware 2020 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2021 * and the environment variable "unlock" is 2022 * set to "yes". 2023 */ 2024 if (flash_info[i].legacy_unlock) { 2025 int k; 2026 2027 /* 2028 * Disable legacy_unlock temporarily, 2029 * since flash_real_protect would 2030 * relock all other sectors again 2031 * otherwise. 2032 */ 2033 flash_info[i].legacy_unlock = 0; 2034 2035 /* 2036 * Legacy unlocking (e.g. Intel J3) -> 2037 * unlock only one sector. This will 2038 * unlock all sectors. 2039 */ 2040 flash_real_protect (&flash_info[i], 0, 0); 2041 2042 flash_info[i].legacy_unlock = 1; 2043 2044 /* 2045 * Manually mark other sectors as 2046 * unlocked (unprotected) 2047 */ 2048 for (k = 1; k < flash_info[i].sector_count; k++) 2049 flash_info[i].protect[k] = 0; 2050 } else { 2051 /* 2052 * No legancy unlocking -> unlock all sectors 2053 */ 2054 flash_protect (FLAG_PROTECT_CLEAR, 2055 flash_info[i].start[0], 2056 flash_info[i].start[0] 2057 + flash_info[i].size - 1, 2058 &flash_info[i]); 2059 } 2060 } 2061 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2062 } 2063 2064 /* Monitor protection ON by default */ 2065 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \ 2066 (!defined(CONFIG_MONITOR_IS_IN_RAM)) 2067 flash_protect (FLAG_PROTECT_SET, 2068 CONFIG_SYS_MONITOR_BASE, 2069 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2070 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2071 #endif 2072 2073 /* Environment protection ON by default */ 2074 #ifdef CONFIG_ENV_IS_IN_FLASH 2075 flash_protect (FLAG_PROTECT_SET, 2076 CONFIG_ENV_ADDR, 2077 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2078 flash_get_info(CONFIG_ENV_ADDR)); 2079 #endif 2080 2081 /* Redundant environment protection ON by default */ 2082 #ifdef CONFIG_ENV_ADDR_REDUND 2083 flash_protect (FLAG_PROTECT_SET, 2084 CONFIG_ENV_ADDR_REDUND, 2085 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2086 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2087 #endif 2088 2089 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2090 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2091 debug("autoprotecting from %08x to %08x\n", 2092 apl[i].start, apl[i].start + apl[i].size - 1); 2093 flash_protect (FLAG_PROTECT_SET, 2094 apl[i].start, 2095 apl[i].start + apl[i].size - 1, 2096 flash_get_info(apl[i].start)); 2097 } 2098 #endif 2099 2100 #ifdef CONFIG_FLASH_CFI_MTD 2101 cfi_mtd_init(); 2102 #endif 2103 2104 return (size); 2105 } 2106