1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 43 /* 44 * This file implements a Common Flash Interface (CFI) driver for 45 * U-Boot. 46 * 47 * The width of the port and the width of the chips are determined at 48 * initialization. These widths are used to calculate the address for 49 * access CFI data structures. 50 * 51 * References 52 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 56 * AMD CFI Specification, Release 2.0 December 1, 2001 57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 59 * 60 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 61 * reading and writing ... (yes there is such a Hardware). 62 */ 63 64 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 66 #endif 67 68 #define FLASH_CMD_CFI 0x98 69 #define FLASH_CMD_READ_ID 0x90 70 #define FLASH_CMD_RESET 0xff 71 #define FLASH_CMD_BLOCK_ERASE 0x20 72 #define FLASH_CMD_ERASE_CONFIRM 0xD0 73 #define FLASH_CMD_WRITE 0x40 74 #define FLASH_CMD_PROTECT 0x60 75 #define FLASH_CMD_PROTECT_SET 0x01 76 #define FLASH_CMD_PROTECT_CLEAR 0xD0 77 #define FLASH_CMD_CLEAR_STATUS 0x50 78 #define FLASH_CMD_READ_STATUS 0x70 79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9 81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 82 83 #define FLASH_STATUS_DONE 0x80 84 #define FLASH_STATUS_ESS 0x40 85 #define FLASH_STATUS_ECLBS 0x20 86 #define FLASH_STATUS_PSLBS 0x10 87 #define FLASH_STATUS_VPENS 0x08 88 #define FLASH_STATUS_PSS 0x04 89 #define FLASH_STATUS_DPS 0x02 90 #define FLASH_STATUS_R 0x01 91 #define FLASH_STATUS_PROTECT 0x01 92 93 #define AMD_CMD_RESET 0xF0 94 #define AMD_CMD_WRITE 0xA0 95 #define AMD_CMD_ERASE_START 0x80 96 #define AMD_CMD_ERASE_SECTOR 0x30 97 #define AMD_CMD_UNLOCK_START 0xAA 98 #define AMD_CMD_UNLOCK_ACK 0x55 99 #define AMD_CMD_WRITE_TO_BUFFER 0x25 100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 101 102 #define AMD_STATUS_TOGGLE 0x40 103 #define AMD_STATUS_ERROR 0x20 104 105 #define ATM_CMD_UNLOCK_SECT 0x70 106 #define ATM_CMD_SOFTLOCK_START 0x80 107 #define ATM_CMD_LOCK_SECT 0x40 108 109 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 110 #define FLASH_OFFSET_DEVICE_ID 0x01 111 #define FLASH_OFFSET_DEVICE_ID2 0x0E 112 #define FLASH_OFFSET_DEVICE_ID3 0x0F 113 #define FLASH_OFFSET_CFI 0x55 114 #define FLASH_OFFSET_CFI_ALT 0x555 115 #define FLASH_OFFSET_CFI_RESP 0x10 116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 117 /* extended query table primary address */ 118 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 119 #define FLASH_OFFSET_WTOUT 0x1F 120 #define FLASH_OFFSET_WBTOUT 0x20 121 #define FLASH_OFFSET_ETOUT 0x21 122 #define FLASH_OFFSET_CETOUT 0x22 123 #define FLASH_OFFSET_WMAX_TOUT 0x23 124 #define FLASH_OFFSET_WBMAX_TOUT 0x24 125 #define FLASH_OFFSET_EMAX_TOUT 0x25 126 #define FLASH_OFFSET_CEMAX_TOUT 0x26 127 #define FLASH_OFFSET_SIZE 0x27 128 #define FLASH_OFFSET_INTERFACE 0x28 129 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 130 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 131 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 132 #define FLASH_OFFSET_PROTECT 0x02 133 #define FLASH_OFFSET_USER_PROTECTION 0x85 134 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 135 136 #define CFI_CMDSET_NONE 0 137 #define CFI_CMDSET_INTEL_EXTENDED 1 138 #define CFI_CMDSET_AMD_STANDARD 2 139 #define CFI_CMDSET_INTEL_STANDARD 3 140 #define CFI_CMDSET_AMD_EXTENDED 4 141 #define CFI_CMDSET_MITSU_STANDARD 256 142 #define CFI_CMDSET_MITSU_EXTENDED 257 143 #define CFI_CMDSET_SST 258 144 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 145 146 #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 147 # undef FLASH_CMD_RESET 148 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 149 #endif 150 151 typedef union { 152 unsigned char c; 153 unsigned short w; 154 unsigned long l; 155 unsigned long long ll; 156 } cfiword_t; 157 158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 159 160 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 161 static uint flash_verbose = 1; 162 163 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 164 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 165 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 166 #else 167 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 168 #endif 169 170 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 171 172 /* 173 * Check if chip width is defined. If not, start detecting with 8bit. 174 */ 175 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 176 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 177 #endif 178 179 /* CFI standard query structure */ 180 struct cfi_qry { 181 u8 qry[3]; 182 u16 p_id; 183 u16 p_adr; 184 u16 a_id; 185 u16 a_adr; 186 u8 vcc_min; 187 u8 vcc_max; 188 u8 vpp_min; 189 u8 vpp_max; 190 u8 word_write_timeout_typ; 191 u8 buf_write_timeout_typ; 192 u8 block_erase_timeout_typ; 193 u8 chip_erase_timeout_typ; 194 u8 word_write_timeout_max; 195 u8 buf_write_timeout_max; 196 u8 block_erase_timeout_max; 197 u8 chip_erase_timeout_max; 198 u8 dev_size; 199 u16 interface_desc; 200 u16 max_buf_write_size; 201 u8 num_erase_regions; 202 u32 erase_region_info[NUM_ERASE_REGIONS]; 203 } __attribute__((packed)); 204 205 struct cfi_pri_hdr { 206 u8 pri[3]; 207 u8 major_version; 208 u8 minor_version; 209 } __attribute__((packed)); 210 211 static void __flash_write8(u8 value, void *addr) 212 { 213 __raw_writeb(value, addr); 214 } 215 216 static void __flash_write16(u16 value, void *addr) 217 { 218 __raw_writew(value, addr); 219 } 220 221 static void __flash_write32(u32 value, void *addr) 222 { 223 __raw_writel(value, addr); 224 } 225 226 static void __flash_write64(u64 value, void *addr) 227 { 228 /* No architectures currently implement __raw_writeq() */ 229 *(volatile u64 *)addr = value; 230 } 231 232 static u8 __flash_read8(void *addr) 233 { 234 return __raw_readb(addr); 235 } 236 237 static u16 __flash_read16(void *addr) 238 { 239 return __raw_readw(addr); 240 } 241 242 static u32 __flash_read32(void *addr) 243 { 244 return __raw_readl(addr); 245 } 246 247 static u64 __flash_read64(void *addr) 248 { 249 /* No architectures currently implement __raw_readq() */ 250 return *(volatile u64 *)addr; 251 } 252 253 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 254 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 255 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 256 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 257 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 258 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 259 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 260 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 261 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 262 #else 263 #define flash_write8 __flash_write8 264 #define flash_write16 __flash_write16 265 #define flash_write32 __flash_write32 266 #define flash_write64 __flash_write64 267 #define flash_read8 __flash_read8 268 #define flash_read16 __flash_read16 269 #define flash_read32 __flash_read32 270 #define flash_read64 __flash_read64 271 #endif 272 273 /*----------------------------------------------------------------------- 274 */ 275 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 276 static flash_info_t *flash_get_info(ulong base) 277 { 278 int i; 279 flash_info_t * info = 0; 280 281 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 282 info = & flash_info[i]; 283 if (info->size && info->start[0] <= base && 284 base <= info->start[0] + info->size - 1) 285 break; 286 } 287 288 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 289 } 290 #endif 291 292 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 293 { 294 if (sect != (info->sector_count - 1)) 295 return info->start[sect + 1] - info->start[sect]; 296 else 297 return info->start[0] + info->size - info->start[sect]; 298 } 299 300 /*----------------------------------------------------------------------- 301 * create an address based on the offset and the port width 302 */ 303 static inline void * 304 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 305 { 306 unsigned int byte_offset = offset * info->portwidth; 307 308 return map_physmem(info->start[sect] + byte_offset, 309 flash_sector_size(info, sect) - byte_offset, 310 MAP_NOCACHE); 311 } 312 313 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 314 unsigned int offset, void *addr) 315 { 316 unsigned int byte_offset = offset * info->portwidth; 317 318 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset); 319 } 320 321 /*----------------------------------------------------------------------- 322 * make a proper sized command based on the port and chip widths 323 */ 324 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 325 { 326 int i; 327 int cword_offset; 328 int cp_offset; 329 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 330 u32 cmd_le = cpu_to_le32(cmd); 331 #endif 332 uchar val; 333 uchar *cp = (uchar *) cmdbuf; 334 335 for (i = info->portwidth; i > 0; i--){ 336 cword_offset = (info->portwidth-i)%info->chipwidth; 337 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 338 cp_offset = info->portwidth - i; 339 val = *((uchar*)&cmd_le + cword_offset); 340 #else 341 cp_offset = i - 1; 342 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 343 #endif 344 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 345 } 346 } 347 348 #ifdef DEBUG 349 /*----------------------------------------------------------------------- 350 * Debug support 351 */ 352 static void print_longlong (char *str, unsigned long long data) 353 { 354 int i; 355 char *cp; 356 357 cp = (unsigned char *) &data; 358 for (i = 0; i < 8; i++) 359 sprintf (&str[i * 2], "%2.2x", *cp++); 360 } 361 362 static void flash_printqry (struct cfi_qry *qry) 363 { 364 u8 *p = (u8 *)qry; 365 int x, y; 366 367 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 368 debug("%02x : ", x); 369 for (y = 0; y < 16; y++) 370 debug("%2.2x ", p[x + y]); 371 debug(" "); 372 for (y = 0; y < 16; y++) { 373 unsigned char c = p[x + y]; 374 if (c >= 0x20 && c <= 0x7e) 375 debug("%c", c); 376 else 377 debug("."); 378 } 379 debug("\n"); 380 } 381 } 382 #endif 383 384 385 /*----------------------------------------------------------------------- 386 * read a character at a port width address 387 */ 388 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 389 { 390 uchar *cp; 391 uchar retval; 392 393 cp = flash_map (info, 0, offset); 394 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 395 retval = flash_read8(cp); 396 #else 397 retval = flash_read8(cp + info->portwidth - 1); 398 #endif 399 flash_unmap (info, 0, offset, cp); 400 return retval; 401 } 402 403 /*----------------------------------------------------------------------- 404 * read a word at a port width address, assume 16bit bus 405 */ 406 static inline ushort flash_read_word (flash_info_t * info, uint offset) 407 { 408 ushort *addr, retval; 409 410 addr = flash_map (info, 0, offset); 411 retval = flash_read16 (addr); 412 flash_unmap (info, 0, offset, addr); 413 return retval; 414 } 415 416 417 /*----------------------------------------------------------------------- 418 * read a long word by picking the least significant byte of each maximum 419 * port size word. Swap for ppc format. 420 */ 421 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 422 uint offset) 423 { 424 uchar *addr; 425 ulong retval; 426 427 #ifdef DEBUG 428 int x; 429 #endif 430 addr = flash_map (info, sect, offset); 431 432 #ifdef DEBUG 433 debug ("long addr is at %p info->portwidth = %d\n", addr, 434 info->portwidth); 435 for (x = 0; x < 4 * info->portwidth; x++) { 436 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 437 } 438 #endif 439 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 440 retval = ((flash_read8(addr) << 16) | 441 (flash_read8(addr + info->portwidth) << 24) | 442 (flash_read8(addr + 2 * info->portwidth)) | 443 (flash_read8(addr + 3 * info->portwidth) << 8)); 444 #else 445 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 446 (flash_read8(addr + info->portwidth - 1) << 16) | 447 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 448 (flash_read8(addr + 3 * info->portwidth - 1))); 449 #endif 450 flash_unmap(info, sect, offset, addr); 451 452 return retval; 453 } 454 455 /* 456 * Write a proper sized command to the correct address 457 */ 458 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 459 uint offset, u32 cmd) 460 { 461 462 void *addr; 463 cfiword_t cword; 464 465 addr = flash_map (info, sect, offset); 466 flash_make_cmd (info, cmd, &cword); 467 switch (info->portwidth) { 468 case FLASH_CFI_8BIT: 469 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 470 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 471 flash_write8(cword.c, addr); 472 break; 473 case FLASH_CFI_16BIT: 474 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 475 cmd, cword.w, 476 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 477 flash_write16(cword.w, addr); 478 break; 479 case FLASH_CFI_32BIT: 480 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 481 cmd, cword.l, 482 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 483 flash_write32(cword.l, addr); 484 break; 485 case FLASH_CFI_64BIT: 486 #ifdef DEBUG 487 { 488 char str[20]; 489 490 print_longlong (str, cword.ll); 491 492 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 493 addr, cmd, str, 494 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 495 } 496 #endif 497 flash_write64(cword.ll, addr); 498 break; 499 } 500 501 /* Ensure all the instructions are fully finished */ 502 sync(); 503 504 flash_unmap(info, sect, offset, addr); 505 } 506 507 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 508 { 509 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 510 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 511 } 512 513 /*----------------------------------------------------------------------- 514 */ 515 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 516 uint offset, uchar cmd) 517 { 518 void *addr; 519 cfiword_t cword; 520 int retval; 521 522 addr = flash_map (info, sect, offset); 523 flash_make_cmd (info, cmd, &cword); 524 525 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 526 switch (info->portwidth) { 527 case FLASH_CFI_8BIT: 528 debug ("is= %x %x\n", flash_read8(addr), cword.c); 529 retval = (flash_read8(addr) == cword.c); 530 break; 531 case FLASH_CFI_16BIT: 532 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 533 retval = (flash_read16(addr) == cword.w); 534 break; 535 case FLASH_CFI_32BIT: 536 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 537 retval = (flash_read32(addr) == cword.l); 538 break; 539 case FLASH_CFI_64BIT: 540 #ifdef DEBUG 541 { 542 char str1[20]; 543 char str2[20]; 544 545 print_longlong (str1, flash_read64(addr)); 546 print_longlong (str2, cword.ll); 547 debug ("is= %s %s\n", str1, str2); 548 } 549 #endif 550 retval = (flash_read64(addr) == cword.ll); 551 break; 552 default: 553 retval = 0; 554 break; 555 } 556 flash_unmap(info, sect, offset, addr); 557 558 return retval; 559 } 560 561 /*----------------------------------------------------------------------- 562 */ 563 static int flash_isset (flash_info_t * info, flash_sect_t sect, 564 uint offset, uchar cmd) 565 { 566 void *addr; 567 cfiword_t cword; 568 int retval; 569 570 addr = flash_map (info, sect, offset); 571 flash_make_cmd (info, cmd, &cword); 572 switch (info->portwidth) { 573 case FLASH_CFI_8BIT: 574 retval = ((flash_read8(addr) & cword.c) == cword.c); 575 break; 576 case FLASH_CFI_16BIT: 577 retval = ((flash_read16(addr) & cword.w) == cword.w); 578 break; 579 case FLASH_CFI_32BIT: 580 retval = ((flash_read32(addr) & cword.l) == cword.l); 581 break; 582 case FLASH_CFI_64BIT: 583 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 584 break; 585 default: 586 retval = 0; 587 break; 588 } 589 flash_unmap(info, sect, offset, addr); 590 591 return retval; 592 } 593 594 /*----------------------------------------------------------------------- 595 */ 596 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 597 uint offset, uchar cmd) 598 { 599 void *addr; 600 cfiword_t cword; 601 int retval; 602 603 addr = flash_map (info, sect, offset); 604 flash_make_cmd (info, cmd, &cword); 605 switch (info->portwidth) { 606 case FLASH_CFI_8BIT: 607 retval = flash_read8(addr) != flash_read8(addr); 608 break; 609 case FLASH_CFI_16BIT: 610 retval = flash_read16(addr) != flash_read16(addr); 611 break; 612 case FLASH_CFI_32BIT: 613 retval = flash_read32(addr) != flash_read32(addr); 614 break; 615 case FLASH_CFI_64BIT: 616 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 617 (flash_read32(addr+4) != flash_read32(addr+4)) ); 618 break; 619 default: 620 retval = 0; 621 break; 622 } 623 flash_unmap(info, sect, offset, addr); 624 625 return retval; 626 } 627 628 /* 629 * flash_is_busy - check to see if the flash is busy 630 * 631 * This routine checks the status of the chip and returns true if the 632 * chip is busy. 633 */ 634 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 635 { 636 int retval; 637 638 switch (info->vendor) { 639 case CFI_CMDSET_INTEL_PROG_REGIONS: 640 case CFI_CMDSET_INTEL_STANDARD: 641 case CFI_CMDSET_INTEL_EXTENDED: 642 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 643 break; 644 case CFI_CMDSET_AMD_STANDARD: 645 case CFI_CMDSET_AMD_EXTENDED: 646 #ifdef CONFIG_FLASH_CFI_LEGACY 647 case CFI_CMDSET_AMD_LEGACY: 648 #endif 649 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 650 break; 651 default: 652 retval = 0; 653 } 654 debug ("flash_is_busy: %d\n", retval); 655 return retval; 656 } 657 658 /*----------------------------------------------------------------------- 659 * wait for XSR.7 to be set. Time out with an error if it does not. 660 * This routine does not set the flash to read-array mode. 661 */ 662 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 663 ulong tout, char *prompt) 664 { 665 ulong start; 666 667 #if CONFIG_SYS_HZ != 1000 668 tout *= CONFIG_SYS_HZ/1000; 669 #endif 670 671 /* Wait for command completion */ 672 start = get_timer (0); 673 while (flash_is_busy (info, sector)) { 674 if (get_timer (start) > tout) { 675 printf ("Flash %s timeout at address %lx data %lx\n", 676 prompt, info->start[sector], 677 flash_read_long (info, sector, 0)); 678 flash_write_cmd (info, sector, 0, info->cmd_reset); 679 return ERR_TIMOUT; 680 } 681 udelay (1); /* also triggers watchdog */ 682 } 683 return ERR_OK; 684 } 685 686 /*----------------------------------------------------------------------- 687 * Wait for XSR.7 to be set, if it times out print an error, otherwise 688 * do a full status check. 689 * 690 * This routine sets the flash to read-array mode. 691 */ 692 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 693 ulong tout, char *prompt) 694 { 695 int retcode; 696 697 retcode = flash_status_check (info, sector, tout, prompt); 698 switch (info->vendor) { 699 case CFI_CMDSET_INTEL_PROG_REGIONS: 700 case CFI_CMDSET_INTEL_EXTENDED: 701 case CFI_CMDSET_INTEL_STANDARD: 702 if ((retcode != ERR_OK) 703 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 704 retcode = ERR_INVAL; 705 printf ("Flash %s error at address %lx\n", prompt, 706 info->start[sector]); 707 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 708 FLASH_STATUS_PSLBS)) { 709 puts ("Command Sequence Error.\n"); 710 } else if (flash_isset (info, sector, 0, 711 FLASH_STATUS_ECLBS)) { 712 puts ("Block Erase Error.\n"); 713 retcode = ERR_NOT_ERASED; 714 } else if (flash_isset (info, sector, 0, 715 FLASH_STATUS_PSLBS)) { 716 puts ("Locking Error\n"); 717 } 718 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 719 puts ("Block locked.\n"); 720 retcode = ERR_PROTECTED; 721 } 722 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 723 puts ("Vpp Low Error.\n"); 724 } 725 flash_write_cmd (info, sector, 0, info->cmd_reset); 726 break; 727 default: 728 break; 729 } 730 return retcode; 731 } 732 733 /*----------------------------------------------------------------------- 734 */ 735 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 736 { 737 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 738 unsigned short w; 739 unsigned int l; 740 unsigned long long ll; 741 #endif 742 743 switch (info->portwidth) { 744 case FLASH_CFI_8BIT: 745 cword->c = c; 746 break; 747 case FLASH_CFI_16BIT: 748 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 749 w = c; 750 w <<= 8; 751 cword->w = (cword->w >> 8) | w; 752 #else 753 cword->w = (cword->w << 8) | c; 754 #endif 755 break; 756 case FLASH_CFI_32BIT: 757 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 758 l = c; 759 l <<= 24; 760 cword->l = (cword->l >> 8) | l; 761 #else 762 cword->l = (cword->l << 8) | c; 763 #endif 764 break; 765 case FLASH_CFI_64BIT: 766 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 767 ll = c; 768 ll <<= 56; 769 cword->ll = (cword->ll >> 8) | ll; 770 #else 771 cword->ll = (cword->ll << 8) | c; 772 #endif 773 break; 774 } 775 } 776 777 /* loop through the sectors from the highest address when the passed 778 * address is greater or equal to the sector address we have a match 779 */ 780 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 781 { 782 flash_sect_t sector; 783 784 for (sector = info->sector_count - 1; sector >= 0; sector--) { 785 if (addr >= info->start[sector]) 786 break; 787 } 788 return sector; 789 } 790 791 /*----------------------------------------------------------------------- 792 */ 793 static int flash_write_cfiword (flash_info_t * info, ulong dest, 794 cfiword_t cword) 795 { 796 void *dstaddr; 797 int flag; 798 flash_sect_t sect = 0; 799 char sect_found = 0; 800 801 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE); 802 803 /* Check if Flash is (sufficiently) erased */ 804 switch (info->portwidth) { 805 case FLASH_CFI_8BIT: 806 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 807 break; 808 case FLASH_CFI_16BIT: 809 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 810 break; 811 case FLASH_CFI_32BIT: 812 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 813 break; 814 case FLASH_CFI_64BIT: 815 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 816 break; 817 default: 818 flag = 0; 819 break; 820 } 821 if (!flag) { 822 unmap_physmem(dstaddr, info->portwidth); 823 return ERR_NOT_ERASED; 824 } 825 826 /* Disable interrupts which might cause a timeout here */ 827 flag = disable_interrupts (); 828 829 switch (info->vendor) { 830 case CFI_CMDSET_INTEL_PROG_REGIONS: 831 case CFI_CMDSET_INTEL_EXTENDED: 832 case CFI_CMDSET_INTEL_STANDARD: 833 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 834 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 835 break; 836 case CFI_CMDSET_AMD_EXTENDED: 837 case CFI_CMDSET_AMD_STANDARD: 838 #ifdef CONFIG_FLASH_CFI_LEGACY 839 case CFI_CMDSET_AMD_LEGACY: 840 #endif 841 sect = find_sector(info, dest); 842 flash_unlock_seq (info, sect); 843 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 844 sect_found = 1; 845 break; 846 } 847 848 switch (info->portwidth) { 849 case FLASH_CFI_8BIT: 850 flash_write8(cword.c, dstaddr); 851 break; 852 case FLASH_CFI_16BIT: 853 flash_write16(cword.w, dstaddr); 854 break; 855 case FLASH_CFI_32BIT: 856 flash_write32(cword.l, dstaddr); 857 break; 858 case FLASH_CFI_64BIT: 859 flash_write64(cword.ll, dstaddr); 860 break; 861 } 862 863 /* re-enable interrupts if necessary */ 864 if (flag) 865 enable_interrupts (); 866 867 unmap_physmem(dstaddr, info->portwidth); 868 869 if (!sect_found) 870 sect = find_sector (info, dest); 871 872 return flash_full_status_check (info, sect, info->write_tout, "write"); 873 } 874 875 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 876 877 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 878 int len) 879 { 880 flash_sect_t sector; 881 int cnt; 882 int retcode; 883 void *src = cp; 884 void *dst = map_physmem(dest, len, MAP_NOCACHE); 885 void *dst2 = dst; 886 int flag = 0; 887 uint offset = 0; 888 unsigned int shift; 889 uchar write_cmd; 890 891 switch (info->portwidth) { 892 case FLASH_CFI_8BIT: 893 shift = 0; 894 break; 895 case FLASH_CFI_16BIT: 896 shift = 1; 897 break; 898 case FLASH_CFI_32BIT: 899 shift = 2; 900 break; 901 case FLASH_CFI_64BIT: 902 shift = 3; 903 break; 904 default: 905 retcode = ERR_INVAL; 906 goto out_unmap; 907 } 908 909 cnt = len >> shift; 910 911 while ((cnt-- > 0) && (flag == 0)) { 912 switch (info->portwidth) { 913 case FLASH_CFI_8BIT: 914 flag = ((flash_read8(dst2) & flash_read8(src)) == 915 flash_read8(src)); 916 src += 1, dst2 += 1; 917 break; 918 case FLASH_CFI_16BIT: 919 flag = ((flash_read16(dst2) & flash_read16(src)) == 920 flash_read16(src)); 921 src += 2, dst2 += 2; 922 break; 923 case FLASH_CFI_32BIT: 924 flag = ((flash_read32(dst2) & flash_read32(src)) == 925 flash_read32(src)); 926 src += 4, dst2 += 4; 927 break; 928 case FLASH_CFI_64BIT: 929 flag = ((flash_read64(dst2) & flash_read64(src)) == 930 flash_read64(src)); 931 src += 8, dst2 += 8; 932 break; 933 } 934 } 935 if (!flag) { 936 retcode = ERR_NOT_ERASED; 937 goto out_unmap; 938 } 939 940 src = cp; 941 sector = find_sector (info, dest); 942 943 switch (info->vendor) { 944 case CFI_CMDSET_INTEL_PROG_REGIONS: 945 case CFI_CMDSET_INTEL_STANDARD: 946 case CFI_CMDSET_INTEL_EXTENDED: 947 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 948 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 949 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 950 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 951 flash_write_cmd (info, sector, 0, write_cmd); 952 retcode = flash_status_check (info, sector, 953 info->buffer_write_tout, 954 "write to buffer"); 955 if (retcode == ERR_OK) { 956 /* reduce the number of loops by the width of 957 * the port */ 958 cnt = len >> shift; 959 flash_write_cmd (info, sector, 0, cnt - 1); 960 while (cnt-- > 0) { 961 switch (info->portwidth) { 962 case FLASH_CFI_8BIT: 963 flash_write8(flash_read8(src), dst); 964 src += 1, dst += 1; 965 break; 966 case FLASH_CFI_16BIT: 967 flash_write16(flash_read16(src), dst); 968 src += 2, dst += 2; 969 break; 970 case FLASH_CFI_32BIT: 971 flash_write32(flash_read32(src), dst); 972 src += 4, dst += 4; 973 break; 974 case FLASH_CFI_64BIT: 975 flash_write64(flash_read64(src), dst); 976 src += 8, dst += 8; 977 break; 978 default: 979 retcode = ERR_INVAL; 980 goto out_unmap; 981 } 982 } 983 flash_write_cmd (info, sector, 0, 984 FLASH_CMD_WRITE_BUFFER_CONFIRM); 985 retcode = flash_full_status_check ( 986 info, sector, info->buffer_write_tout, 987 "buffer write"); 988 } 989 990 break; 991 992 case CFI_CMDSET_AMD_STANDARD: 993 case CFI_CMDSET_AMD_EXTENDED: 994 flash_unlock_seq(info,0); 995 996 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 997 offset = ((unsigned long)dst - info->start[sector]) >> shift; 998 #endif 999 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 1000 cnt = len >> shift; 1001 flash_write_cmd(info, sector, offset, (uchar)cnt - 1); 1002 1003 switch (info->portwidth) { 1004 case FLASH_CFI_8BIT: 1005 while (cnt-- > 0) { 1006 flash_write8(flash_read8(src), dst); 1007 src += 1, dst += 1; 1008 } 1009 break; 1010 case FLASH_CFI_16BIT: 1011 while (cnt-- > 0) { 1012 flash_write16(flash_read16(src), dst); 1013 src += 2, dst += 2; 1014 } 1015 break; 1016 case FLASH_CFI_32BIT: 1017 while (cnt-- > 0) { 1018 flash_write32(flash_read32(src), dst); 1019 src += 4, dst += 4; 1020 } 1021 break; 1022 case FLASH_CFI_64BIT: 1023 while (cnt-- > 0) { 1024 flash_write64(flash_read64(src), dst); 1025 src += 8, dst += 8; 1026 } 1027 break; 1028 default: 1029 retcode = ERR_INVAL; 1030 goto out_unmap; 1031 } 1032 1033 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1034 retcode = flash_full_status_check (info, sector, 1035 info->buffer_write_tout, 1036 "buffer write"); 1037 break; 1038 1039 default: 1040 debug ("Unknown Command Set\n"); 1041 retcode = ERR_INVAL; 1042 break; 1043 } 1044 1045 out_unmap: 1046 unmap_physmem(dst, len); 1047 return retcode; 1048 } 1049 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1050 1051 1052 /*----------------------------------------------------------------------- 1053 */ 1054 int flash_erase (flash_info_t * info, int s_first, int s_last) 1055 { 1056 int rcode = 0; 1057 int prot; 1058 flash_sect_t sect; 1059 1060 if (info->flash_id != FLASH_MAN_CFI) { 1061 puts ("Can't erase unknown flash type - aborted\n"); 1062 return 1; 1063 } 1064 if ((s_first < 0) || (s_first > s_last)) { 1065 puts ("- no sectors to erase\n"); 1066 return 1; 1067 } 1068 1069 prot = 0; 1070 for (sect = s_first; sect <= s_last; ++sect) { 1071 if (info->protect[sect]) { 1072 prot++; 1073 } 1074 } 1075 if (prot) { 1076 printf ("- Warning: %d protected sectors will not be erased!\n", 1077 prot); 1078 } else if (flash_verbose) { 1079 putc ('\n'); 1080 } 1081 1082 1083 for (sect = s_first; sect <= s_last; sect++) { 1084 if (info->protect[sect] == 0) { /* not protected */ 1085 switch (info->vendor) { 1086 case CFI_CMDSET_INTEL_PROG_REGIONS: 1087 case CFI_CMDSET_INTEL_STANDARD: 1088 case CFI_CMDSET_INTEL_EXTENDED: 1089 flash_write_cmd (info, sect, 0, 1090 FLASH_CMD_CLEAR_STATUS); 1091 flash_write_cmd (info, sect, 0, 1092 FLASH_CMD_BLOCK_ERASE); 1093 flash_write_cmd (info, sect, 0, 1094 FLASH_CMD_ERASE_CONFIRM); 1095 break; 1096 case CFI_CMDSET_AMD_STANDARD: 1097 case CFI_CMDSET_AMD_EXTENDED: 1098 flash_unlock_seq (info, sect); 1099 flash_write_cmd (info, sect, 1100 info->addr_unlock1, 1101 AMD_CMD_ERASE_START); 1102 flash_unlock_seq (info, sect); 1103 flash_write_cmd (info, sect, 0, 1104 AMD_CMD_ERASE_SECTOR); 1105 break; 1106 #ifdef CONFIG_FLASH_CFI_LEGACY 1107 case CFI_CMDSET_AMD_LEGACY: 1108 flash_unlock_seq (info, 0); 1109 flash_write_cmd (info, 0, info->addr_unlock1, 1110 AMD_CMD_ERASE_START); 1111 flash_unlock_seq (info, 0); 1112 flash_write_cmd (info, sect, 0, 1113 AMD_CMD_ERASE_SECTOR); 1114 break; 1115 #endif 1116 default: 1117 debug ("Unkown flash vendor %d\n", 1118 info->vendor); 1119 break; 1120 } 1121 1122 if (flash_full_status_check 1123 (info, sect, info->erase_blk_tout, "erase")) { 1124 rcode = 1; 1125 } else if (flash_verbose) 1126 putc ('.'); 1127 } 1128 } 1129 1130 if (flash_verbose) 1131 puts (" done\n"); 1132 1133 return rcode; 1134 } 1135 1136 /*----------------------------------------------------------------------- 1137 */ 1138 void flash_print_info (flash_info_t * info) 1139 { 1140 int i; 1141 1142 if (info->flash_id != FLASH_MAN_CFI) { 1143 puts ("missing or unknown FLASH type\n"); 1144 return; 1145 } 1146 1147 printf ("%s FLASH (%d x %d)", 1148 info->name, 1149 (info->portwidth << 3), (info->chipwidth << 3)); 1150 if (info->size < 1024*1024) 1151 printf (" Size: %ld kB in %d Sectors\n", 1152 info->size >> 10, info->sector_count); 1153 else 1154 printf (" Size: %ld MB in %d Sectors\n", 1155 info->size >> 20, info->sector_count); 1156 printf (" "); 1157 switch (info->vendor) { 1158 case CFI_CMDSET_INTEL_PROG_REGIONS: 1159 printf ("Intel Prog Regions"); 1160 break; 1161 case CFI_CMDSET_INTEL_STANDARD: 1162 printf ("Intel Standard"); 1163 break; 1164 case CFI_CMDSET_INTEL_EXTENDED: 1165 printf ("Intel Extended"); 1166 break; 1167 case CFI_CMDSET_AMD_STANDARD: 1168 printf ("AMD Standard"); 1169 break; 1170 case CFI_CMDSET_AMD_EXTENDED: 1171 printf ("AMD Extended"); 1172 break; 1173 #ifdef CONFIG_FLASH_CFI_LEGACY 1174 case CFI_CMDSET_AMD_LEGACY: 1175 printf ("AMD Legacy"); 1176 break; 1177 #endif 1178 default: 1179 printf ("Unknown (%d)", info->vendor); 1180 break; 1181 } 1182 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1183 info->manufacturer_id, info->device_id); 1184 if (info->device_id == 0x7E) { 1185 printf("%04X", info->device_id2); 1186 } 1187 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1188 info->erase_blk_tout, 1189 info->write_tout); 1190 if (info->buffer_size > 1) { 1191 printf (" Buffer write timeout: %ld ms, " 1192 "buffer size: %d bytes\n", 1193 info->buffer_write_tout, 1194 info->buffer_size); 1195 } 1196 1197 puts ("\n Sector Start Addresses:"); 1198 for (i = 0; i < info->sector_count; ++i) { 1199 if ((i % 5) == 0) 1200 printf ("\n"); 1201 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1202 int k; 1203 int size; 1204 int erased; 1205 volatile unsigned long *flash; 1206 1207 /* 1208 * Check if whole sector is erased 1209 */ 1210 size = flash_sector_size(info, i); 1211 erased = 1; 1212 flash = (volatile unsigned long *) info->start[i]; 1213 size = size >> 2; /* divide by 4 for longword access */ 1214 for (k = 0; k < size; k++) { 1215 if (*flash++ != 0xffffffff) { 1216 erased = 0; 1217 break; 1218 } 1219 } 1220 1221 /* print empty and read-only info */ 1222 printf (" %08lX %c %s ", 1223 info->start[i], 1224 erased ? 'E' : ' ', 1225 info->protect[i] ? "RO" : " "); 1226 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1227 printf (" %08lX %s ", 1228 info->start[i], 1229 info->protect[i] ? "RO" : " "); 1230 #endif 1231 } 1232 putc ('\n'); 1233 return; 1234 } 1235 1236 /*----------------------------------------------------------------------- 1237 * This is used in a few places in write_buf() to show programming 1238 * progress. Making it a function is nasty because it needs to do side 1239 * effect updates to digit and dots. Repeated code is nasty too, so 1240 * we define it once here. 1241 */ 1242 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1243 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1244 if (flash_verbose) { \ 1245 dots -= dots_sub; \ 1246 if ((scale > 0) && (dots <= 0)) { \ 1247 if ((digit % 5) == 0) \ 1248 printf ("%d", digit / 5); \ 1249 else \ 1250 putc ('.'); \ 1251 digit--; \ 1252 dots += scale; \ 1253 } \ 1254 } 1255 #else 1256 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1257 #endif 1258 1259 /*----------------------------------------------------------------------- 1260 * Copy memory to flash, returns: 1261 * 0 - OK 1262 * 1 - write timeout 1263 * 2 - Flash not erased 1264 */ 1265 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1266 { 1267 ulong wp; 1268 uchar *p; 1269 int aln; 1270 cfiword_t cword; 1271 int i, rc; 1272 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1273 int buffered_size; 1274 #endif 1275 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1276 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1277 int scale = 0; 1278 int dots = 0; 1279 1280 /* 1281 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1282 */ 1283 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1284 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1285 CONFIG_FLASH_SHOW_PROGRESS); 1286 } 1287 #endif 1288 1289 /* get lower aligned address */ 1290 wp = (addr & ~(info->portwidth - 1)); 1291 1292 /* handle unaligned start */ 1293 if ((aln = addr - wp) != 0) { 1294 cword.l = 0; 1295 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1296 for (i = 0; i < aln; ++i) 1297 flash_add_byte (info, &cword, flash_read8(p + i)); 1298 1299 for (; (i < info->portwidth) && (cnt > 0); i++) { 1300 flash_add_byte (info, &cword, *src++); 1301 cnt--; 1302 } 1303 for (; (cnt == 0) && (i < info->portwidth); ++i) 1304 flash_add_byte (info, &cword, flash_read8(p + i)); 1305 1306 rc = flash_write_cfiword (info, wp, cword); 1307 unmap_physmem(p, info->portwidth); 1308 if (rc != 0) 1309 return rc; 1310 1311 wp += i; 1312 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1313 } 1314 1315 /* handle the aligned part */ 1316 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1317 buffered_size = (info->portwidth / info->chipwidth); 1318 buffered_size *= info->buffer_size; 1319 while (cnt >= info->portwidth) { 1320 /* prohibit buffer write when buffer_size is 1 */ 1321 if (info->buffer_size == 1) { 1322 cword.l = 0; 1323 for (i = 0; i < info->portwidth; i++) 1324 flash_add_byte (info, &cword, *src++); 1325 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1326 return rc; 1327 wp += info->portwidth; 1328 cnt -= info->portwidth; 1329 continue; 1330 } 1331 1332 /* write buffer until next buffered_size aligned boundary */ 1333 i = buffered_size - (wp % buffered_size); 1334 if (i > cnt) 1335 i = cnt; 1336 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1337 return rc; 1338 i -= i & (info->portwidth - 1); 1339 wp += i; 1340 src += i; 1341 cnt -= i; 1342 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1343 } 1344 #else 1345 while (cnt >= info->portwidth) { 1346 cword.l = 0; 1347 for (i = 0; i < info->portwidth; i++) { 1348 flash_add_byte (info, &cword, *src++); 1349 } 1350 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1351 return rc; 1352 wp += info->portwidth; 1353 cnt -= info->portwidth; 1354 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1355 } 1356 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1357 1358 if (cnt == 0) { 1359 return (0); 1360 } 1361 1362 /* 1363 * handle unaligned tail bytes 1364 */ 1365 cword.l = 0; 1366 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1367 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1368 flash_add_byte (info, &cword, *src++); 1369 --cnt; 1370 } 1371 for (; i < info->portwidth; ++i) 1372 flash_add_byte (info, &cword, flash_read8(p + i)); 1373 unmap_physmem(p, info->portwidth); 1374 1375 return flash_write_cfiword (info, wp, cword); 1376 } 1377 1378 /*----------------------------------------------------------------------- 1379 */ 1380 #ifdef CONFIG_SYS_FLASH_PROTECTION 1381 1382 int flash_real_protect (flash_info_t * info, long sector, int prot) 1383 { 1384 int retcode = 0; 1385 1386 switch (info->vendor) { 1387 case CFI_CMDSET_INTEL_PROG_REGIONS: 1388 case CFI_CMDSET_INTEL_STANDARD: 1389 case CFI_CMDSET_INTEL_EXTENDED: 1390 flash_write_cmd (info, sector, 0, 1391 FLASH_CMD_CLEAR_STATUS); 1392 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1393 if (prot) 1394 flash_write_cmd (info, sector, 0, 1395 FLASH_CMD_PROTECT_SET); 1396 else 1397 flash_write_cmd (info, sector, 0, 1398 FLASH_CMD_PROTECT_CLEAR); 1399 break; 1400 case CFI_CMDSET_AMD_EXTENDED: 1401 case CFI_CMDSET_AMD_STANDARD: 1402 /* U-Boot only checks the first byte */ 1403 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1404 if (prot) { 1405 flash_unlock_seq (info, 0); 1406 flash_write_cmd (info, 0, 1407 info->addr_unlock1, 1408 ATM_CMD_SOFTLOCK_START); 1409 flash_unlock_seq (info, 0); 1410 flash_write_cmd (info, sector, 0, 1411 ATM_CMD_LOCK_SECT); 1412 } else { 1413 flash_write_cmd (info, 0, 1414 info->addr_unlock1, 1415 AMD_CMD_UNLOCK_START); 1416 if (info->device_id == ATM_ID_BV6416) 1417 flash_write_cmd (info, sector, 1418 0, ATM_CMD_UNLOCK_SECT); 1419 } 1420 } 1421 break; 1422 #ifdef CONFIG_FLASH_CFI_LEGACY 1423 case CFI_CMDSET_AMD_LEGACY: 1424 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1425 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1426 if (prot) 1427 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1428 else 1429 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1430 #endif 1431 }; 1432 1433 if ((retcode = 1434 flash_full_status_check (info, sector, info->erase_blk_tout, 1435 prot ? "protect" : "unprotect")) == 0) { 1436 1437 info->protect[sector] = prot; 1438 1439 /* 1440 * On some of Intel's flash chips (marked via legacy_unlock) 1441 * unprotect unprotects all locking. 1442 */ 1443 if ((prot == 0) && (info->legacy_unlock)) { 1444 flash_sect_t i; 1445 1446 for (i = 0; i < info->sector_count; i++) { 1447 if (info->protect[i]) 1448 flash_real_protect (info, i, 1); 1449 } 1450 } 1451 } 1452 return retcode; 1453 } 1454 1455 /*----------------------------------------------------------------------- 1456 * flash_read_user_serial - read the OneTimeProgramming cells 1457 */ 1458 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1459 int len) 1460 { 1461 uchar *src; 1462 uchar *dst; 1463 1464 dst = buffer; 1465 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1466 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1467 memcpy (dst, src + offset, len); 1468 flash_write_cmd (info, 0, 0, info->cmd_reset); 1469 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1470 } 1471 1472 /* 1473 * flash_read_factory_serial - read the device Id from the protection area 1474 */ 1475 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1476 int len) 1477 { 1478 uchar *src; 1479 1480 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1481 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1482 memcpy (buffer, src + offset, len); 1483 flash_write_cmd (info, 0, 0, info->cmd_reset); 1484 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1485 } 1486 1487 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1488 1489 /*----------------------------------------------------------------------- 1490 * Reverse the order of the erase regions in the CFI QRY structure. 1491 * This is needed for chips that are either a) correctly detected as 1492 * top-boot, or b) buggy. 1493 */ 1494 static void cfi_reverse_geometry(struct cfi_qry *qry) 1495 { 1496 unsigned int i, j; 1497 u32 tmp; 1498 1499 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1500 tmp = qry->erase_region_info[i]; 1501 qry->erase_region_info[i] = qry->erase_region_info[j]; 1502 qry->erase_region_info[j] = tmp; 1503 } 1504 } 1505 1506 /*----------------------------------------------------------------------- 1507 * read jedec ids from device and set corresponding fields in info struct 1508 * 1509 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1510 * 1511 */ 1512 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1513 { 1514 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1515 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1516 udelay(1000); /* some flash are slow to respond */ 1517 info->manufacturer_id = flash_read_uchar (info, 1518 FLASH_OFFSET_MANUFACTURER_ID); 1519 info->device_id = flash_read_uchar (info, 1520 FLASH_OFFSET_DEVICE_ID); 1521 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1522 } 1523 1524 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1525 { 1526 info->cmd_reset = FLASH_CMD_RESET; 1527 1528 cmdset_intel_read_jedec_ids(info); 1529 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1530 1531 #ifdef CONFIG_SYS_FLASH_PROTECTION 1532 /* read legacy lock/unlock bit from intel flash */ 1533 if (info->ext_addr) { 1534 info->legacy_unlock = flash_read_uchar (info, 1535 info->ext_addr + 5) & 0x08; 1536 } 1537 #endif 1538 1539 return 0; 1540 } 1541 1542 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1543 { 1544 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1545 flash_unlock_seq(info, 0); 1546 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1547 udelay(1000); /* some flash are slow to respond */ 1548 1549 info->manufacturer_id = flash_read_uchar (info, 1550 FLASH_OFFSET_MANUFACTURER_ID); 1551 1552 switch (info->chipwidth){ 1553 case FLASH_CFI_8BIT: 1554 info->device_id = flash_read_uchar (info, 1555 FLASH_OFFSET_DEVICE_ID); 1556 if (info->device_id == 0x7E) { 1557 /* AMD 3-byte (expanded) device ids */ 1558 info->device_id2 = flash_read_uchar (info, 1559 FLASH_OFFSET_DEVICE_ID2); 1560 info->device_id2 <<= 8; 1561 info->device_id2 |= flash_read_uchar (info, 1562 FLASH_OFFSET_DEVICE_ID3); 1563 } 1564 break; 1565 case FLASH_CFI_16BIT: 1566 info->device_id = flash_read_word (info, 1567 FLASH_OFFSET_DEVICE_ID); 1568 break; 1569 default: 1570 break; 1571 } 1572 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1573 } 1574 1575 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1576 { 1577 info->cmd_reset = AMD_CMD_RESET; 1578 1579 cmdset_amd_read_jedec_ids(info); 1580 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1581 1582 return 0; 1583 } 1584 1585 #ifdef CONFIG_FLASH_CFI_LEGACY 1586 static void flash_read_jedec_ids (flash_info_t * info) 1587 { 1588 info->manufacturer_id = 0; 1589 info->device_id = 0; 1590 info->device_id2 = 0; 1591 1592 switch (info->vendor) { 1593 case CFI_CMDSET_INTEL_PROG_REGIONS: 1594 case CFI_CMDSET_INTEL_STANDARD: 1595 case CFI_CMDSET_INTEL_EXTENDED: 1596 cmdset_intel_read_jedec_ids(info); 1597 break; 1598 case CFI_CMDSET_AMD_STANDARD: 1599 case CFI_CMDSET_AMD_EXTENDED: 1600 cmdset_amd_read_jedec_ids(info); 1601 break; 1602 default: 1603 break; 1604 } 1605 } 1606 1607 /*----------------------------------------------------------------------- 1608 * Call board code to request info about non-CFI flash. 1609 * board_flash_get_legacy needs to fill in at least: 1610 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1611 */ 1612 static int flash_detect_legacy(ulong base, int banknum) 1613 { 1614 flash_info_t *info = &flash_info[banknum]; 1615 1616 if (board_flash_get_legacy(base, banknum, info)) { 1617 /* board code may have filled info completely. If not, we 1618 use JEDEC ID probing. */ 1619 if (!info->vendor) { 1620 int modes[] = { 1621 CFI_CMDSET_AMD_STANDARD, 1622 CFI_CMDSET_INTEL_STANDARD 1623 }; 1624 int i; 1625 1626 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1627 info->vendor = modes[i]; 1628 info->start[0] = base; 1629 if (info->portwidth == FLASH_CFI_8BIT 1630 && info->interface == FLASH_CFI_X8X16) { 1631 info->addr_unlock1 = 0x2AAA; 1632 info->addr_unlock2 = 0x5555; 1633 } else { 1634 info->addr_unlock1 = 0x5555; 1635 info->addr_unlock2 = 0x2AAA; 1636 } 1637 flash_read_jedec_ids(info); 1638 debug("JEDEC PROBE: ID %x %x %x\n", 1639 info->manufacturer_id, 1640 info->device_id, 1641 info->device_id2); 1642 if (jedec_flash_match(info, base)) 1643 break; 1644 } 1645 } 1646 1647 switch(info->vendor) { 1648 case CFI_CMDSET_INTEL_PROG_REGIONS: 1649 case CFI_CMDSET_INTEL_STANDARD: 1650 case CFI_CMDSET_INTEL_EXTENDED: 1651 info->cmd_reset = FLASH_CMD_RESET; 1652 break; 1653 case CFI_CMDSET_AMD_STANDARD: 1654 case CFI_CMDSET_AMD_EXTENDED: 1655 case CFI_CMDSET_AMD_LEGACY: 1656 info->cmd_reset = AMD_CMD_RESET; 1657 break; 1658 } 1659 info->flash_id = FLASH_MAN_CFI; 1660 return 1; 1661 } 1662 return 0; /* use CFI */ 1663 } 1664 #else 1665 static inline int flash_detect_legacy(ulong base, int banknum) 1666 { 1667 return 0; /* use CFI */ 1668 } 1669 #endif 1670 1671 /*----------------------------------------------------------------------- 1672 * detect if flash is compatible with the Common Flash Interface (CFI) 1673 * http://www.jedec.org/download/search/jesd68.pdf 1674 */ 1675 static void flash_read_cfi (flash_info_t *info, void *buf, 1676 unsigned int start, size_t len) 1677 { 1678 u8 *p = buf; 1679 unsigned int i; 1680 1681 for (i = 0; i < len; i++) 1682 p[i] = flash_read_uchar(info, start + i); 1683 } 1684 1685 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1686 { 1687 int cfi_offset; 1688 1689 /* We do not yet know what kind of commandset to use, so we issue 1690 the reset command in both Intel and AMD variants, in the hope 1691 that AMD flash roms ignore the Intel command. */ 1692 flash_write_cmd (info, 0, 0, AMD_CMD_RESET); 1693 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); 1694 1695 for (cfi_offset=0; 1696 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1697 cfi_offset++) { 1698 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1699 FLASH_CMD_CFI); 1700 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1701 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1702 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1703 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1704 sizeof(struct cfi_qry)); 1705 info->interface = le16_to_cpu(qry->interface_desc); 1706 1707 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1708 debug ("device interface is %d\n", 1709 info->interface); 1710 debug ("found port %d chip %d ", 1711 info->portwidth, info->chipwidth); 1712 debug ("port %d bits chip %d bits\n", 1713 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1714 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1715 1716 /* calculate command offsets as in the Linux driver */ 1717 info->addr_unlock1 = 0x555; 1718 info->addr_unlock2 = 0x2aa; 1719 1720 /* 1721 * modify the unlock address if we are 1722 * in compatibility mode 1723 */ 1724 if ( /* x8/x16 in x8 mode */ 1725 ((info->chipwidth == FLASH_CFI_BY8) && 1726 (info->interface == FLASH_CFI_X8X16)) || 1727 /* x16/x32 in x16 mode */ 1728 ((info->chipwidth == FLASH_CFI_BY16) && 1729 (info->interface == FLASH_CFI_X16X32))) 1730 { 1731 info->addr_unlock1 = 0xaaa; 1732 info->addr_unlock2 = 0x555; 1733 } 1734 1735 info->name = "CFI conformant"; 1736 return 1; 1737 } 1738 } 1739 1740 return 0; 1741 } 1742 1743 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1744 { 1745 debug ("flash detect cfi\n"); 1746 1747 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1748 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1749 for (info->chipwidth = FLASH_CFI_BY8; 1750 info->chipwidth <= info->portwidth; 1751 info->chipwidth <<= 1) 1752 if (__flash_detect_cfi(info, qry)) 1753 return 1; 1754 } 1755 debug ("not found\n"); 1756 return 0; 1757 } 1758 1759 /* 1760 * Manufacturer-specific quirks. Add workarounds for geometry 1761 * reversal, etc. here. 1762 */ 1763 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1764 { 1765 /* check if flash geometry needs reversal */ 1766 if (qry->num_erase_regions > 1) { 1767 /* reverse geometry if top boot part */ 1768 if (info->cfi_version < 0x3131) { 1769 /* CFI < 1.1, try to guess from device id */ 1770 if ((info->device_id & 0x80) != 0) 1771 cfi_reverse_geometry(qry); 1772 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1773 /* CFI >= 1.1, deduct from top/bottom flag */ 1774 /* note: ext_addr is valid since cfi_version > 0 */ 1775 cfi_reverse_geometry(qry); 1776 } 1777 } 1778 } 1779 1780 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1781 { 1782 int reverse_geometry = 0; 1783 1784 /* Check the "top boot" bit in the PRI */ 1785 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1786 reverse_geometry = 1; 1787 1788 /* AT49BV6416(T) list the erase regions in the wrong order. 1789 * However, the device ID is identical with the non-broken 1790 * AT49BV642D since u-boot only reads the low byte (they 1791 * differ in the high byte.) So leave out this fixup for now. 1792 */ 1793 #if 0 1794 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1795 reverse_geometry = !reverse_geometry; 1796 #endif 1797 1798 if (reverse_geometry) 1799 cfi_reverse_geometry(qry); 1800 } 1801 1802 /* 1803 * The following code cannot be run from FLASH! 1804 * 1805 */ 1806 ulong flash_get_size (ulong base, int banknum) 1807 { 1808 flash_info_t *info = &flash_info[banknum]; 1809 int i, j; 1810 flash_sect_t sect_cnt; 1811 unsigned long sector; 1812 unsigned long tmp; 1813 int size_ratio; 1814 uchar num_erase_regions; 1815 int erase_region_size; 1816 int erase_region_count; 1817 struct cfi_qry qry; 1818 1819 memset(&qry, 0, sizeof(qry)); 1820 1821 info->ext_addr = 0; 1822 info->cfi_version = 0; 1823 #ifdef CONFIG_SYS_FLASH_PROTECTION 1824 info->legacy_unlock = 0; 1825 #endif 1826 1827 info->start[0] = base; 1828 1829 if (flash_detect_cfi (info, &qry)) { 1830 info->vendor = le16_to_cpu(qry.p_id); 1831 info->ext_addr = le16_to_cpu(qry.p_adr); 1832 num_erase_regions = qry.num_erase_regions; 1833 1834 if (info->ext_addr) { 1835 info->cfi_version = (ushort) flash_read_uchar (info, 1836 info->ext_addr + 3) << 8; 1837 info->cfi_version |= (ushort) flash_read_uchar (info, 1838 info->ext_addr + 4); 1839 } 1840 1841 #ifdef DEBUG 1842 flash_printqry (&qry); 1843 #endif 1844 1845 switch (info->vendor) { 1846 case CFI_CMDSET_INTEL_PROG_REGIONS: 1847 case CFI_CMDSET_INTEL_STANDARD: 1848 case CFI_CMDSET_INTEL_EXTENDED: 1849 cmdset_intel_init(info, &qry); 1850 break; 1851 case CFI_CMDSET_AMD_STANDARD: 1852 case CFI_CMDSET_AMD_EXTENDED: 1853 cmdset_amd_init(info, &qry); 1854 break; 1855 default: 1856 printf("CFI: Unknown command set 0x%x\n", 1857 info->vendor); 1858 /* 1859 * Unfortunately, this means we don't know how 1860 * to get the chip back to Read mode. Might 1861 * as well try an Intel-style reset... 1862 */ 1863 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1864 return 0; 1865 } 1866 1867 /* Do manufacturer-specific fixups */ 1868 switch (info->manufacturer_id) { 1869 case 0x0001: 1870 flash_fixup_amd(info, &qry); 1871 break; 1872 case 0x001f: 1873 flash_fixup_atmel(info, &qry); 1874 break; 1875 } 1876 1877 debug ("manufacturer is %d\n", info->vendor); 1878 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1879 debug ("device id is 0x%x\n", info->device_id); 1880 debug ("device id2 is 0x%x\n", info->device_id2); 1881 debug ("cfi version is 0x%04x\n", info->cfi_version); 1882 1883 size_ratio = info->portwidth / info->chipwidth; 1884 /* if the chip is x8/x16 reduce the ratio by half */ 1885 if ((info->interface == FLASH_CFI_X8X16) 1886 && (info->chipwidth == FLASH_CFI_BY8)) { 1887 size_ratio >>= 1; 1888 } 1889 debug ("size_ratio %d port %d bits chip %d bits\n", 1890 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1891 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1892 debug ("found %d erase regions\n", num_erase_regions); 1893 sect_cnt = 0; 1894 sector = base; 1895 for (i = 0; i < num_erase_regions; i++) { 1896 if (i > NUM_ERASE_REGIONS) { 1897 printf ("%d erase regions found, only %d used\n", 1898 num_erase_regions, NUM_ERASE_REGIONS); 1899 break; 1900 } 1901 1902 tmp = le32_to_cpu(qry.erase_region_info[i]); 1903 debug("erase region %u: 0x%08lx\n", i, tmp); 1904 1905 erase_region_count = (tmp & 0xffff) + 1; 1906 tmp >>= 16; 1907 erase_region_size = 1908 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1909 debug ("erase_region_count = %d erase_region_size = %d\n", 1910 erase_region_count, erase_region_size); 1911 for (j = 0; j < erase_region_count; j++) { 1912 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1913 printf("ERROR: too many flash sectors\n"); 1914 break; 1915 } 1916 info->start[sect_cnt] = sector; 1917 sector += (erase_region_size * size_ratio); 1918 1919 /* 1920 * Only read protection status from 1921 * supported devices (intel...) 1922 */ 1923 switch (info->vendor) { 1924 case CFI_CMDSET_INTEL_PROG_REGIONS: 1925 case CFI_CMDSET_INTEL_EXTENDED: 1926 case CFI_CMDSET_INTEL_STANDARD: 1927 info->protect[sect_cnt] = 1928 flash_isset (info, sect_cnt, 1929 FLASH_OFFSET_PROTECT, 1930 FLASH_STATUS_PROTECT); 1931 break; 1932 default: 1933 /* default: not protected */ 1934 info->protect[sect_cnt] = 0; 1935 } 1936 1937 sect_cnt++; 1938 } 1939 } 1940 1941 info->sector_count = sect_cnt; 1942 info->size = 1 << qry.dev_size; 1943 /* multiply the size by the number of chips */ 1944 info->size *= size_ratio; 1945 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1946 tmp = 1 << qry.block_erase_timeout_typ; 1947 info->erase_blk_tout = tmp * 1948 (1 << qry.block_erase_timeout_max); 1949 tmp = (1 << qry.buf_write_timeout_typ) * 1950 (1 << qry.buf_write_timeout_max); 1951 1952 /* round up when converting to ms */ 1953 info->buffer_write_tout = (tmp + 999) / 1000; 1954 tmp = (1 << qry.word_write_timeout_typ) * 1955 (1 << qry.word_write_timeout_max); 1956 /* round up when converting to ms */ 1957 info->write_tout = (tmp + 999) / 1000; 1958 info->flash_id = FLASH_MAN_CFI; 1959 if ((info->interface == FLASH_CFI_X8X16) && 1960 (info->chipwidth == FLASH_CFI_BY8)) { 1961 /* XXX - Need to test on x8/x16 in parallel. */ 1962 info->portwidth >>= 1; 1963 } 1964 1965 flash_write_cmd (info, 0, 0, info->cmd_reset); 1966 } 1967 1968 return (info->size); 1969 } 1970 1971 void flash_set_verbose(uint v) 1972 { 1973 flash_verbose = v; 1974 } 1975 1976 /*----------------------------------------------------------------------- 1977 */ 1978 unsigned long flash_init (void) 1979 { 1980 unsigned long size = 0; 1981 int i; 1982 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 1983 struct apl_s { 1984 ulong start; 1985 ulong size; 1986 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 1987 #endif 1988 1989 #ifdef CONFIG_SYS_FLASH_PROTECTION 1990 char *s = getenv("unlock"); 1991 #endif 1992 1993 #define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 1994 1995 /* Init: no FLASHes known */ 1996 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 1997 flash_info[i].flash_id = FLASH_UNKNOWN; 1998 1999 if (!flash_detect_legacy (BANK_BASE(i), i)) 2000 flash_get_size (BANK_BASE(i), i); 2001 size += flash_info[i].size; 2002 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2003 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2004 printf ("## Unknown FLASH on Bank %d " 2005 "- Size = 0x%08lx = %ld MB\n", 2006 i+1, flash_info[i].size, 2007 flash_info[i].size << 20); 2008 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2009 } 2010 #ifdef CONFIG_SYS_FLASH_PROTECTION 2011 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 2012 /* 2013 * Only the U-Boot image and it's environment 2014 * is protected, all other sectors are 2015 * unprotected (unlocked) if flash hardware 2016 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2017 * and the environment variable "unlock" is 2018 * set to "yes". 2019 */ 2020 if (flash_info[i].legacy_unlock) { 2021 int k; 2022 2023 /* 2024 * Disable legacy_unlock temporarily, 2025 * since flash_real_protect would 2026 * relock all other sectors again 2027 * otherwise. 2028 */ 2029 flash_info[i].legacy_unlock = 0; 2030 2031 /* 2032 * Legacy unlocking (e.g. Intel J3) -> 2033 * unlock only one sector. This will 2034 * unlock all sectors. 2035 */ 2036 flash_real_protect (&flash_info[i], 0, 0); 2037 2038 flash_info[i].legacy_unlock = 1; 2039 2040 /* 2041 * Manually mark other sectors as 2042 * unlocked (unprotected) 2043 */ 2044 for (k = 1; k < flash_info[i].sector_count; k++) 2045 flash_info[i].protect[k] = 0; 2046 } else { 2047 /* 2048 * No legancy unlocking -> unlock all sectors 2049 */ 2050 flash_protect (FLAG_PROTECT_CLEAR, 2051 flash_info[i].start[0], 2052 flash_info[i].start[0] 2053 + flash_info[i].size - 1, 2054 &flash_info[i]); 2055 } 2056 } 2057 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2058 } 2059 2060 /* Monitor protection ON by default */ 2061 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 2062 flash_protect (FLAG_PROTECT_SET, 2063 CONFIG_SYS_MONITOR_BASE, 2064 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2065 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2066 #endif 2067 2068 /* Environment protection ON by default */ 2069 #ifdef CONFIG_ENV_IS_IN_FLASH 2070 flash_protect (FLAG_PROTECT_SET, 2071 CONFIG_ENV_ADDR, 2072 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2073 flash_get_info(CONFIG_ENV_ADDR)); 2074 #endif 2075 2076 /* Redundant environment protection ON by default */ 2077 #ifdef CONFIG_ENV_ADDR_REDUND 2078 flash_protect (FLAG_PROTECT_SET, 2079 CONFIG_ENV_ADDR_REDUND, 2080 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1, 2081 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2082 #endif 2083 2084 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2085 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2086 debug("autoprotecting from %08x to %08x\n", 2087 apl[i].start, apl[i].start + apl[i].size - 1); 2088 flash_protect (FLAG_PROTECT_SET, 2089 apl[i].start, 2090 apl[i].start + apl[i].size - 1, 2091 flash_get_info(apl[i].start)); 2092 } 2093 #endif 2094 2095 #ifdef CONFIG_FLASH_CFI_MTD 2096 cfi_mtd_init(); 2097 #endif 2098 2099 return (size); 2100 } 2101