1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #include <mtd/cfi_flash.h> 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 67 #endif 68 69 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 70 static uint flash_verbose = 1; 71 72 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 73 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 74 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 75 #else 76 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 77 #endif 78 79 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 80 81 /* 82 * Check if chip width is defined. If not, start detecting with 8bit. 83 */ 84 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 85 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 86 #endif 87 88 static void __flash_write8(u8 value, void *addr) 89 { 90 __raw_writeb(value, addr); 91 } 92 93 static void __flash_write16(u16 value, void *addr) 94 { 95 __raw_writew(value, addr); 96 } 97 98 static void __flash_write32(u32 value, void *addr) 99 { 100 __raw_writel(value, addr); 101 } 102 103 static void __flash_write64(u64 value, void *addr) 104 { 105 /* No architectures currently implement __raw_writeq() */ 106 *(volatile u64 *)addr = value; 107 } 108 109 static u8 __flash_read8(void *addr) 110 { 111 return __raw_readb(addr); 112 } 113 114 static u16 __flash_read16(void *addr) 115 { 116 return __raw_readw(addr); 117 } 118 119 static u32 __flash_read32(void *addr) 120 { 121 return __raw_readl(addr); 122 } 123 124 static u64 __flash_read64(void *addr) 125 { 126 /* No architectures currently implement __raw_readq() */ 127 return *(volatile u64 *)addr; 128 } 129 130 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 131 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 132 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 133 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 134 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 135 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 136 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 137 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 138 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 139 #else 140 #define flash_write8 __flash_write8 141 #define flash_write16 __flash_write16 142 #define flash_write32 __flash_write32 143 #define flash_write64 __flash_write64 144 #define flash_read8 __flash_read8 145 #define flash_read16 __flash_read16 146 #define flash_read32 __flash_read32 147 #define flash_read64 __flash_read64 148 #endif 149 150 /*----------------------------------------------------------------------- 151 */ 152 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 153 flash_info_t *flash_get_info(ulong base) 154 { 155 int i; 156 flash_info_t * info = 0; 157 158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 159 info = & flash_info[i]; 160 if (info->size && info->start[0] <= base && 161 base <= info->start[0] + info->size - 1) 162 break; 163 } 164 165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 166 } 167 #endif 168 169 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 170 { 171 if (sect != (info->sector_count - 1)) 172 return info->start[sect + 1] - info->start[sect]; 173 else 174 return info->start[0] + info->size - info->start[sect]; 175 } 176 177 /*----------------------------------------------------------------------- 178 * create an address based on the offset and the port width 179 */ 180 static inline void * 181 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 182 { 183 unsigned int byte_offset = offset * info->portwidth; 184 185 return (void *)(info->start[sect] + byte_offset); 186 } 187 188 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 189 unsigned int offset, void *addr) 190 { 191 } 192 193 /*----------------------------------------------------------------------- 194 * make a proper sized command based on the port and chip widths 195 */ 196 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 197 { 198 int i; 199 int cword_offset; 200 int cp_offset; 201 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 202 u32 cmd_le = cpu_to_le32(cmd); 203 #endif 204 uchar val; 205 uchar *cp = (uchar *) cmdbuf; 206 207 for (i = info->portwidth; i > 0; i--){ 208 cword_offset = (info->portwidth-i)%info->chipwidth; 209 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 210 cp_offset = info->portwidth - i; 211 val = *((uchar*)&cmd_le + cword_offset); 212 #else 213 cp_offset = i - 1; 214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 215 #endif 216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 217 } 218 } 219 220 #ifdef DEBUG 221 /*----------------------------------------------------------------------- 222 * Debug support 223 */ 224 static void print_longlong (char *str, unsigned long long data) 225 { 226 int i; 227 char *cp; 228 229 cp = (char *) &data; 230 for (i = 0; i < 8; i++) 231 sprintf (&str[i * 2], "%2.2x", *cp++); 232 } 233 234 static void flash_printqry (struct cfi_qry *qry) 235 { 236 u8 *p = (u8 *)qry; 237 int x, y; 238 239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 240 debug("%02x : ", x); 241 for (y = 0; y < 16; y++) 242 debug("%2.2x ", p[x + y]); 243 debug(" "); 244 for (y = 0; y < 16; y++) { 245 unsigned char c = p[x + y]; 246 if (c >= 0x20 && c <= 0x7e) 247 debug("%c", c); 248 else 249 debug("."); 250 } 251 debug("\n"); 252 } 253 } 254 #endif 255 256 257 /*----------------------------------------------------------------------- 258 * read a character at a port width address 259 */ 260 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 261 { 262 uchar *cp; 263 uchar retval; 264 265 cp = flash_map (info, 0, offset); 266 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 267 retval = flash_read8(cp); 268 #else 269 retval = flash_read8(cp + info->portwidth - 1); 270 #endif 271 flash_unmap (info, 0, offset, cp); 272 return retval; 273 } 274 275 /*----------------------------------------------------------------------- 276 * read a word at a port width address, assume 16bit bus 277 */ 278 static inline ushort flash_read_word (flash_info_t * info, uint offset) 279 { 280 ushort *addr, retval; 281 282 addr = flash_map (info, 0, offset); 283 retval = flash_read16 (addr); 284 flash_unmap (info, 0, offset, addr); 285 return retval; 286 } 287 288 289 /*----------------------------------------------------------------------- 290 * read a long word by picking the least significant byte of each maximum 291 * port size word. Swap for ppc format. 292 */ 293 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 294 uint offset) 295 { 296 uchar *addr; 297 ulong retval; 298 299 #ifdef DEBUG 300 int x; 301 #endif 302 addr = flash_map (info, sect, offset); 303 304 #ifdef DEBUG 305 debug ("long addr is at %p info->portwidth = %d\n", addr, 306 info->portwidth); 307 for (x = 0; x < 4 * info->portwidth; x++) { 308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 309 } 310 #endif 311 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 312 retval = ((flash_read8(addr) << 16) | 313 (flash_read8(addr + info->portwidth) << 24) | 314 (flash_read8(addr + 2 * info->portwidth)) | 315 (flash_read8(addr + 3 * info->portwidth) << 8)); 316 #else 317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 318 (flash_read8(addr + info->portwidth - 1) << 16) | 319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 320 (flash_read8(addr + 3 * info->portwidth - 1))); 321 #endif 322 flash_unmap(info, sect, offset, addr); 323 324 return retval; 325 } 326 327 /* 328 * Write a proper sized command to the correct address 329 */ 330 void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 331 uint offset, u32 cmd) 332 { 333 334 void *addr; 335 cfiword_t cword; 336 337 addr = flash_map (info, sect, offset); 338 flash_make_cmd (info, cmd, &cword); 339 switch (info->portwidth) { 340 case FLASH_CFI_8BIT: 341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 343 flash_write8(cword.c, addr); 344 break; 345 case FLASH_CFI_16BIT: 346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 347 cmd, cword.w, 348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 349 flash_write16(cword.w, addr); 350 break; 351 case FLASH_CFI_32BIT: 352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 353 cmd, cword.l, 354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 355 flash_write32(cword.l, addr); 356 break; 357 case FLASH_CFI_64BIT: 358 #ifdef DEBUG 359 { 360 char str[20]; 361 362 print_longlong (str, cword.ll); 363 364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 365 addr, cmd, str, 366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 367 } 368 #endif 369 flash_write64(cword.ll, addr); 370 break; 371 } 372 373 /* Ensure all the instructions are fully finished */ 374 sync(); 375 376 flash_unmap(info, sect, offset, addr); 377 } 378 379 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 380 { 381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 383 } 384 385 /*----------------------------------------------------------------------- 386 */ 387 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 388 uint offset, uchar cmd) 389 { 390 void *addr; 391 cfiword_t cword; 392 int retval; 393 394 addr = flash_map (info, sect, offset); 395 flash_make_cmd (info, cmd, &cword); 396 397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 398 switch (info->portwidth) { 399 case FLASH_CFI_8BIT: 400 debug ("is= %x %x\n", flash_read8(addr), cword.c); 401 retval = (flash_read8(addr) == cword.c); 402 break; 403 case FLASH_CFI_16BIT: 404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 405 retval = (flash_read16(addr) == cword.w); 406 break; 407 case FLASH_CFI_32BIT: 408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 409 retval = (flash_read32(addr) == cword.l); 410 break; 411 case FLASH_CFI_64BIT: 412 #ifdef DEBUG 413 { 414 char str1[20]; 415 char str2[20]; 416 417 print_longlong (str1, flash_read64(addr)); 418 print_longlong (str2, cword.ll); 419 debug ("is= %s %s\n", str1, str2); 420 } 421 #endif 422 retval = (flash_read64(addr) == cword.ll); 423 break; 424 default: 425 retval = 0; 426 break; 427 } 428 flash_unmap(info, sect, offset, addr); 429 430 return retval; 431 } 432 433 /*----------------------------------------------------------------------- 434 */ 435 static int flash_isset (flash_info_t * info, flash_sect_t sect, 436 uint offset, uchar cmd) 437 { 438 void *addr; 439 cfiword_t cword; 440 int retval; 441 442 addr = flash_map (info, sect, offset); 443 flash_make_cmd (info, cmd, &cword); 444 switch (info->portwidth) { 445 case FLASH_CFI_8BIT: 446 retval = ((flash_read8(addr) & cword.c) == cword.c); 447 break; 448 case FLASH_CFI_16BIT: 449 retval = ((flash_read16(addr) & cword.w) == cword.w); 450 break; 451 case FLASH_CFI_32BIT: 452 retval = ((flash_read32(addr) & cword.l) == cword.l); 453 break; 454 case FLASH_CFI_64BIT: 455 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 456 break; 457 default: 458 retval = 0; 459 break; 460 } 461 flash_unmap(info, sect, offset, addr); 462 463 return retval; 464 } 465 466 /*----------------------------------------------------------------------- 467 */ 468 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 469 uint offset, uchar cmd) 470 { 471 void *addr; 472 cfiword_t cword; 473 int retval; 474 475 addr = flash_map (info, sect, offset); 476 flash_make_cmd (info, cmd, &cword); 477 switch (info->portwidth) { 478 case FLASH_CFI_8BIT: 479 retval = flash_read8(addr) != flash_read8(addr); 480 break; 481 case FLASH_CFI_16BIT: 482 retval = flash_read16(addr) != flash_read16(addr); 483 break; 484 case FLASH_CFI_32BIT: 485 retval = flash_read32(addr) != flash_read32(addr); 486 break; 487 case FLASH_CFI_64BIT: 488 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 489 (flash_read32(addr+4) != flash_read32(addr+4)) ); 490 break; 491 default: 492 retval = 0; 493 break; 494 } 495 flash_unmap(info, sect, offset, addr); 496 497 return retval; 498 } 499 500 /* 501 * flash_is_busy - check to see if the flash is busy 502 * 503 * This routine checks the status of the chip and returns true if the 504 * chip is busy. 505 */ 506 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 507 { 508 int retval; 509 510 switch (info->vendor) { 511 case CFI_CMDSET_INTEL_PROG_REGIONS: 512 case CFI_CMDSET_INTEL_STANDARD: 513 case CFI_CMDSET_INTEL_EXTENDED: 514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 515 break; 516 case CFI_CMDSET_AMD_STANDARD: 517 case CFI_CMDSET_AMD_EXTENDED: 518 #ifdef CONFIG_FLASH_CFI_LEGACY 519 case CFI_CMDSET_AMD_LEGACY: 520 #endif 521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 522 break; 523 default: 524 retval = 0; 525 } 526 debug ("flash_is_busy: %d\n", retval); 527 return retval; 528 } 529 530 /*----------------------------------------------------------------------- 531 * wait for XSR.7 to be set. Time out with an error if it does not. 532 * This routine does not set the flash to read-array mode. 533 */ 534 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 535 ulong tout, char *prompt) 536 { 537 ulong start; 538 539 #if CONFIG_SYS_HZ != 1000 540 if ((ulong)CONFIG_SYS_HZ > 100000) 541 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 542 else 543 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 544 #endif 545 546 /* Wait for command completion */ 547 start = get_timer (0); 548 while (flash_is_busy (info, sector)) { 549 if (get_timer (start) > tout) { 550 printf ("Flash %s timeout at address %lx data %lx\n", 551 prompt, info->start[sector], 552 flash_read_long (info, sector, 0)); 553 flash_write_cmd (info, sector, 0, info->cmd_reset); 554 return ERR_TIMOUT; 555 } 556 udelay (1); /* also triggers watchdog */ 557 } 558 return ERR_OK; 559 } 560 561 /*----------------------------------------------------------------------- 562 * Wait for XSR.7 to be set, if it times out print an error, otherwise 563 * do a full status check. 564 * 565 * This routine sets the flash to read-array mode. 566 */ 567 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 568 ulong tout, char *prompt) 569 { 570 int retcode; 571 572 retcode = flash_status_check (info, sector, tout, prompt); 573 switch (info->vendor) { 574 case CFI_CMDSET_INTEL_PROG_REGIONS: 575 case CFI_CMDSET_INTEL_EXTENDED: 576 case CFI_CMDSET_INTEL_STANDARD: 577 if ((retcode != ERR_OK) 578 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 579 retcode = ERR_INVAL; 580 printf ("Flash %s error at address %lx\n", prompt, 581 info->start[sector]); 582 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 583 FLASH_STATUS_PSLBS)) { 584 puts ("Command Sequence Error.\n"); 585 } else if (flash_isset (info, sector, 0, 586 FLASH_STATUS_ECLBS)) { 587 puts ("Block Erase Error.\n"); 588 retcode = ERR_NOT_ERASED; 589 } else if (flash_isset (info, sector, 0, 590 FLASH_STATUS_PSLBS)) { 591 puts ("Locking Error\n"); 592 } 593 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 594 puts ("Block locked.\n"); 595 retcode = ERR_PROTECTED; 596 } 597 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 598 puts ("Vpp Low Error.\n"); 599 } 600 flash_write_cmd (info, sector, 0, info->cmd_reset); 601 break; 602 default: 603 break; 604 } 605 return retcode; 606 } 607 608 /*----------------------------------------------------------------------- 609 */ 610 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 611 { 612 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 613 unsigned short w; 614 unsigned int l; 615 unsigned long long ll; 616 #endif 617 618 switch (info->portwidth) { 619 case FLASH_CFI_8BIT: 620 cword->c = c; 621 break; 622 case FLASH_CFI_16BIT: 623 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 624 w = c; 625 w <<= 8; 626 cword->w = (cword->w >> 8) | w; 627 #else 628 cword->w = (cword->w << 8) | c; 629 #endif 630 break; 631 case FLASH_CFI_32BIT: 632 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 633 l = c; 634 l <<= 24; 635 cword->l = (cword->l >> 8) | l; 636 #else 637 cword->l = (cword->l << 8) | c; 638 #endif 639 break; 640 case FLASH_CFI_64BIT: 641 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 642 ll = c; 643 ll <<= 56; 644 cword->ll = (cword->ll >> 8) | ll; 645 #else 646 cword->ll = (cword->ll << 8) | c; 647 #endif 648 break; 649 } 650 } 651 652 /* 653 * Loop through the sector table starting from the previously found sector. 654 * Searches forwards or backwards, dependent on the passed address. 655 */ 656 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 657 { 658 static flash_sect_t saved_sector = 0; /* previously found sector */ 659 flash_sect_t sector = saved_sector; 660 661 while ((info->start[sector] < addr) 662 && (sector < info->sector_count - 1)) 663 sector++; 664 while ((info->start[sector] > addr) && (sector > 0)) 665 /* 666 * also decrements the sector in case of an overshot 667 * in the first loop 668 */ 669 sector--; 670 671 saved_sector = sector; 672 return sector; 673 } 674 675 /*----------------------------------------------------------------------- 676 */ 677 static int flash_write_cfiword (flash_info_t * info, ulong dest, 678 cfiword_t cword) 679 { 680 void *dstaddr = (void *)dest; 681 int flag; 682 flash_sect_t sect = 0; 683 char sect_found = 0; 684 685 /* Check if Flash is (sufficiently) erased */ 686 switch (info->portwidth) { 687 case FLASH_CFI_8BIT: 688 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 689 break; 690 case FLASH_CFI_16BIT: 691 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 692 break; 693 case FLASH_CFI_32BIT: 694 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 695 break; 696 case FLASH_CFI_64BIT: 697 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 698 break; 699 default: 700 flag = 0; 701 break; 702 } 703 if (!flag) 704 return ERR_NOT_ERASED; 705 706 /* Disable interrupts which might cause a timeout here */ 707 flag = disable_interrupts (); 708 709 switch (info->vendor) { 710 case CFI_CMDSET_INTEL_PROG_REGIONS: 711 case CFI_CMDSET_INTEL_EXTENDED: 712 case CFI_CMDSET_INTEL_STANDARD: 713 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 714 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 715 break; 716 case CFI_CMDSET_AMD_EXTENDED: 717 case CFI_CMDSET_AMD_STANDARD: 718 sect = find_sector(info, dest); 719 flash_unlock_seq (info, sect); 720 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 721 sect_found = 1; 722 break; 723 #ifdef CONFIG_FLASH_CFI_LEGACY 724 case CFI_CMDSET_AMD_LEGACY: 725 sect = find_sector(info, dest); 726 flash_unlock_seq (info, 0); 727 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 728 sect_found = 1; 729 break; 730 #endif 731 } 732 733 switch (info->portwidth) { 734 case FLASH_CFI_8BIT: 735 flash_write8(cword.c, dstaddr); 736 break; 737 case FLASH_CFI_16BIT: 738 flash_write16(cword.w, dstaddr); 739 break; 740 case FLASH_CFI_32BIT: 741 flash_write32(cword.l, dstaddr); 742 break; 743 case FLASH_CFI_64BIT: 744 flash_write64(cword.ll, dstaddr); 745 break; 746 } 747 748 /* re-enable interrupts if necessary */ 749 if (flag) 750 enable_interrupts (); 751 752 if (!sect_found) 753 sect = find_sector (info, dest); 754 755 return flash_full_status_check (info, sect, info->write_tout, "write"); 756 } 757 758 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 759 760 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 761 int len) 762 { 763 flash_sect_t sector; 764 int cnt; 765 int retcode; 766 void *src = cp; 767 void *dst = (void *)dest; 768 void *dst2 = dst; 769 int flag = 0; 770 uint offset = 0; 771 unsigned int shift; 772 uchar write_cmd; 773 774 switch (info->portwidth) { 775 case FLASH_CFI_8BIT: 776 shift = 0; 777 break; 778 case FLASH_CFI_16BIT: 779 shift = 1; 780 break; 781 case FLASH_CFI_32BIT: 782 shift = 2; 783 break; 784 case FLASH_CFI_64BIT: 785 shift = 3; 786 break; 787 default: 788 retcode = ERR_INVAL; 789 goto out_unmap; 790 } 791 792 cnt = len >> shift; 793 794 while ((cnt-- > 0) && (flag == 0)) { 795 switch (info->portwidth) { 796 case FLASH_CFI_8BIT: 797 flag = ((flash_read8(dst2) & flash_read8(src)) == 798 flash_read8(src)); 799 src += 1, dst2 += 1; 800 break; 801 case FLASH_CFI_16BIT: 802 flag = ((flash_read16(dst2) & flash_read16(src)) == 803 flash_read16(src)); 804 src += 2, dst2 += 2; 805 break; 806 case FLASH_CFI_32BIT: 807 flag = ((flash_read32(dst2) & flash_read32(src)) == 808 flash_read32(src)); 809 src += 4, dst2 += 4; 810 break; 811 case FLASH_CFI_64BIT: 812 flag = ((flash_read64(dst2) & flash_read64(src)) == 813 flash_read64(src)); 814 src += 8, dst2 += 8; 815 break; 816 } 817 } 818 if (!flag) { 819 retcode = ERR_NOT_ERASED; 820 goto out_unmap; 821 } 822 823 src = cp; 824 sector = find_sector (info, dest); 825 826 switch (info->vendor) { 827 case CFI_CMDSET_INTEL_PROG_REGIONS: 828 case CFI_CMDSET_INTEL_STANDARD: 829 case CFI_CMDSET_INTEL_EXTENDED: 830 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 831 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 832 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 833 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 834 flash_write_cmd (info, sector, 0, write_cmd); 835 retcode = flash_status_check (info, sector, 836 info->buffer_write_tout, 837 "write to buffer"); 838 if (retcode == ERR_OK) { 839 /* reduce the number of loops by the width of 840 * the port */ 841 cnt = len >> shift; 842 flash_write_cmd (info, sector, 0, cnt - 1); 843 while (cnt-- > 0) { 844 switch (info->portwidth) { 845 case FLASH_CFI_8BIT: 846 flash_write8(flash_read8(src), dst); 847 src += 1, dst += 1; 848 break; 849 case FLASH_CFI_16BIT: 850 flash_write16(flash_read16(src), dst); 851 src += 2, dst += 2; 852 break; 853 case FLASH_CFI_32BIT: 854 flash_write32(flash_read32(src), dst); 855 src += 4, dst += 4; 856 break; 857 case FLASH_CFI_64BIT: 858 flash_write64(flash_read64(src), dst); 859 src += 8, dst += 8; 860 break; 861 default: 862 retcode = ERR_INVAL; 863 goto out_unmap; 864 } 865 } 866 flash_write_cmd (info, sector, 0, 867 FLASH_CMD_WRITE_BUFFER_CONFIRM); 868 retcode = flash_full_status_check ( 869 info, sector, info->buffer_write_tout, 870 "buffer write"); 871 } 872 873 break; 874 875 case CFI_CMDSET_AMD_STANDARD: 876 case CFI_CMDSET_AMD_EXTENDED: 877 flash_unlock_seq(info,0); 878 879 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 880 offset = ((unsigned long)dst - info->start[sector]) >> shift; 881 #endif 882 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 883 cnt = len >> shift; 884 flash_write_cmd(info, sector, offset, cnt - 1); 885 886 switch (info->portwidth) { 887 case FLASH_CFI_8BIT: 888 while (cnt-- > 0) { 889 flash_write8(flash_read8(src), dst); 890 src += 1, dst += 1; 891 } 892 break; 893 case FLASH_CFI_16BIT: 894 while (cnt-- > 0) { 895 flash_write16(flash_read16(src), dst); 896 src += 2, dst += 2; 897 } 898 break; 899 case FLASH_CFI_32BIT: 900 while (cnt-- > 0) { 901 flash_write32(flash_read32(src), dst); 902 src += 4, dst += 4; 903 } 904 break; 905 case FLASH_CFI_64BIT: 906 while (cnt-- > 0) { 907 flash_write64(flash_read64(src), dst); 908 src += 8, dst += 8; 909 } 910 break; 911 default: 912 retcode = ERR_INVAL; 913 goto out_unmap; 914 } 915 916 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 917 retcode = flash_full_status_check (info, sector, 918 info->buffer_write_tout, 919 "buffer write"); 920 break; 921 922 default: 923 debug ("Unknown Command Set\n"); 924 retcode = ERR_INVAL; 925 break; 926 } 927 928 out_unmap: 929 return retcode; 930 } 931 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 932 933 934 /*----------------------------------------------------------------------- 935 */ 936 int flash_erase (flash_info_t * info, int s_first, int s_last) 937 { 938 int rcode = 0; 939 int prot; 940 flash_sect_t sect; 941 942 if (info->flash_id != FLASH_MAN_CFI) { 943 puts ("Can't erase unknown flash type - aborted\n"); 944 return 1; 945 } 946 if ((s_first < 0) || (s_first > s_last)) { 947 puts ("- no sectors to erase\n"); 948 return 1; 949 } 950 951 prot = 0; 952 for (sect = s_first; sect <= s_last; ++sect) { 953 if (info->protect[sect]) { 954 prot++; 955 } 956 } 957 if (prot) { 958 printf ("- Warning: %d protected sectors will not be erased!\n", 959 prot); 960 } else if (flash_verbose) { 961 putc ('\n'); 962 } 963 964 965 for (sect = s_first; sect <= s_last; sect++) { 966 if (info->protect[sect] == 0) { /* not protected */ 967 switch (info->vendor) { 968 case CFI_CMDSET_INTEL_PROG_REGIONS: 969 case CFI_CMDSET_INTEL_STANDARD: 970 case CFI_CMDSET_INTEL_EXTENDED: 971 flash_write_cmd (info, sect, 0, 972 FLASH_CMD_CLEAR_STATUS); 973 flash_write_cmd (info, sect, 0, 974 FLASH_CMD_BLOCK_ERASE); 975 flash_write_cmd (info, sect, 0, 976 FLASH_CMD_ERASE_CONFIRM); 977 break; 978 case CFI_CMDSET_AMD_STANDARD: 979 case CFI_CMDSET_AMD_EXTENDED: 980 flash_unlock_seq (info, sect); 981 flash_write_cmd (info, sect, 982 info->addr_unlock1, 983 AMD_CMD_ERASE_START); 984 flash_unlock_seq (info, sect); 985 flash_write_cmd (info, sect, 0, 986 AMD_CMD_ERASE_SECTOR); 987 break; 988 #ifdef CONFIG_FLASH_CFI_LEGACY 989 case CFI_CMDSET_AMD_LEGACY: 990 flash_unlock_seq (info, 0); 991 flash_write_cmd (info, 0, info->addr_unlock1, 992 AMD_CMD_ERASE_START); 993 flash_unlock_seq (info, 0); 994 flash_write_cmd (info, sect, 0, 995 AMD_CMD_ERASE_SECTOR); 996 break; 997 #endif 998 default: 999 debug ("Unkown flash vendor %d\n", 1000 info->vendor); 1001 break; 1002 } 1003 1004 if (flash_full_status_check 1005 (info, sect, info->erase_blk_tout, "erase")) { 1006 rcode = 1; 1007 } else if (flash_verbose) 1008 putc ('.'); 1009 } 1010 } 1011 1012 if (flash_verbose) 1013 puts (" done\n"); 1014 1015 return rcode; 1016 } 1017 1018 /*----------------------------------------------------------------------- 1019 */ 1020 void flash_print_info (flash_info_t * info) 1021 { 1022 int i; 1023 1024 if (info->flash_id != FLASH_MAN_CFI) { 1025 puts ("missing or unknown FLASH type\n"); 1026 return; 1027 } 1028 1029 printf ("%s FLASH (%d x %d)", 1030 info->name, 1031 (info->portwidth << 3), (info->chipwidth << 3)); 1032 if (info->size < 1024*1024) 1033 printf (" Size: %ld kB in %d Sectors\n", 1034 info->size >> 10, info->sector_count); 1035 else 1036 printf (" Size: %ld MB in %d Sectors\n", 1037 info->size >> 20, info->sector_count); 1038 printf (" "); 1039 switch (info->vendor) { 1040 case CFI_CMDSET_INTEL_PROG_REGIONS: 1041 printf ("Intel Prog Regions"); 1042 break; 1043 case CFI_CMDSET_INTEL_STANDARD: 1044 printf ("Intel Standard"); 1045 break; 1046 case CFI_CMDSET_INTEL_EXTENDED: 1047 printf ("Intel Extended"); 1048 break; 1049 case CFI_CMDSET_AMD_STANDARD: 1050 printf ("AMD Standard"); 1051 break; 1052 case CFI_CMDSET_AMD_EXTENDED: 1053 printf ("AMD Extended"); 1054 break; 1055 #ifdef CONFIG_FLASH_CFI_LEGACY 1056 case CFI_CMDSET_AMD_LEGACY: 1057 printf ("AMD Legacy"); 1058 break; 1059 #endif 1060 default: 1061 printf ("Unknown (%d)", info->vendor); 1062 break; 1063 } 1064 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1065 info->manufacturer_id, info->device_id); 1066 if (info->device_id == 0x7E) { 1067 printf("%04X", info->device_id2); 1068 } 1069 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1070 info->erase_blk_tout, 1071 info->write_tout); 1072 if (info->buffer_size > 1) { 1073 printf (" Buffer write timeout: %ld ms, " 1074 "buffer size: %d bytes\n", 1075 info->buffer_write_tout, 1076 info->buffer_size); 1077 } 1078 1079 puts ("\n Sector Start Addresses:"); 1080 for (i = 0; i < info->sector_count; ++i) { 1081 if ((i % 5) == 0) 1082 printf ("\n"); 1083 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1084 int k; 1085 int size; 1086 int erased; 1087 volatile unsigned long *flash; 1088 1089 /* 1090 * Check if whole sector is erased 1091 */ 1092 size = flash_sector_size(info, i); 1093 erased = 1; 1094 flash = (volatile unsigned long *) info->start[i]; 1095 size = size >> 2; /* divide by 4 for longword access */ 1096 for (k = 0; k < size; k++) { 1097 if (*flash++ != 0xffffffff) { 1098 erased = 0; 1099 break; 1100 } 1101 } 1102 1103 /* print empty and read-only info */ 1104 printf (" %08lX %c %s ", 1105 info->start[i], 1106 erased ? 'E' : ' ', 1107 info->protect[i] ? "RO" : " "); 1108 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1109 printf (" %08lX %s ", 1110 info->start[i], 1111 info->protect[i] ? "RO" : " "); 1112 #endif 1113 } 1114 putc ('\n'); 1115 return; 1116 } 1117 1118 /*----------------------------------------------------------------------- 1119 * This is used in a few places in write_buf() to show programming 1120 * progress. Making it a function is nasty because it needs to do side 1121 * effect updates to digit and dots. Repeated code is nasty too, so 1122 * we define it once here. 1123 */ 1124 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1125 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1126 if (flash_verbose) { \ 1127 dots -= dots_sub; \ 1128 if ((scale > 0) && (dots <= 0)) { \ 1129 if ((digit % 5) == 0) \ 1130 printf ("%d", digit / 5); \ 1131 else \ 1132 putc ('.'); \ 1133 digit--; \ 1134 dots += scale; \ 1135 } \ 1136 } 1137 #else 1138 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1139 #endif 1140 1141 /*----------------------------------------------------------------------- 1142 * Copy memory to flash, returns: 1143 * 0 - OK 1144 * 1 - write timeout 1145 * 2 - Flash not erased 1146 */ 1147 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1148 { 1149 ulong wp; 1150 uchar *p; 1151 int aln; 1152 cfiword_t cword; 1153 int i, rc; 1154 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1155 int buffered_size; 1156 #endif 1157 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1158 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1159 int scale = 0; 1160 int dots = 0; 1161 1162 /* 1163 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1164 */ 1165 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1166 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1167 CONFIG_FLASH_SHOW_PROGRESS); 1168 } 1169 #endif 1170 1171 /* get lower aligned address */ 1172 wp = (addr & ~(info->portwidth - 1)); 1173 1174 /* handle unaligned start */ 1175 if ((aln = addr - wp) != 0) { 1176 cword.l = 0; 1177 p = (uchar *)wp; 1178 for (i = 0; i < aln; ++i) 1179 flash_add_byte (info, &cword, flash_read8(p + i)); 1180 1181 for (; (i < info->portwidth) && (cnt > 0); i++) { 1182 flash_add_byte (info, &cword, *src++); 1183 cnt--; 1184 } 1185 for (; (cnt == 0) && (i < info->portwidth); ++i) 1186 flash_add_byte (info, &cword, flash_read8(p + i)); 1187 1188 rc = flash_write_cfiword (info, wp, cword); 1189 if (rc != 0) 1190 return rc; 1191 1192 wp += i; 1193 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1194 } 1195 1196 /* handle the aligned part */ 1197 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1198 buffered_size = (info->portwidth / info->chipwidth); 1199 buffered_size *= info->buffer_size; 1200 while (cnt >= info->portwidth) { 1201 /* prohibit buffer write when buffer_size is 1 */ 1202 if (info->buffer_size == 1) { 1203 cword.l = 0; 1204 for (i = 0; i < info->portwidth; i++) 1205 flash_add_byte (info, &cword, *src++); 1206 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1207 return rc; 1208 wp += info->portwidth; 1209 cnt -= info->portwidth; 1210 continue; 1211 } 1212 1213 /* write buffer until next buffered_size aligned boundary */ 1214 i = buffered_size - (wp % buffered_size); 1215 if (i > cnt) 1216 i = cnt; 1217 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1218 return rc; 1219 i -= i & (info->portwidth - 1); 1220 wp += i; 1221 src += i; 1222 cnt -= i; 1223 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1224 } 1225 #else 1226 while (cnt >= info->portwidth) { 1227 cword.l = 0; 1228 for (i = 0; i < info->portwidth; i++) { 1229 flash_add_byte (info, &cword, *src++); 1230 } 1231 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1232 return rc; 1233 wp += info->portwidth; 1234 cnt -= info->portwidth; 1235 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1236 } 1237 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1238 1239 if (cnt == 0) { 1240 return (0); 1241 } 1242 1243 /* 1244 * handle unaligned tail bytes 1245 */ 1246 cword.l = 0; 1247 p = (uchar *)wp; 1248 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1249 flash_add_byte (info, &cword, *src++); 1250 --cnt; 1251 } 1252 for (; i < info->portwidth; ++i) 1253 flash_add_byte (info, &cword, flash_read8(p + i)); 1254 1255 return flash_write_cfiword (info, wp, cword); 1256 } 1257 1258 /*----------------------------------------------------------------------- 1259 */ 1260 #ifdef CONFIG_SYS_FLASH_PROTECTION 1261 1262 int flash_real_protect (flash_info_t * info, long sector, int prot) 1263 { 1264 int retcode = 0; 1265 1266 switch (info->vendor) { 1267 case CFI_CMDSET_INTEL_PROG_REGIONS: 1268 case CFI_CMDSET_INTEL_STANDARD: 1269 case CFI_CMDSET_INTEL_EXTENDED: 1270 flash_write_cmd (info, sector, 0, 1271 FLASH_CMD_CLEAR_STATUS); 1272 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1273 if (prot) 1274 flash_write_cmd (info, sector, 0, 1275 FLASH_CMD_PROTECT_SET); 1276 else 1277 flash_write_cmd (info, sector, 0, 1278 FLASH_CMD_PROTECT_CLEAR); 1279 break; 1280 case CFI_CMDSET_AMD_EXTENDED: 1281 case CFI_CMDSET_AMD_STANDARD: 1282 /* U-Boot only checks the first byte */ 1283 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1284 if (prot) { 1285 flash_unlock_seq (info, 0); 1286 flash_write_cmd (info, 0, 1287 info->addr_unlock1, 1288 ATM_CMD_SOFTLOCK_START); 1289 flash_unlock_seq (info, 0); 1290 flash_write_cmd (info, sector, 0, 1291 ATM_CMD_LOCK_SECT); 1292 } else { 1293 flash_write_cmd (info, 0, 1294 info->addr_unlock1, 1295 AMD_CMD_UNLOCK_START); 1296 if (info->device_id == ATM_ID_BV6416) 1297 flash_write_cmd (info, sector, 1298 0, ATM_CMD_UNLOCK_SECT); 1299 } 1300 } 1301 break; 1302 #ifdef CONFIG_FLASH_CFI_LEGACY 1303 case CFI_CMDSET_AMD_LEGACY: 1304 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1305 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1306 if (prot) 1307 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1308 else 1309 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1310 #endif 1311 }; 1312 1313 if ((retcode = 1314 flash_full_status_check (info, sector, info->erase_blk_tout, 1315 prot ? "protect" : "unprotect")) == 0) { 1316 1317 info->protect[sector] = prot; 1318 1319 /* 1320 * On some of Intel's flash chips (marked via legacy_unlock) 1321 * unprotect unprotects all locking. 1322 */ 1323 if ((prot == 0) && (info->legacy_unlock)) { 1324 flash_sect_t i; 1325 1326 for (i = 0; i < info->sector_count; i++) { 1327 if (info->protect[i]) 1328 flash_real_protect (info, i, 1); 1329 } 1330 } 1331 } 1332 return retcode; 1333 } 1334 1335 /*----------------------------------------------------------------------- 1336 * flash_read_user_serial - read the OneTimeProgramming cells 1337 */ 1338 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1339 int len) 1340 { 1341 uchar *src; 1342 uchar *dst; 1343 1344 dst = buffer; 1345 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1346 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1347 memcpy (dst, src + offset, len); 1348 flash_write_cmd (info, 0, 0, info->cmd_reset); 1349 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1350 } 1351 1352 /* 1353 * flash_read_factory_serial - read the device Id from the protection area 1354 */ 1355 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1356 int len) 1357 { 1358 uchar *src; 1359 1360 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1361 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1362 memcpy (buffer, src + offset, len); 1363 flash_write_cmd (info, 0, 0, info->cmd_reset); 1364 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1365 } 1366 1367 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1368 1369 /*----------------------------------------------------------------------- 1370 * Reverse the order of the erase regions in the CFI QRY structure. 1371 * This is needed for chips that are either a) correctly detected as 1372 * top-boot, or b) buggy. 1373 */ 1374 static void cfi_reverse_geometry(struct cfi_qry *qry) 1375 { 1376 unsigned int i, j; 1377 u32 tmp; 1378 1379 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1380 tmp = qry->erase_region_info[i]; 1381 qry->erase_region_info[i] = qry->erase_region_info[j]; 1382 qry->erase_region_info[j] = tmp; 1383 } 1384 } 1385 1386 /*----------------------------------------------------------------------- 1387 * read jedec ids from device and set corresponding fields in info struct 1388 * 1389 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1390 * 1391 */ 1392 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1393 { 1394 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1395 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1396 udelay(1000); /* some flash are slow to respond */ 1397 info->manufacturer_id = flash_read_uchar (info, 1398 FLASH_OFFSET_MANUFACTURER_ID); 1399 info->device_id = flash_read_uchar (info, 1400 FLASH_OFFSET_DEVICE_ID); 1401 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1402 } 1403 1404 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1405 { 1406 info->cmd_reset = FLASH_CMD_RESET; 1407 1408 cmdset_intel_read_jedec_ids(info); 1409 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1410 1411 #ifdef CONFIG_SYS_FLASH_PROTECTION 1412 /* read legacy lock/unlock bit from intel flash */ 1413 if (info->ext_addr) { 1414 info->legacy_unlock = flash_read_uchar (info, 1415 info->ext_addr + 5) & 0x08; 1416 } 1417 #endif 1418 1419 return 0; 1420 } 1421 1422 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1423 { 1424 ushort bankId = 0; 1425 uchar manuId; 1426 1427 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1428 flash_unlock_seq(info, 0); 1429 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1430 udelay(1000); /* some flash are slow to respond */ 1431 1432 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1433 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1434 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1435 bankId += 0x100; 1436 manuId = flash_read_uchar (info, 1437 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1438 } 1439 info->manufacturer_id = manuId; 1440 1441 switch (info->chipwidth){ 1442 case FLASH_CFI_8BIT: 1443 info->device_id = flash_read_uchar (info, 1444 FLASH_OFFSET_DEVICE_ID); 1445 if (info->device_id == 0x7E) { 1446 /* AMD 3-byte (expanded) device ids */ 1447 info->device_id2 = flash_read_uchar (info, 1448 FLASH_OFFSET_DEVICE_ID2); 1449 info->device_id2 <<= 8; 1450 info->device_id2 |= flash_read_uchar (info, 1451 FLASH_OFFSET_DEVICE_ID3); 1452 } 1453 break; 1454 case FLASH_CFI_16BIT: 1455 info->device_id = flash_read_word (info, 1456 FLASH_OFFSET_DEVICE_ID); 1457 break; 1458 default: 1459 break; 1460 } 1461 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1462 } 1463 1464 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1465 { 1466 info->cmd_reset = AMD_CMD_RESET; 1467 1468 cmdset_amd_read_jedec_ids(info); 1469 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1470 1471 return 0; 1472 } 1473 1474 #ifdef CONFIG_FLASH_CFI_LEGACY 1475 static void flash_read_jedec_ids (flash_info_t * info) 1476 { 1477 info->manufacturer_id = 0; 1478 info->device_id = 0; 1479 info->device_id2 = 0; 1480 1481 switch (info->vendor) { 1482 case CFI_CMDSET_INTEL_PROG_REGIONS: 1483 case CFI_CMDSET_INTEL_STANDARD: 1484 case CFI_CMDSET_INTEL_EXTENDED: 1485 cmdset_intel_read_jedec_ids(info); 1486 break; 1487 case CFI_CMDSET_AMD_STANDARD: 1488 case CFI_CMDSET_AMD_EXTENDED: 1489 cmdset_amd_read_jedec_ids(info); 1490 break; 1491 default: 1492 break; 1493 } 1494 } 1495 1496 /*----------------------------------------------------------------------- 1497 * Call board code to request info about non-CFI flash. 1498 * board_flash_get_legacy needs to fill in at least: 1499 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1500 */ 1501 static int flash_detect_legacy(phys_addr_t base, int banknum) 1502 { 1503 flash_info_t *info = &flash_info[banknum]; 1504 1505 if (board_flash_get_legacy(base, banknum, info)) { 1506 /* board code may have filled info completely. If not, we 1507 use JEDEC ID probing. */ 1508 if (!info->vendor) { 1509 int modes[] = { 1510 CFI_CMDSET_AMD_STANDARD, 1511 CFI_CMDSET_INTEL_STANDARD 1512 }; 1513 int i; 1514 1515 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1516 info->vendor = modes[i]; 1517 info->start[0] = 1518 (ulong)map_physmem(base, 1519 info->portwidth, 1520 MAP_NOCACHE); 1521 if (info->portwidth == FLASH_CFI_8BIT 1522 && info->interface == FLASH_CFI_X8X16) { 1523 info->addr_unlock1 = 0x2AAA; 1524 info->addr_unlock2 = 0x5555; 1525 } else { 1526 info->addr_unlock1 = 0x5555; 1527 info->addr_unlock2 = 0x2AAA; 1528 } 1529 flash_read_jedec_ids(info); 1530 debug("JEDEC PROBE: ID %x %x %x\n", 1531 info->manufacturer_id, 1532 info->device_id, 1533 info->device_id2); 1534 if (jedec_flash_match(info, info->start[0])) 1535 break; 1536 else 1537 unmap_physmem((void *)info->start[0], 1538 MAP_NOCACHE); 1539 } 1540 } 1541 1542 switch(info->vendor) { 1543 case CFI_CMDSET_INTEL_PROG_REGIONS: 1544 case CFI_CMDSET_INTEL_STANDARD: 1545 case CFI_CMDSET_INTEL_EXTENDED: 1546 info->cmd_reset = FLASH_CMD_RESET; 1547 break; 1548 case CFI_CMDSET_AMD_STANDARD: 1549 case CFI_CMDSET_AMD_EXTENDED: 1550 case CFI_CMDSET_AMD_LEGACY: 1551 info->cmd_reset = AMD_CMD_RESET; 1552 break; 1553 } 1554 info->flash_id = FLASH_MAN_CFI; 1555 return 1; 1556 } 1557 return 0; /* use CFI */ 1558 } 1559 #else 1560 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1561 { 1562 return 0; /* use CFI */ 1563 } 1564 #endif 1565 1566 /*----------------------------------------------------------------------- 1567 * detect if flash is compatible with the Common Flash Interface (CFI) 1568 * http://www.jedec.org/download/search/jesd68.pdf 1569 */ 1570 static void flash_read_cfi (flash_info_t *info, void *buf, 1571 unsigned int start, size_t len) 1572 { 1573 u8 *p = buf; 1574 unsigned int i; 1575 1576 for (i = 0; i < len; i++) 1577 p[i] = flash_read_uchar(info, start + i); 1578 } 1579 1580 void __flash_cmd_reset(flash_info_t *info) 1581 { 1582 /* 1583 * We do not yet know what kind of commandset to use, so we issue 1584 * the reset command in both Intel and AMD variants, in the hope 1585 * that AMD flash roms ignore the Intel command. 1586 */ 1587 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1588 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1589 } 1590 void flash_cmd_reset(flash_info_t *info) 1591 __attribute__((weak,alias("__flash_cmd_reset"))); 1592 1593 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1594 { 1595 int cfi_offset; 1596 1597 /* Issue FLASH reset command */ 1598 flash_cmd_reset(info); 1599 1600 for (cfi_offset=0; 1601 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1602 cfi_offset++) { 1603 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1604 FLASH_CMD_CFI); 1605 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1606 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1607 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1608 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1609 sizeof(struct cfi_qry)); 1610 info->interface = le16_to_cpu(qry->interface_desc); 1611 1612 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1613 debug ("device interface is %d\n", 1614 info->interface); 1615 debug ("found port %d chip %d ", 1616 info->portwidth, info->chipwidth); 1617 debug ("port %d bits chip %d bits\n", 1618 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1619 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1620 1621 /* calculate command offsets as in the Linux driver */ 1622 info->addr_unlock1 = 0x555; 1623 info->addr_unlock2 = 0x2aa; 1624 1625 /* 1626 * modify the unlock address if we are 1627 * in compatibility mode 1628 */ 1629 if ( /* x8/x16 in x8 mode */ 1630 ((info->chipwidth == FLASH_CFI_BY8) && 1631 (info->interface == FLASH_CFI_X8X16)) || 1632 /* x16/x32 in x16 mode */ 1633 ((info->chipwidth == FLASH_CFI_BY16) && 1634 (info->interface == FLASH_CFI_X16X32))) 1635 { 1636 info->addr_unlock1 = 0xaaa; 1637 info->addr_unlock2 = 0x555; 1638 } 1639 1640 info->name = "CFI conformant"; 1641 return 1; 1642 } 1643 } 1644 1645 return 0; 1646 } 1647 1648 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1649 { 1650 debug ("flash detect cfi\n"); 1651 1652 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1653 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1654 for (info->chipwidth = FLASH_CFI_BY8; 1655 info->chipwidth <= info->portwidth; 1656 info->chipwidth <<= 1) 1657 if (__flash_detect_cfi(info, qry)) 1658 return 1; 1659 } 1660 debug ("not found\n"); 1661 return 0; 1662 } 1663 1664 /* 1665 * Manufacturer-specific quirks. Add workarounds for geometry 1666 * reversal, etc. here. 1667 */ 1668 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1669 { 1670 /* check if flash geometry needs reversal */ 1671 if (qry->num_erase_regions > 1) { 1672 /* reverse geometry if top boot part */ 1673 if (info->cfi_version < 0x3131) { 1674 /* CFI < 1.1, try to guess from device id */ 1675 if ((info->device_id & 0x80) != 0) 1676 cfi_reverse_geometry(qry); 1677 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1678 /* CFI >= 1.1, deduct from top/bottom flag */ 1679 /* note: ext_addr is valid since cfi_version > 0 */ 1680 cfi_reverse_geometry(qry); 1681 } 1682 } 1683 } 1684 1685 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1686 { 1687 int reverse_geometry = 0; 1688 1689 /* Check the "top boot" bit in the PRI */ 1690 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1691 reverse_geometry = 1; 1692 1693 /* AT49BV6416(T) list the erase regions in the wrong order. 1694 * However, the device ID is identical with the non-broken 1695 * AT49BV642D they differ in the high byte. 1696 */ 1697 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1698 reverse_geometry = !reverse_geometry; 1699 1700 if (reverse_geometry) 1701 cfi_reverse_geometry(qry); 1702 } 1703 1704 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1705 { 1706 /* check if flash geometry needs reversal */ 1707 if (qry->num_erase_regions > 1) { 1708 /* reverse geometry if top boot part */ 1709 if (info->cfi_version < 0x3131) { 1710 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ 1711 if (info->device_id == 0x22CA || 1712 info->device_id == 0x2256) { 1713 cfi_reverse_geometry(qry); 1714 } 1715 } 1716 } 1717 } 1718 1719 /* 1720 * The following code cannot be run from FLASH! 1721 * 1722 */ 1723 ulong flash_get_size (phys_addr_t base, int banknum) 1724 { 1725 flash_info_t *info = &flash_info[banknum]; 1726 int i, j; 1727 flash_sect_t sect_cnt; 1728 phys_addr_t sector; 1729 unsigned long tmp; 1730 int size_ratio; 1731 uchar num_erase_regions; 1732 int erase_region_size; 1733 int erase_region_count; 1734 struct cfi_qry qry; 1735 1736 memset(&qry, 0, sizeof(qry)); 1737 1738 info->ext_addr = 0; 1739 info->cfi_version = 0; 1740 #ifdef CONFIG_SYS_FLASH_PROTECTION 1741 info->legacy_unlock = 0; 1742 #endif 1743 1744 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1745 1746 if (flash_detect_cfi (info, &qry)) { 1747 info->vendor = le16_to_cpu(qry.p_id); 1748 info->ext_addr = le16_to_cpu(qry.p_adr); 1749 num_erase_regions = qry.num_erase_regions; 1750 1751 if (info->ext_addr) { 1752 info->cfi_version = (ushort) flash_read_uchar (info, 1753 info->ext_addr + 3) << 8; 1754 info->cfi_version |= (ushort) flash_read_uchar (info, 1755 info->ext_addr + 4); 1756 } 1757 1758 #ifdef DEBUG 1759 flash_printqry (&qry); 1760 #endif 1761 1762 switch (info->vendor) { 1763 case CFI_CMDSET_INTEL_PROG_REGIONS: 1764 case CFI_CMDSET_INTEL_STANDARD: 1765 case CFI_CMDSET_INTEL_EXTENDED: 1766 cmdset_intel_init(info, &qry); 1767 break; 1768 case CFI_CMDSET_AMD_STANDARD: 1769 case CFI_CMDSET_AMD_EXTENDED: 1770 cmdset_amd_init(info, &qry); 1771 break; 1772 default: 1773 printf("CFI: Unknown command set 0x%x\n", 1774 info->vendor); 1775 /* 1776 * Unfortunately, this means we don't know how 1777 * to get the chip back to Read mode. Might 1778 * as well try an Intel-style reset... 1779 */ 1780 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1781 return 0; 1782 } 1783 1784 /* Do manufacturer-specific fixups */ 1785 switch (info->manufacturer_id) { 1786 case 0x0001: 1787 flash_fixup_amd(info, &qry); 1788 break; 1789 case 0x001f: 1790 flash_fixup_atmel(info, &qry); 1791 break; 1792 case 0x0020: 1793 flash_fixup_stm(info, &qry); 1794 break; 1795 } 1796 1797 debug ("manufacturer is %d\n", info->vendor); 1798 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1799 debug ("device id is 0x%x\n", info->device_id); 1800 debug ("device id2 is 0x%x\n", info->device_id2); 1801 debug ("cfi version is 0x%04x\n", info->cfi_version); 1802 1803 size_ratio = info->portwidth / info->chipwidth; 1804 /* if the chip is x8/x16 reduce the ratio by half */ 1805 if ((info->interface == FLASH_CFI_X8X16) 1806 && (info->chipwidth == FLASH_CFI_BY8)) { 1807 size_ratio >>= 1; 1808 } 1809 debug ("size_ratio %d port %d bits chip %d bits\n", 1810 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1811 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1812 debug ("found %d erase regions\n", num_erase_regions); 1813 sect_cnt = 0; 1814 sector = base; 1815 for (i = 0; i < num_erase_regions; i++) { 1816 if (i > NUM_ERASE_REGIONS) { 1817 printf ("%d erase regions found, only %d used\n", 1818 num_erase_regions, NUM_ERASE_REGIONS); 1819 break; 1820 } 1821 1822 tmp = le32_to_cpu(qry.erase_region_info[i]); 1823 debug("erase region %u: 0x%08lx\n", i, tmp); 1824 1825 erase_region_count = (tmp & 0xffff) + 1; 1826 tmp >>= 16; 1827 erase_region_size = 1828 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1829 debug ("erase_region_count = %d erase_region_size = %d\n", 1830 erase_region_count, erase_region_size); 1831 for (j = 0; j < erase_region_count; j++) { 1832 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1833 printf("ERROR: too many flash sectors\n"); 1834 break; 1835 } 1836 info->start[sect_cnt] = 1837 (ulong)map_physmem(sector, 1838 info->portwidth, 1839 MAP_NOCACHE); 1840 sector += (erase_region_size * size_ratio); 1841 1842 /* 1843 * Only read protection status from 1844 * supported devices (intel...) 1845 */ 1846 switch (info->vendor) { 1847 case CFI_CMDSET_INTEL_PROG_REGIONS: 1848 case CFI_CMDSET_INTEL_EXTENDED: 1849 case CFI_CMDSET_INTEL_STANDARD: 1850 info->protect[sect_cnt] = 1851 flash_isset (info, sect_cnt, 1852 FLASH_OFFSET_PROTECT, 1853 FLASH_STATUS_PROTECT); 1854 break; 1855 default: 1856 /* default: not protected */ 1857 info->protect[sect_cnt] = 0; 1858 } 1859 1860 sect_cnt++; 1861 } 1862 } 1863 1864 info->sector_count = sect_cnt; 1865 info->size = 1 << qry.dev_size; 1866 /* multiply the size by the number of chips */ 1867 info->size *= size_ratio; 1868 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1869 tmp = 1 << qry.block_erase_timeout_typ; 1870 info->erase_blk_tout = tmp * 1871 (1 << qry.block_erase_timeout_max); 1872 tmp = (1 << qry.buf_write_timeout_typ) * 1873 (1 << qry.buf_write_timeout_max); 1874 1875 /* round up when converting to ms */ 1876 info->buffer_write_tout = (tmp + 999) / 1000; 1877 tmp = (1 << qry.word_write_timeout_typ) * 1878 (1 << qry.word_write_timeout_max); 1879 /* round up when converting to ms */ 1880 info->write_tout = (tmp + 999) / 1000; 1881 info->flash_id = FLASH_MAN_CFI; 1882 if ((info->interface == FLASH_CFI_X8X16) && 1883 (info->chipwidth == FLASH_CFI_BY8)) { 1884 /* XXX - Need to test on x8/x16 in parallel. */ 1885 info->portwidth >>= 1; 1886 } 1887 1888 flash_write_cmd (info, 0, 0, info->cmd_reset); 1889 } 1890 1891 return (info->size); 1892 } 1893 1894 void flash_set_verbose(uint v) 1895 { 1896 flash_verbose = v; 1897 } 1898 1899 /*----------------------------------------------------------------------- 1900 */ 1901 unsigned long flash_init (void) 1902 { 1903 unsigned long size = 0; 1904 int i; 1905 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 1906 struct apl_s { 1907 ulong start; 1908 ulong size; 1909 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 1910 #endif 1911 1912 #ifdef CONFIG_SYS_FLASH_PROTECTION 1913 /* read environment from EEPROM */ 1914 char s[64]; 1915 getenv_r ("unlock", s, sizeof(s)); 1916 #endif 1917 1918 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 1919 1920 /* Init: no FLASHes known */ 1921 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 1922 flash_info[i].flash_id = FLASH_UNKNOWN; 1923 1924 if (!flash_detect_legacy (BANK_BASE(i), i)) 1925 flash_get_size (BANK_BASE(i), i); 1926 size += flash_info[i].size; 1927 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 1928 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 1929 printf ("## Unknown FLASH on Bank %d " 1930 "- Size = 0x%08lx = %ld MB\n", 1931 i+1, flash_info[i].size, 1932 flash_info[i].size << 20); 1933 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 1934 } 1935 #ifdef CONFIG_SYS_FLASH_PROTECTION 1936 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 1937 /* 1938 * Only the U-Boot image and it's environment 1939 * is protected, all other sectors are 1940 * unprotected (unlocked) if flash hardware 1941 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 1942 * and the environment variable "unlock" is 1943 * set to "yes". 1944 */ 1945 if (flash_info[i].legacy_unlock) { 1946 int k; 1947 1948 /* 1949 * Disable legacy_unlock temporarily, 1950 * since flash_real_protect would 1951 * relock all other sectors again 1952 * otherwise. 1953 */ 1954 flash_info[i].legacy_unlock = 0; 1955 1956 /* 1957 * Legacy unlocking (e.g. Intel J3) -> 1958 * unlock only one sector. This will 1959 * unlock all sectors. 1960 */ 1961 flash_real_protect (&flash_info[i], 0, 0); 1962 1963 flash_info[i].legacy_unlock = 1; 1964 1965 /* 1966 * Manually mark other sectors as 1967 * unlocked (unprotected) 1968 */ 1969 for (k = 1; k < flash_info[i].sector_count; k++) 1970 flash_info[i].protect[k] = 0; 1971 } else { 1972 /* 1973 * No legancy unlocking -> unlock all sectors 1974 */ 1975 flash_protect (FLAG_PROTECT_CLEAR, 1976 flash_info[i].start[0], 1977 flash_info[i].start[0] 1978 + flash_info[i].size - 1, 1979 &flash_info[i]); 1980 } 1981 } 1982 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1983 } 1984 1985 /* Monitor protection ON by default */ 1986 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \ 1987 (!defined(CONFIG_MONITOR_IS_IN_RAM)) 1988 flash_protect (FLAG_PROTECT_SET, 1989 CONFIG_SYS_MONITOR_BASE, 1990 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 1991 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 1992 #endif 1993 1994 /* Environment protection ON by default */ 1995 #ifdef CONFIG_ENV_IS_IN_FLASH 1996 flash_protect (FLAG_PROTECT_SET, 1997 CONFIG_ENV_ADDR, 1998 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 1999 flash_get_info(CONFIG_ENV_ADDR)); 2000 #endif 2001 2002 /* Redundant environment protection ON by default */ 2003 #ifdef CONFIG_ENV_ADDR_REDUND 2004 flash_protect (FLAG_PROTECT_SET, 2005 CONFIG_ENV_ADDR_REDUND, 2006 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2007 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2008 #endif 2009 2010 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2011 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2012 debug("autoprotecting from %08x to %08x\n", 2013 apl[i].start, apl[i].start + apl[i].size - 1); 2014 flash_protect (FLAG_PROTECT_SET, 2015 apl[i].start, 2016 apl[i].start + apl[i].size - 1, 2017 flash_get_info(apl[i].start)); 2018 } 2019 #endif 2020 2021 #ifdef CONFIG_FLASH_CFI_MTD 2022 cfi_mtd_init(); 2023 #endif 2024 2025 return (size); 2026 } 2027