1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #include <mtd/cfi_flash.h> 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 66 #ifdef CONFIG_FLASH_CFI_MTD 67 static uint flash_verbose = 1; 68 #else 69 #define flash_verbose 1 70 #endif 71 72 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 73 74 /* 75 * Check if chip width is defined. If not, start detecting with 8bit. 76 */ 77 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 78 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 79 #endif 80 81 /* 82 * 0xffff is an undefined value for the configuration register. When 83 * this value is returned, the configuration register shall not be 84 * written at all (default mode). 85 */ 86 static u16 cfi_flash_config_reg(int i) 87 { 88 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS 89 return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i]; 90 #else 91 return 0xffff; 92 #endif 93 } 94 95 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT) 96 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT; 97 #endif 98 99 static phys_addr_t __cfi_flash_bank_addr(int i) 100 { 101 return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i]; 102 } 103 phys_addr_t cfi_flash_bank_addr(int i) 104 __attribute__((weak, alias("__cfi_flash_bank_addr"))); 105 106 static unsigned long __cfi_flash_bank_size(int i) 107 { 108 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES 109 return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i]; 110 #else 111 return 0; 112 #endif 113 } 114 unsigned long cfi_flash_bank_size(int i) 115 __attribute__((weak, alias("__cfi_flash_bank_size"))); 116 117 static void __flash_write8(u8 value, void *addr) 118 { 119 __raw_writeb(value, addr); 120 } 121 122 static void __flash_write16(u16 value, void *addr) 123 { 124 __raw_writew(value, addr); 125 } 126 127 static void __flash_write32(u32 value, void *addr) 128 { 129 __raw_writel(value, addr); 130 } 131 132 static void __flash_write64(u64 value, void *addr) 133 { 134 /* No architectures currently implement __raw_writeq() */ 135 *(volatile u64 *)addr = value; 136 } 137 138 static u8 __flash_read8(void *addr) 139 { 140 return __raw_readb(addr); 141 } 142 143 static u16 __flash_read16(void *addr) 144 { 145 return __raw_readw(addr); 146 } 147 148 static u32 __flash_read32(void *addr) 149 { 150 return __raw_readl(addr); 151 } 152 153 static u64 __flash_read64(void *addr) 154 { 155 /* No architectures currently implement __raw_readq() */ 156 return *(volatile u64 *)addr; 157 } 158 159 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 160 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 161 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 162 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 163 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 164 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 165 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 166 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 167 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 168 #else 169 #define flash_write8 __flash_write8 170 #define flash_write16 __flash_write16 171 #define flash_write32 __flash_write32 172 #define flash_write64 __flash_write64 173 #define flash_read8 __flash_read8 174 #define flash_read16 __flash_read16 175 #define flash_read32 __flash_read32 176 #define flash_read64 __flash_read64 177 #endif 178 179 /*----------------------------------------------------------------------- 180 */ 181 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 182 flash_info_t *flash_get_info(ulong base) 183 { 184 int i; 185 flash_info_t *info = NULL; 186 187 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 188 info = & flash_info[i]; 189 if (info->size && info->start[0] <= base && 190 base <= info->start[0] + info->size - 1) 191 break; 192 } 193 194 return info; 195 } 196 #endif 197 198 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 199 { 200 if (sect != (info->sector_count - 1)) 201 return info->start[sect + 1] - info->start[sect]; 202 else 203 return info->start[0] + info->size - info->start[sect]; 204 } 205 206 /*----------------------------------------------------------------------- 207 * create an address based on the offset and the port width 208 */ 209 static inline void * 210 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 211 { 212 unsigned int byte_offset = offset * info->portwidth; 213 214 return (void *)(info->start[sect] + byte_offset); 215 } 216 217 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 218 unsigned int offset, void *addr) 219 { 220 } 221 222 /*----------------------------------------------------------------------- 223 * make a proper sized command based on the port and chip widths 224 */ 225 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 226 { 227 int i; 228 int cword_offset; 229 int cp_offset; 230 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 231 u32 cmd_le = cpu_to_le32(cmd); 232 #endif 233 uchar val; 234 uchar *cp = (uchar *) cmdbuf; 235 236 for (i = info->portwidth; i > 0; i--){ 237 cword_offset = (info->portwidth-i)%info->chipwidth; 238 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 239 cp_offset = info->portwidth - i; 240 val = *((uchar*)&cmd_le + cword_offset); 241 #else 242 cp_offset = i - 1; 243 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 244 #endif 245 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 246 } 247 } 248 249 #ifdef DEBUG 250 /*----------------------------------------------------------------------- 251 * Debug support 252 */ 253 static void print_longlong (char *str, unsigned long long data) 254 { 255 int i; 256 char *cp; 257 258 cp = (char *) &data; 259 for (i = 0; i < 8; i++) 260 sprintf (&str[i * 2], "%2.2x", *cp++); 261 } 262 263 static void flash_printqry (struct cfi_qry *qry) 264 { 265 u8 *p = (u8 *)qry; 266 int x, y; 267 268 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 269 debug("%02x : ", x); 270 for (y = 0; y < 16; y++) 271 debug("%2.2x ", p[x + y]); 272 debug(" "); 273 for (y = 0; y < 16; y++) { 274 unsigned char c = p[x + y]; 275 if (c >= 0x20 && c <= 0x7e) 276 debug("%c", c); 277 else 278 debug("."); 279 } 280 debug("\n"); 281 } 282 } 283 #endif 284 285 286 /*----------------------------------------------------------------------- 287 * read a character at a port width address 288 */ 289 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 290 { 291 uchar *cp; 292 uchar retval; 293 294 cp = flash_map (info, 0, offset); 295 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 296 retval = flash_read8(cp); 297 #else 298 retval = flash_read8(cp + info->portwidth - 1); 299 #endif 300 flash_unmap (info, 0, offset, cp); 301 return retval; 302 } 303 304 /*----------------------------------------------------------------------- 305 * read a word at a port width address, assume 16bit bus 306 */ 307 static inline ushort flash_read_word (flash_info_t * info, uint offset) 308 { 309 ushort *addr, retval; 310 311 addr = flash_map (info, 0, offset); 312 retval = flash_read16 (addr); 313 flash_unmap (info, 0, offset, addr); 314 return retval; 315 } 316 317 318 /*----------------------------------------------------------------------- 319 * read a long word by picking the least significant byte of each maximum 320 * port size word. Swap for ppc format. 321 */ 322 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 323 uint offset) 324 { 325 uchar *addr; 326 ulong retval; 327 328 #ifdef DEBUG 329 int x; 330 #endif 331 addr = flash_map (info, sect, offset); 332 333 #ifdef DEBUG 334 debug ("long addr is at %p info->portwidth = %d\n", addr, 335 info->portwidth); 336 for (x = 0; x < 4 * info->portwidth; x++) { 337 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 338 } 339 #endif 340 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 341 retval = ((flash_read8(addr) << 16) | 342 (flash_read8(addr + info->portwidth) << 24) | 343 (flash_read8(addr + 2 * info->portwidth)) | 344 (flash_read8(addr + 3 * info->portwidth) << 8)); 345 #else 346 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 347 (flash_read8(addr + info->portwidth - 1) << 16) | 348 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 349 (flash_read8(addr + 3 * info->portwidth - 1))); 350 #endif 351 flash_unmap(info, sect, offset, addr); 352 353 return retval; 354 } 355 356 /* 357 * Write a proper sized command to the correct address 358 */ 359 void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 360 uint offset, u32 cmd) 361 { 362 363 void *addr; 364 cfiword_t cword; 365 366 addr = flash_map (info, sect, offset); 367 flash_make_cmd (info, cmd, &cword); 368 switch (info->portwidth) { 369 case FLASH_CFI_8BIT: 370 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 371 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 372 flash_write8(cword.c, addr); 373 break; 374 case FLASH_CFI_16BIT: 375 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 376 cmd, cword.w, 377 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 378 flash_write16(cword.w, addr); 379 break; 380 case FLASH_CFI_32BIT: 381 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 382 cmd, cword.l, 383 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 384 flash_write32(cword.l, addr); 385 break; 386 case FLASH_CFI_64BIT: 387 #ifdef DEBUG 388 { 389 char str[20]; 390 391 print_longlong (str, cword.ll); 392 393 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 394 addr, cmd, str, 395 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 396 } 397 #endif 398 flash_write64(cword.ll, addr); 399 break; 400 } 401 402 /* Ensure all the instructions are fully finished */ 403 sync(); 404 405 flash_unmap(info, sect, offset, addr); 406 } 407 408 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 409 { 410 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 411 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 412 } 413 414 /*----------------------------------------------------------------------- 415 */ 416 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 417 uint offset, uchar cmd) 418 { 419 void *addr; 420 cfiword_t cword; 421 int retval; 422 423 addr = flash_map (info, sect, offset); 424 flash_make_cmd (info, cmd, &cword); 425 426 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 427 switch (info->portwidth) { 428 case FLASH_CFI_8BIT: 429 debug ("is= %x %x\n", flash_read8(addr), cword.c); 430 retval = (flash_read8(addr) == cword.c); 431 break; 432 case FLASH_CFI_16BIT: 433 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 434 retval = (flash_read16(addr) == cword.w); 435 break; 436 case FLASH_CFI_32BIT: 437 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 438 retval = (flash_read32(addr) == cword.l); 439 break; 440 case FLASH_CFI_64BIT: 441 #ifdef DEBUG 442 { 443 char str1[20]; 444 char str2[20]; 445 446 print_longlong (str1, flash_read64(addr)); 447 print_longlong (str2, cword.ll); 448 debug ("is= %s %s\n", str1, str2); 449 } 450 #endif 451 retval = (flash_read64(addr) == cword.ll); 452 break; 453 default: 454 retval = 0; 455 break; 456 } 457 flash_unmap(info, sect, offset, addr); 458 459 return retval; 460 } 461 462 /*----------------------------------------------------------------------- 463 */ 464 static int flash_isset (flash_info_t * info, flash_sect_t sect, 465 uint offset, uchar cmd) 466 { 467 void *addr; 468 cfiword_t cword; 469 int retval; 470 471 addr = flash_map (info, sect, offset); 472 flash_make_cmd (info, cmd, &cword); 473 switch (info->portwidth) { 474 case FLASH_CFI_8BIT: 475 retval = ((flash_read8(addr) & cword.c) == cword.c); 476 break; 477 case FLASH_CFI_16BIT: 478 retval = ((flash_read16(addr) & cword.w) == cword.w); 479 break; 480 case FLASH_CFI_32BIT: 481 retval = ((flash_read32(addr) & cword.l) == cword.l); 482 break; 483 case FLASH_CFI_64BIT: 484 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 485 break; 486 default: 487 retval = 0; 488 break; 489 } 490 flash_unmap(info, sect, offset, addr); 491 492 return retval; 493 } 494 495 /*----------------------------------------------------------------------- 496 */ 497 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 498 uint offset, uchar cmd) 499 { 500 void *addr; 501 cfiword_t cword; 502 int retval; 503 504 addr = flash_map (info, sect, offset); 505 flash_make_cmd (info, cmd, &cword); 506 switch (info->portwidth) { 507 case FLASH_CFI_8BIT: 508 retval = flash_read8(addr) != flash_read8(addr); 509 break; 510 case FLASH_CFI_16BIT: 511 retval = flash_read16(addr) != flash_read16(addr); 512 break; 513 case FLASH_CFI_32BIT: 514 retval = flash_read32(addr) != flash_read32(addr); 515 break; 516 case FLASH_CFI_64BIT: 517 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 518 (flash_read32(addr+4) != flash_read32(addr+4)) ); 519 break; 520 default: 521 retval = 0; 522 break; 523 } 524 flash_unmap(info, sect, offset, addr); 525 526 return retval; 527 } 528 529 /* 530 * flash_is_busy - check to see if the flash is busy 531 * 532 * This routine checks the status of the chip and returns true if the 533 * chip is busy. 534 */ 535 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 536 { 537 int retval; 538 539 switch (info->vendor) { 540 case CFI_CMDSET_INTEL_PROG_REGIONS: 541 case CFI_CMDSET_INTEL_STANDARD: 542 case CFI_CMDSET_INTEL_EXTENDED: 543 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 544 break; 545 case CFI_CMDSET_AMD_STANDARD: 546 case CFI_CMDSET_AMD_EXTENDED: 547 #ifdef CONFIG_FLASH_CFI_LEGACY 548 case CFI_CMDSET_AMD_LEGACY: 549 #endif 550 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 551 break; 552 default: 553 retval = 0; 554 } 555 debug ("flash_is_busy: %d\n", retval); 556 return retval; 557 } 558 559 /*----------------------------------------------------------------------- 560 * wait for XSR.7 to be set. Time out with an error if it does not. 561 * This routine does not set the flash to read-array mode. 562 */ 563 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 564 ulong tout, char *prompt) 565 { 566 ulong start; 567 568 #if CONFIG_SYS_HZ != 1000 569 if ((ulong)CONFIG_SYS_HZ > 100000) 570 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 571 else 572 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 573 #endif 574 575 /* Wait for command completion */ 576 reset_timer(); 577 start = get_timer (0); 578 while (flash_is_busy (info, sector)) { 579 if (get_timer (start) > tout) { 580 printf ("Flash %s timeout at address %lx data %lx\n", 581 prompt, info->start[sector], 582 flash_read_long (info, sector, 0)); 583 flash_write_cmd (info, sector, 0, info->cmd_reset); 584 return ERR_TIMOUT; 585 } 586 udelay (1); /* also triggers watchdog */ 587 } 588 return ERR_OK; 589 } 590 591 /*----------------------------------------------------------------------- 592 * Wait for XSR.7 to be set, if it times out print an error, otherwise 593 * do a full status check. 594 * 595 * This routine sets the flash to read-array mode. 596 */ 597 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 598 ulong tout, char *prompt) 599 { 600 int retcode; 601 602 retcode = flash_status_check (info, sector, tout, prompt); 603 switch (info->vendor) { 604 case CFI_CMDSET_INTEL_PROG_REGIONS: 605 case CFI_CMDSET_INTEL_EXTENDED: 606 case CFI_CMDSET_INTEL_STANDARD: 607 if ((retcode != ERR_OK) 608 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 609 retcode = ERR_INVAL; 610 printf ("Flash %s error at address %lx\n", prompt, 611 info->start[sector]); 612 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 613 FLASH_STATUS_PSLBS)) { 614 puts ("Command Sequence Error.\n"); 615 } else if (flash_isset (info, sector, 0, 616 FLASH_STATUS_ECLBS)) { 617 puts ("Block Erase Error.\n"); 618 retcode = ERR_NOT_ERASED; 619 } else if (flash_isset (info, sector, 0, 620 FLASH_STATUS_PSLBS)) { 621 puts ("Locking Error\n"); 622 } 623 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 624 puts ("Block locked.\n"); 625 retcode = ERR_PROTECTED; 626 } 627 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 628 puts ("Vpp Low Error.\n"); 629 } 630 flash_write_cmd (info, sector, 0, info->cmd_reset); 631 break; 632 default: 633 break; 634 } 635 return retcode; 636 } 637 638 static int use_flash_status_poll(flash_info_t *info) 639 { 640 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 641 if (info->vendor == CFI_CMDSET_AMD_EXTENDED || 642 info->vendor == CFI_CMDSET_AMD_STANDARD) 643 return 1; 644 #endif 645 return 0; 646 } 647 648 static int flash_status_poll(flash_info_t *info, void *src, void *dst, 649 ulong tout, char *prompt) 650 { 651 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 652 ulong start; 653 int ready; 654 655 #if CONFIG_SYS_HZ != 1000 656 if ((ulong)CONFIG_SYS_HZ > 100000) 657 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 658 else 659 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 660 #endif 661 662 /* Wait for command completion */ 663 reset_timer(); 664 start = get_timer(0); 665 while (1) { 666 switch (info->portwidth) { 667 case FLASH_CFI_8BIT: 668 ready = flash_read8(dst) == flash_read8(src); 669 break; 670 case FLASH_CFI_16BIT: 671 ready = flash_read16(dst) == flash_read16(src); 672 break; 673 case FLASH_CFI_32BIT: 674 ready = flash_read32(dst) == flash_read32(src); 675 break; 676 case FLASH_CFI_64BIT: 677 ready = flash_read64(dst) == flash_read64(src); 678 break; 679 default: 680 ready = 0; 681 break; 682 } 683 if (ready) 684 break; 685 if (get_timer(start) > tout) { 686 printf("Flash %s timeout at address %lx data %lx\n", 687 prompt, (ulong)dst, (ulong)flash_read8(dst)); 688 return ERR_TIMOUT; 689 } 690 udelay(1); /* also triggers watchdog */ 691 } 692 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */ 693 return ERR_OK; 694 } 695 696 /*----------------------------------------------------------------------- 697 */ 698 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 699 { 700 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 701 unsigned short w; 702 unsigned int l; 703 unsigned long long ll; 704 #endif 705 706 switch (info->portwidth) { 707 case FLASH_CFI_8BIT: 708 cword->c = c; 709 break; 710 case FLASH_CFI_16BIT: 711 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 712 w = c; 713 w <<= 8; 714 cword->w = (cword->w >> 8) | w; 715 #else 716 cword->w = (cword->w << 8) | c; 717 #endif 718 break; 719 case FLASH_CFI_32BIT: 720 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 721 l = c; 722 l <<= 24; 723 cword->l = (cword->l >> 8) | l; 724 #else 725 cword->l = (cword->l << 8) | c; 726 #endif 727 break; 728 case FLASH_CFI_64BIT: 729 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 730 ll = c; 731 ll <<= 56; 732 cword->ll = (cword->ll >> 8) | ll; 733 #else 734 cword->ll = (cword->ll << 8) | c; 735 #endif 736 break; 737 } 738 } 739 740 /* 741 * Loop through the sector table starting from the previously found sector. 742 * Searches forwards or backwards, dependent on the passed address. 743 */ 744 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 745 { 746 static flash_sect_t saved_sector = 0; /* previously found sector */ 747 static flash_info_t *saved_info = 0; /* previously used flash bank */ 748 flash_sect_t sector = saved_sector; 749 750 if ((info != saved_info) || (sector >= info->sector_count)) 751 sector = 0; 752 753 while ((info->start[sector] < addr) 754 && (sector < info->sector_count - 1)) 755 sector++; 756 while ((info->start[sector] > addr) && (sector > 0)) 757 /* 758 * also decrements the sector in case of an overshot 759 * in the first loop 760 */ 761 sector--; 762 763 saved_sector = sector; 764 saved_info = info; 765 return sector; 766 } 767 768 /*----------------------------------------------------------------------- 769 */ 770 static int flash_write_cfiword (flash_info_t * info, ulong dest, 771 cfiword_t cword) 772 { 773 void *dstaddr = (void *)dest; 774 int flag; 775 flash_sect_t sect = 0; 776 char sect_found = 0; 777 778 /* Check if Flash is (sufficiently) erased */ 779 switch (info->portwidth) { 780 case FLASH_CFI_8BIT: 781 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 782 break; 783 case FLASH_CFI_16BIT: 784 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 785 break; 786 case FLASH_CFI_32BIT: 787 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 788 break; 789 case FLASH_CFI_64BIT: 790 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 791 break; 792 default: 793 flag = 0; 794 break; 795 } 796 if (!flag) 797 return ERR_NOT_ERASED; 798 799 /* Disable interrupts which might cause a timeout here */ 800 flag = disable_interrupts (); 801 802 switch (info->vendor) { 803 case CFI_CMDSET_INTEL_PROG_REGIONS: 804 case CFI_CMDSET_INTEL_EXTENDED: 805 case CFI_CMDSET_INTEL_STANDARD: 806 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 807 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 808 break; 809 case CFI_CMDSET_AMD_EXTENDED: 810 case CFI_CMDSET_AMD_STANDARD: 811 sect = find_sector(info, dest); 812 flash_unlock_seq (info, sect); 813 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 814 sect_found = 1; 815 break; 816 #ifdef CONFIG_FLASH_CFI_LEGACY 817 case CFI_CMDSET_AMD_LEGACY: 818 sect = find_sector(info, dest); 819 flash_unlock_seq (info, 0); 820 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 821 sect_found = 1; 822 break; 823 #endif 824 } 825 826 switch (info->portwidth) { 827 case FLASH_CFI_8BIT: 828 flash_write8(cword.c, dstaddr); 829 break; 830 case FLASH_CFI_16BIT: 831 flash_write16(cword.w, dstaddr); 832 break; 833 case FLASH_CFI_32BIT: 834 flash_write32(cword.l, dstaddr); 835 break; 836 case FLASH_CFI_64BIT: 837 flash_write64(cword.ll, dstaddr); 838 break; 839 } 840 841 /* re-enable interrupts if necessary */ 842 if (flag) 843 enable_interrupts (); 844 845 if (!sect_found) 846 sect = find_sector (info, dest); 847 848 if (use_flash_status_poll(info)) 849 return flash_status_poll(info, &cword, dstaddr, 850 info->write_tout, "write"); 851 else 852 return flash_full_status_check(info, sect, 853 info->write_tout, "write"); 854 } 855 856 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 857 858 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 859 int len) 860 { 861 flash_sect_t sector; 862 int cnt; 863 int retcode; 864 void *src = cp; 865 void *dst = (void *)dest; 866 void *dst2 = dst; 867 int flag = 0; 868 uint offset = 0; 869 unsigned int shift; 870 uchar write_cmd; 871 872 switch (info->portwidth) { 873 case FLASH_CFI_8BIT: 874 shift = 0; 875 break; 876 case FLASH_CFI_16BIT: 877 shift = 1; 878 break; 879 case FLASH_CFI_32BIT: 880 shift = 2; 881 break; 882 case FLASH_CFI_64BIT: 883 shift = 3; 884 break; 885 default: 886 retcode = ERR_INVAL; 887 goto out_unmap; 888 } 889 890 cnt = len >> shift; 891 892 while ((cnt-- > 0) && (flag == 0)) { 893 switch (info->portwidth) { 894 case FLASH_CFI_8BIT: 895 flag = ((flash_read8(dst2) & flash_read8(src)) == 896 flash_read8(src)); 897 src += 1, dst2 += 1; 898 break; 899 case FLASH_CFI_16BIT: 900 flag = ((flash_read16(dst2) & flash_read16(src)) == 901 flash_read16(src)); 902 src += 2, dst2 += 2; 903 break; 904 case FLASH_CFI_32BIT: 905 flag = ((flash_read32(dst2) & flash_read32(src)) == 906 flash_read32(src)); 907 src += 4, dst2 += 4; 908 break; 909 case FLASH_CFI_64BIT: 910 flag = ((flash_read64(dst2) & flash_read64(src)) == 911 flash_read64(src)); 912 src += 8, dst2 += 8; 913 break; 914 } 915 } 916 if (!flag) { 917 retcode = ERR_NOT_ERASED; 918 goto out_unmap; 919 } 920 921 src = cp; 922 sector = find_sector (info, dest); 923 924 switch (info->vendor) { 925 case CFI_CMDSET_INTEL_PROG_REGIONS: 926 case CFI_CMDSET_INTEL_STANDARD: 927 case CFI_CMDSET_INTEL_EXTENDED: 928 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 929 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 930 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 931 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 932 flash_write_cmd (info, sector, 0, write_cmd); 933 retcode = flash_status_check (info, sector, 934 info->buffer_write_tout, 935 "write to buffer"); 936 if (retcode == ERR_OK) { 937 /* reduce the number of loops by the width of 938 * the port */ 939 cnt = len >> shift; 940 flash_write_cmd (info, sector, 0, cnt - 1); 941 while (cnt-- > 0) { 942 switch (info->portwidth) { 943 case FLASH_CFI_8BIT: 944 flash_write8(flash_read8(src), dst); 945 src += 1, dst += 1; 946 break; 947 case FLASH_CFI_16BIT: 948 flash_write16(flash_read16(src), dst); 949 src += 2, dst += 2; 950 break; 951 case FLASH_CFI_32BIT: 952 flash_write32(flash_read32(src), dst); 953 src += 4, dst += 4; 954 break; 955 case FLASH_CFI_64BIT: 956 flash_write64(flash_read64(src), dst); 957 src += 8, dst += 8; 958 break; 959 default: 960 retcode = ERR_INVAL; 961 goto out_unmap; 962 } 963 } 964 flash_write_cmd (info, sector, 0, 965 FLASH_CMD_WRITE_BUFFER_CONFIRM); 966 retcode = flash_full_status_check ( 967 info, sector, info->buffer_write_tout, 968 "buffer write"); 969 } 970 971 break; 972 973 case CFI_CMDSET_AMD_STANDARD: 974 case CFI_CMDSET_AMD_EXTENDED: 975 flash_unlock_seq(info,0); 976 977 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 978 offset = ((unsigned long)dst - info->start[sector]) >> shift; 979 #endif 980 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 981 cnt = len >> shift; 982 flash_write_cmd(info, sector, offset, cnt - 1); 983 984 switch (info->portwidth) { 985 case FLASH_CFI_8BIT: 986 while (cnt-- > 0) { 987 flash_write8(flash_read8(src), dst); 988 src += 1, dst += 1; 989 } 990 break; 991 case FLASH_CFI_16BIT: 992 while (cnt-- > 0) { 993 flash_write16(flash_read16(src), dst); 994 src += 2, dst += 2; 995 } 996 break; 997 case FLASH_CFI_32BIT: 998 while (cnt-- > 0) { 999 flash_write32(flash_read32(src), dst); 1000 src += 4, dst += 4; 1001 } 1002 break; 1003 case FLASH_CFI_64BIT: 1004 while (cnt-- > 0) { 1005 flash_write64(flash_read64(src), dst); 1006 src += 8, dst += 8; 1007 } 1008 break; 1009 default: 1010 retcode = ERR_INVAL; 1011 goto out_unmap; 1012 } 1013 1014 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 1015 if (use_flash_status_poll(info)) 1016 retcode = flash_status_poll(info, src - (1 << shift), 1017 dst - (1 << shift), 1018 info->buffer_write_tout, 1019 "buffer write"); 1020 else 1021 retcode = flash_full_status_check(info, sector, 1022 info->buffer_write_tout, 1023 "buffer write"); 1024 break; 1025 1026 default: 1027 debug ("Unknown Command Set\n"); 1028 retcode = ERR_INVAL; 1029 break; 1030 } 1031 1032 out_unmap: 1033 return retcode; 1034 } 1035 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1036 1037 1038 /*----------------------------------------------------------------------- 1039 */ 1040 int flash_erase (flash_info_t * info, int s_first, int s_last) 1041 { 1042 int rcode = 0; 1043 int prot; 1044 flash_sect_t sect; 1045 int st; 1046 1047 if (info->flash_id != FLASH_MAN_CFI) { 1048 puts ("Can't erase unknown flash type - aborted\n"); 1049 return 1; 1050 } 1051 if ((s_first < 0) || (s_first > s_last)) { 1052 puts ("- no sectors to erase\n"); 1053 return 1; 1054 } 1055 1056 prot = 0; 1057 for (sect = s_first; sect <= s_last; ++sect) { 1058 if (info->protect[sect]) { 1059 prot++; 1060 } 1061 } 1062 if (prot) { 1063 printf ("- Warning: %d protected sectors will not be erased!\n", 1064 prot); 1065 } else if (flash_verbose) { 1066 putc ('\n'); 1067 } 1068 1069 1070 for (sect = s_first; sect <= s_last; sect++) { 1071 if (info->protect[sect] == 0) { /* not protected */ 1072 switch (info->vendor) { 1073 case CFI_CMDSET_INTEL_PROG_REGIONS: 1074 case CFI_CMDSET_INTEL_STANDARD: 1075 case CFI_CMDSET_INTEL_EXTENDED: 1076 flash_write_cmd (info, sect, 0, 1077 FLASH_CMD_CLEAR_STATUS); 1078 flash_write_cmd (info, sect, 0, 1079 FLASH_CMD_BLOCK_ERASE); 1080 flash_write_cmd (info, sect, 0, 1081 FLASH_CMD_ERASE_CONFIRM); 1082 break; 1083 case CFI_CMDSET_AMD_STANDARD: 1084 case CFI_CMDSET_AMD_EXTENDED: 1085 flash_unlock_seq (info, sect); 1086 flash_write_cmd (info, sect, 1087 info->addr_unlock1, 1088 AMD_CMD_ERASE_START); 1089 flash_unlock_seq (info, sect); 1090 flash_write_cmd (info, sect, 0, 1091 AMD_CMD_ERASE_SECTOR); 1092 break; 1093 #ifdef CONFIG_FLASH_CFI_LEGACY 1094 case CFI_CMDSET_AMD_LEGACY: 1095 flash_unlock_seq (info, 0); 1096 flash_write_cmd (info, 0, info->addr_unlock1, 1097 AMD_CMD_ERASE_START); 1098 flash_unlock_seq (info, 0); 1099 flash_write_cmd (info, sect, 0, 1100 AMD_CMD_ERASE_SECTOR); 1101 break; 1102 #endif 1103 default: 1104 debug ("Unkown flash vendor %d\n", 1105 info->vendor); 1106 break; 1107 } 1108 1109 if (use_flash_status_poll(info)) { 1110 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL; 1111 void *dest; 1112 dest = flash_map(info, sect, 0); 1113 st = flash_status_poll(info, &cword, dest, 1114 info->erase_blk_tout, "erase"); 1115 flash_unmap(info, sect, 0, dest); 1116 } else 1117 st = flash_full_status_check(info, sect, 1118 info->erase_blk_tout, 1119 "erase"); 1120 if (st) 1121 rcode = 1; 1122 else if (flash_verbose) 1123 putc ('.'); 1124 } 1125 } 1126 1127 if (flash_verbose) 1128 puts (" done\n"); 1129 1130 return rcode; 1131 } 1132 1133 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1134 static int sector_erased(flash_info_t *info, int i) 1135 { 1136 int k; 1137 int size; 1138 u32 *flash; 1139 1140 /* 1141 * Check if whole sector is erased 1142 */ 1143 size = flash_sector_size(info, i); 1144 flash = (u32 *)info->start[i]; 1145 /* divide by 4 for longword access */ 1146 size = size >> 2; 1147 1148 for (k = 0; k < size; k++) { 1149 if (flash_read32(flash++) != 0xffffffff) 1150 return 0; /* not erased */ 1151 } 1152 1153 return 1; /* erased */ 1154 } 1155 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */ 1156 1157 void flash_print_info (flash_info_t * info) 1158 { 1159 int i; 1160 1161 if (info->flash_id != FLASH_MAN_CFI) { 1162 puts ("missing or unknown FLASH type\n"); 1163 return; 1164 } 1165 1166 printf ("%s flash (%d x %d)", 1167 info->name, 1168 (info->portwidth << 3), (info->chipwidth << 3)); 1169 if (info->size < 1024*1024) 1170 printf (" Size: %ld kB in %d Sectors\n", 1171 info->size >> 10, info->sector_count); 1172 else 1173 printf (" Size: %ld MB in %d Sectors\n", 1174 info->size >> 20, info->sector_count); 1175 printf (" "); 1176 switch (info->vendor) { 1177 case CFI_CMDSET_INTEL_PROG_REGIONS: 1178 printf ("Intel Prog Regions"); 1179 break; 1180 case CFI_CMDSET_INTEL_STANDARD: 1181 printf ("Intel Standard"); 1182 break; 1183 case CFI_CMDSET_INTEL_EXTENDED: 1184 printf ("Intel Extended"); 1185 break; 1186 case CFI_CMDSET_AMD_STANDARD: 1187 printf ("AMD Standard"); 1188 break; 1189 case CFI_CMDSET_AMD_EXTENDED: 1190 printf ("AMD Extended"); 1191 break; 1192 #ifdef CONFIG_FLASH_CFI_LEGACY 1193 case CFI_CMDSET_AMD_LEGACY: 1194 printf ("AMD Legacy"); 1195 break; 1196 #endif 1197 default: 1198 printf ("Unknown (%d)", info->vendor); 1199 break; 1200 } 1201 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x", 1202 info->manufacturer_id); 1203 printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X", 1204 info->device_id); 1205 if ((info->device_id & 0xff) == 0x7E) { 1206 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X", 1207 info->device_id2); 1208 } 1209 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1210 info->erase_blk_tout, 1211 info->write_tout); 1212 if (info->buffer_size > 1) { 1213 printf (" Buffer write timeout: %ld ms, " 1214 "buffer size: %d bytes\n", 1215 info->buffer_write_tout, 1216 info->buffer_size); 1217 } 1218 1219 puts ("\n Sector Start Addresses:"); 1220 for (i = 0; i < info->sector_count; ++i) { 1221 if (ctrlc()) 1222 break; 1223 if ((i % 5) == 0) 1224 putc('\n'); 1225 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1226 /* print empty and read-only info */ 1227 printf (" %08lX %c %s ", 1228 info->start[i], 1229 sector_erased(info, i) ? 'E' : ' ', 1230 info->protect[i] ? "RO" : " "); 1231 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1232 printf (" %08lX %s ", 1233 info->start[i], 1234 info->protect[i] ? "RO" : " "); 1235 #endif 1236 } 1237 putc ('\n'); 1238 return; 1239 } 1240 1241 /*----------------------------------------------------------------------- 1242 * This is used in a few places in write_buf() to show programming 1243 * progress. Making it a function is nasty because it needs to do side 1244 * effect updates to digit and dots. Repeated code is nasty too, so 1245 * we define it once here. 1246 */ 1247 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1248 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1249 if (flash_verbose) { \ 1250 dots -= dots_sub; \ 1251 if ((scale > 0) && (dots <= 0)) { \ 1252 if ((digit % 5) == 0) \ 1253 printf ("%d", digit / 5); \ 1254 else \ 1255 putc ('.'); \ 1256 digit--; \ 1257 dots += scale; \ 1258 } \ 1259 } 1260 #else 1261 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1262 #endif 1263 1264 /*----------------------------------------------------------------------- 1265 * Copy memory to flash, returns: 1266 * 0 - OK 1267 * 1 - write timeout 1268 * 2 - Flash not erased 1269 */ 1270 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1271 { 1272 ulong wp; 1273 uchar *p; 1274 int aln; 1275 cfiword_t cword; 1276 int i, rc; 1277 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1278 int buffered_size; 1279 #endif 1280 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1281 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1282 int scale = 0; 1283 int dots = 0; 1284 1285 /* 1286 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1287 */ 1288 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1289 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1290 CONFIG_FLASH_SHOW_PROGRESS); 1291 } 1292 #endif 1293 1294 /* get lower aligned address */ 1295 wp = (addr & ~(info->portwidth - 1)); 1296 1297 /* handle unaligned start */ 1298 if ((aln = addr - wp) != 0) { 1299 cword.l = 0; 1300 p = (uchar *)wp; 1301 for (i = 0; i < aln; ++i) 1302 flash_add_byte (info, &cword, flash_read8(p + i)); 1303 1304 for (; (i < info->portwidth) && (cnt > 0); i++) { 1305 flash_add_byte (info, &cword, *src++); 1306 cnt--; 1307 } 1308 for (; (cnt == 0) && (i < info->portwidth); ++i) 1309 flash_add_byte (info, &cword, flash_read8(p + i)); 1310 1311 rc = flash_write_cfiword (info, wp, cword); 1312 if (rc != 0) 1313 return rc; 1314 1315 wp += i; 1316 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1317 } 1318 1319 /* handle the aligned part */ 1320 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1321 buffered_size = (info->portwidth / info->chipwidth); 1322 buffered_size *= info->buffer_size; 1323 while (cnt >= info->portwidth) { 1324 /* prohibit buffer write when buffer_size is 1 */ 1325 if (info->buffer_size == 1) { 1326 cword.l = 0; 1327 for (i = 0; i < info->portwidth; i++) 1328 flash_add_byte (info, &cword, *src++); 1329 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1330 return rc; 1331 wp += info->portwidth; 1332 cnt -= info->portwidth; 1333 continue; 1334 } 1335 1336 /* write buffer until next buffered_size aligned boundary */ 1337 i = buffered_size - (wp % buffered_size); 1338 if (i > cnt) 1339 i = cnt; 1340 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1341 return rc; 1342 i -= i & (info->portwidth - 1); 1343 wp += i; 1344 src += i; 1345 cnt -= i; 1346 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1347 } 1348 #else 1349 while (cnt >= info->portwidth) { 1350 cword.l = 0; 1351 for (i = 0; i < info->portwidth; i++) { 1352 flash_add_byte (info, &cword, *src++); 1353 } 1354 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1355 return rc; 1356 wp += info->portwidth; 1357 cnt -= info->portwidth; 1358 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1359 } 1360 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1361 1362 if (cnt == 0) { 1363 return (0); 1364 } 1365 1366 /* 1367 * handle unaligned tail bytes 1368 */ 1369 cword.l = 0; 1370 p = (uchar *)wp; 1371 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1372 flash_add_byte (info, &cword, *src++); 1373 --cnt; 1374 } 1375 for (; i < info->portwidth; ++i) 1376 flash_add_byte (info, &cword, flash_read8(p + i)); 1377 1378 return flash_write_cfiword (info, wp, cword); 1379 } 1380 1381 /*----------------------------------------------------------------------- 1382 */ 1383 #ifdef CONFIG_SYS_FLASH_PROTECTION 1384 1385 int flash_real_protect (flash_info_t * info, long sector, int prot) 1386 { 1387 int retcode = 0; 1388 1389 switch (info->vendor) { 1390 case CFI_CMDSET_INTEL_PROG_REGIONS: 1391 case CFI_CMDSET_INTEL_STANDARD: 1392 case CFI_CMDSET_INTEL_EXTENDED: 1393 /* 1394 * see errata called 1395 * "Numonyx Axcell P33/P30 Specification Update" :) 1396 */ 1397 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID); 1398 if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT, 1399 prot)) { 1400 /* 1401 * cmd must come before FLASH_CMD_PROTECT + 20us 1402 * Disable interrupts which might cause a timeout here. 1403 */ 1404 int flag = disable_interrupts (); 1405 unsigned short cmd; 1406 1407 if (prot) 1408 cmd = FLASH_CMD_PROTECT_SET; 1409 else 1410 cmd = FLASH_CMD_PROTECT_CLEAR; 1411 1412 flash_write_cmd (info, sector, 0, 1413 FLASH_CMD_PROTECT); 1414 flash_write_cmd (info, sector, 0, cmd); 1415 /* re-enable interrupts if necessary */ 1416 if (flag) 1417 enable_interrupts (); 1418 } 1419 break; 1420 case CFI_CMDSET_AMD_EXTENDED: 1421 case CFI_CMDSET_AMD_STANDARD: 1422 /* U-Boot only checks the first byte */ 1423 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1424 if (prot) { 1425 flash_unlock_seq (info, 0); 1426 flash_write_cmd (info, 0, 1427 info->addr_unlock1, 1428 ATM_CMD_SOFTLOCK_START); 1429 flash_unlock_seq (info, 0); 1430 flash_write_cmd (info, sector, 0, 1431 ATM_CMD_LOCK_SECT); 1432 } else { 1433 flash_write_cmd (info, 0, 1434 info->addr_unlock1, 1435 AMD_CMD_UNLOCK_START); 1436 if (info->device_id == ATM_ID_BV6416) 1437 flash_write_cmd (info, sector, 1438 0, ATM_CMD_UNLOCK_SECT); 1439 } 1440 } 1441 break; 1442 #ifdef CONFIG_FLASH_CFI_LEGACY 1443 case CFI_CMDSET_AMD_LEGACY: 1444 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1445 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1446 if (prot) 1447 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1448 else 1449 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1450 #endif 1451 }; 1452 1453 /* 1454 * Flash needs to be in status register read mode for 1455 * flash_full_status_check() to work correctly 1456 */ 1457 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS); 1458 if ((retcode = 1459 flash_full_status_check (info, sector, info->erase_blk_tout, 1460 prot ? "protect" : "unprotect")) == 0) { 1461 1462 info->protect[sector] = prot; 1463 1464 /* 1465 * On some of Intel's flash chips (marked via legacy_unlock) 1466 * unprotect unprotects all locking. 1467 */ 1468 if ((prot == 0) && (info->legacy_unlock)) { 1469 flash_sect_t i; 1470 1471 for (i = 0; i < info->sector_count; i++) { 1472 if (info->protect[i]) 1473 flash_real_protect (info, i, 1); 1474 } 1475 } 1476 } 1477 return retcode; 1478 } 1479 1480 /*----------------------------------------------------------------------- 1481 * flash_read_user_serial - read the OneTimeProgramming cells 1482 */ 1483 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1484 int len) 1485 { 1486 uchar *src; 1487 uchar *dst; 1488 1489 dst = buffer; 1490 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1491 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1492 memcpy (dst, src + offset, len); 1493 flash_write_cmd (info, 0, 0, info->cmd_reset); 1494 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1495 } 1496 1497 /* 1498 * flash_read_factory_serial - read the device Id from the protection area 1499 */ 1500 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1501 int len) 1502 { 1503 uchar *src; 1504 1505 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1506 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1507 memcpy (buffer, src + offset, len); 1508 flash_write_cmd (info, 0, 0, info->cmd_reset); 1509 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1510 } 1511 1512 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1513 1514 /*----------------------------------------------------------------------- 1515 * Reverse the order of the erase regions in the CFI QRY structure. 1516 * This is needed for chips that are either a) correctly detected as 1517 * top-boot, or b) buggy. 1518 */ 1519 static void cfi_reverse_geometry(struct cfi_qry *qry) 1520 { 1521 unsigned int i, j; 1522 u32 tmp; 1523 1524 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1525 tmp = qry->erase_region_info[i]; 1526 qry->erase_region_info[i] = qry->erase_region_info[j]; 1527 qry->erase_region_info[j] = tmp; 1528 } 1529 } 1530 1531 /*----------------------------------------------------------------------- 1532 * read jedec ids from device and set corresponding fields in info struct 1533 * 1534 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1535 * 1536 */ 1537 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1538 { 1539 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1540 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1541 udelay(1000); /* some flash are slow to respond */ 1542 info->manufacturer_id = flash_read_uchar (info, 1543 FLASH_OFFSET_MANUFACTURER_ID); 1544 info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ? 1545 flash_read_word (info, FLASH_OFFSET_DEVICE_ID) : 1546 flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID); 1547 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1548 } 1549 1550 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1551 { 1552 info->cmd_reset = FLASH_CMD_RESET; 1553 1554 cmdset_intel_read_jedec_ids(info); 1555 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1556 1557 #ifdef CONFIG_SYS_FLASH_PROTECTION 1558 /* read legacy lock/unlock bit from intel flash */ 1559 if (info->ext_addr) { 1560 info->legacy_unlock = flash_read_uchar (info, 1561 info->ext_addr + 5) & 0x08; 1562 } 1563 #endif 1564 1565 return 0; 1566 } 1567 1568 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1569 { 1570 ushort bankId = 0; 1571 uchar manuId; 1572 1573 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1574 flash_unlock_seq(info, 0); 1575 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1576 udelay(1000); /* some flash are slow to respond */ 1577 1578 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1579 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1580 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1581 bankId += 0x100; 1582 manuId = flash_read_uchar (info, 1583 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1584 } 1585 info->manufacturer_id = manuId; 1586 1587 switch (info->chipwidth){ 1588 case FLASH_CFI_8BIT: 1589 info->device_id = flash_read_uchar (info, 1590 FLASH_OFFSET_DEVICE_ID); 1591 if (info->device_id == 0x7E) { 1592 /* AMD 3-byte (expanded) device ids */ 1593 info->device_id2 = flash_read_uchar (info, 1594 FLASH_OFFSET_DEVICE_ID2); 1595 info->device_id2 <<= 8; 1596 info->device_id2 |= flash_read_uchar (info, 1597 FLASH_OFFSET_DEVICE_ID3); 1598 } 1599 break; 1600 case FLASH_CFI_16BIT: 1601 info->device_id = flash_read_word (info, 1602 FLASH_OFFSET_DEVICE_ID); 1603 if ((info->device_id & 0xff) == 0x7E) { 1604 /* AMD 3-byte (expanded) device ids */ 1605 info->device_id2 = flash_read_uchar (info, 1606 FLASH_OFFSET_DEVICE_ID2); 1607 info->device_id2 <<= 8; 1608 info->device_id2 |= flash_read_uchar (info, 1609 FLASH_OFFSET_DEVICE_ID3); 1610 } 1611 break; 1612 default: 1613 break; 1614 } 1615 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1616 } 1617 1618 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1619 { 1620 info->cmd_reset = AMD_CMD_RESET; 1621 1622 cmdset_amd_read_jedec_ids(info); 1623 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1624 1625 return 0; 1626 } 1627 1628 #ifdef CONFIG_FLASH_CFI_LEGACY 1629 static void flash_read_jedec_ids (flash_info_t * info) 1630 { 1631 info->manufacturer_id = 0; 1632 info->device_id = 0; 1633 info->device_id2 = 0; 1634 1635 switch (info->vendor) { 1636 case CFI_CMDSET_INTEL_PROG_REGIONS: 1637 case CFI_CMDSET_INTEL_STANDARD: 1638 case CFI_CMDSET_INTEL_EXTENDED: 1639 cmdset_intel_read_jedec_ids(info); 1640 break; 1641 case CFI_CMDSET_AMD_STANDARD: 1642 case CFI_CMDSET_AMD_EXTENDED: 1643 cmdset_amd_read_jedec_ids(info); 1644 break; 1645 default: 1646 break; 1647 } 1648 } 1649 1650 /*----------------------------------------------------------------------- 1651 * Call board code to request info about non-CFI flash. 1652 * board_flash_get_legacy needs to fill in at least: 1653 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1654 */ 1655 static int flash_detect_legacy(phys_addr_t base, int banknum) 1656 { 1657 flash_info_t *info = &flash_info[banknum]; 1658 1659 if (board_flash_get_legacy(base, banknum, info)) { 1660 /* board code may have filled info completely. If not, we 1661 use JEDEC ID probing. */ 1662 if (!info->vendor) { 1663 int modes[] = { 1664 CFI_CMDSET_AMD_STANDARD, 1665 CFI_CMDSET_INTEL_STANDARD 1666 }; 1667 int i; 1668 1669 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1670 info->vendor = modes[i]; 1671 info->start[0] = 1672 (ulong)map_physmem(base, 1673 info->portwidth, 1674 MAP_NOCACHE); 1675 if (info->portwidth == FLASH_CFI_8BIT 1676 && info->interface == FLASH_CFI_X8X16) { 1677 info->addr_unlock1 = 0x2AAA; 1678 info->addr_unlock2 = 0x5555; 1679 } else { 1680 info->addr_unlock1 = 0x5555; 1681 info->addr_unlock2 = 0x2AAA; 1682 } 1683 flash_read_jedec_ids(info); 1684 debug("JEDEC PROBE: ID %x %x %x\n", 1685 info->manufacturer_id, 1686 info->device_id, 1687 info->device_id2); 1688 if (jedec_flash_match(info, info->start[0])) 1689 break; 1690 else 1691 unmap_physmem((void *)info->start[0], 1692 MAP_NOCACHE); 1693 } 1694 } 1695 1696 switch(info->vendor) { 1697 case CFI_CMDSET_INTEL_PROG_REGIONS: 1698 case CFI_CMDSET_INTEL_STANDARD: 1699 case CFI_CMDSET_INTEL_EXTENDED: 1700 info->cmd_reset = FLASH_CMD_RESET; 1701 break; 1702 case CFI_CMDSET_AMD_STANDARD: 1703 case CFI_CMDSET_AMD_EXTENDED: 1704 case CFI_CMDSET_AMD_LEGACY: 1705 info->cmd_reset = AMD_CMD_RESET; 1706 break; 1707 } 1708 info->flash_id = FLASH_MAN_CFI; 1709 return 1; 1710 } 1711 return 0; /* use CFI */ 1712 } 1713 #else 1714 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1715 { 1716 return 0; /* use CFI */ 1717 } 1718 #endif 1719 1720 /*----------------------------------------------------------------------- 1721 * detect if flash is compatible with the Common Flash Interface (CFI) 1722 * http://www.jedec.org/download/search/jesd68.pdf 1723 */ 1724 static void flash_read_cfi (flash_info_t *info, void *buf, 1725 unsigned int start, size_t len) 1726 { 1727 u8 *p = buf; 1728 unsigned int i; 1729 1730 for (i = 0; i < len; i++) 1731 p[i] = flash_read_uchar(info, start + i); 1732 } 1733 1734 void __flash_cmd_reset(flash_info_t *info) 1735 { 1736 /* 1737 * We do not yet know what kind of commandset to use, so we issue 1738 * the reset command in both Intel and AMD variants, in the hope 1739 * that AMD flash roms ignore the Intel command. 1740 */ 1741 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1742 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1743 } 1744 void flash_cmd_reset(flash_info_t *info) 1745 __attribute__((weak,alias("__flash_cmd_reset"))); 1746 1747 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1748 { 1749 int cfi_offset; 1750 1751 /* Issue FLASH reset command */ 1752 flash_cmd_reset(info); 1753 1754 for (cfi_offset=0; 1755 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1756 cfi_offset++) { 1757 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1758 FLASH_CMD_CFI); 1759 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1760 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1761 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1762 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1763 sizeof(struct cfi_qry)); 1764 info->interface = le16_to_cpu(qry->interface_desc); 1765 1766 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1767 debug ("device interface is %d\n", 1768 info->interface); 1769 debug ("found port %d chip %d ", 1770 info->portwidth, info->chipwidth); 1771 debug ("port %d bits chip %d bits\n", 1772 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1773 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1774 1775 /* calculate command offsets as in the Linux driver */ 1776 info->addr_unlock1 = 0x555; 1777 info->addr_unlock2 = 0x2aa; 1778 1779 /* 1780 * modify the unlock address if we are 1781 * in compatibility mode 1782 */ 1783 if ( /* x8/x16 in x8 mode */ 1784 ((info->chipwidth == FLASH_CFI_BY8) && 1785 (info->interface == FLASH_CFI_X8X16)) || 1786 /* x16/x32 in x16 mode */ 1787 ((info->chipwidth == FLASH_CFI_BY16) && 1788 (info->interface == FLASH_CFI_X16X32))) 1789 { 1790 info->addr_unlock1 = 0xaaa; 1791 info->addr_unlock2 = 0x555; 1792 } 1793 1794 info->name = "CFI conformant"; 1795 return 1; 1796 } 1797 } 1798 1799 return 0; 1800 } 1801 1802 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1803 { 1804 debug ("flash detect cfi\n"); 1805 1806 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1807 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1808 for (info->chipwidth = FLASH_CFI_BY8; 1809 info->chipwidth <= info->portwidth; 1810 info->chipwidth <<= 1) 1811 if (__flash_detect_cfi(info, qry)) 1812 return 1; 1813 } 1814 debug ("not found\n"); 1815 return 0; 1816 } 1817 1818 /* 1819 * Manufacturer-specific quirks. Add workarounds for geometry 1820 * reversal, etc. here. 1821 */ 1822 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1823 { 1824 /* check if flash geometry needs reversal */ 1825 if (qry->num_erase_regions > 1) { 1826 /* reverse geometry if top boot part */ 1827 if (info->cfi_version < 0x3131) { 1828 /* CFI < 1.1, try to guess from device id */ 1829 if ((info->device_id & 0x80) != 0) 1830 cfi_reverse_geometry(qry); 1831 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1832 /* CFI >= 1.1, deduct from top/bottom flag */ 1833 /* note: ext_addr is valid since cfi_version > 0 */ 1834 cfi_reverse_geometry(qry); 1835 } 1836 } 1837 } 1838 1839 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1840 { 1841 int reverse_geometry = 0; 1842 1843 /* Check the "top boot" bit in the PRI */ 1844 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1845 reverse_geometry = 1; 1846 1847 /* AT49BV6416(T) list the erase regions in the wrong order. 1848 * However, the device ID is identical with the non-broken 1849 * AT49BV642D they differ in the high byte. 1850 */ 1851 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1852 reverse_geometry = !reverse_geometry; 1853 1854 if (reverse_geometry) 1855 cfi_reverse_geometry(qry); 1856 } 1857 1858 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1859 { 1860 /* check if flash geometry needs reversal */ 1861 if (qry->num_erase_regions > 1) { 1862 /* reverse geometry if top boot part */ 1863 if (info->cfi_version < 0x3131) { 1864 /* CFI < 1.1, guess by device id */ 1865 if (info->device_id == 0x22CA || /* M29W320DT */ 1866 info->device_id == 0x2256 || /* M29W320ET */ 1867 info->device_id == 0x22D7) { /* M29W800DT */ 1868 cfi_reverse_geometry(qry); 1869 } 1870 } 1871 } 1872 } 1873 1874 /* 1875 * The following code cannot be run from FLASH! 1876 * 1877 */ 1878 ulong flash_get_size (phys_addr_t base, int banknum) 1879 { 1880 flash_info_t *info = &flash_info[banknum]; 1881 int i, j; 1882 flash_sect_t sect_cnt; 1883 phys_addr_t sector; 1884 unsigned long tmp; 1885 int size_ratio; 1886 uchar num_erase_regions; 1887 int erase_region_size; 1888 int erase_region_count; 1889 struct cfi_qry qry; 1890 unsigned long max_size; 1891 1892 memset(&qry, 0, sizeof(qry)); 1893 1894 info->ext_addr = 0; 1895 info->cfi_version = 0; 1896 #ifdef CONFIG_SYS_FLASH_PROTECTION 1897 info->legacy_unlock = 0; 1898 #endif 1899 1900 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1901 1902 if (flash_detect_cfi (info, &qry)) { 1903 info->vendor = le16_to_cpu(qry.p_id); 1904 info->ext_addr = le16_to_cpu(qry.p_adr); 1905 num_erase_regions = qry.num_erase_regions; 1906 1907 if (info->ext_addr) { 1908 info->cfi_version = (ushort) flash_read_uchar (info, 1909 info->ext_addr + 3) << 8; 1910 info->cfi_version |= (ushort) flash_read_uchar (info, 1911 info->ext_addr + 4); 1912 } 1913 1914 #ifdef DEBUG 1915 flash_printqry (&qry); 1916 #endif 1917 1918 switch (info->vendor) { 1919 case CFI_CMDSET_INTEL_PROG_REGIONS: 1920 case CFI_CMDSET_INTEL_STANDARD: 1921 case CFI_CMDSET_INTEL_EXTENDED: 1922 cmdset_intel_init(info, &qry); 1923 break; 1924 case CFI_CMDSET_AMD_STANDARD: 1925 case CFI_CMDSET_AMD_EXTENDED: 1926 cmdset_amd_init(info, &qry); 1927 break; 1928 default: 1929 printf("CFI: Unknown command set 0x%x\n", 1930 info->vendor); 1931 /* 1932 * Unfortunately, this means we don't know how 1933 * to get the chip back to Read mode. Might 1934 * as well try an Intel-style reset... 1935 */ 1936 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1937 return 0; 1938 } 1939 1940 /* Do manufacturer-specific fixups */ 1941 switch (info->manufacturer_id) { 1942 case 0x0001: /* AMD */ 1943 case 0x0037: /* AMIC */ 1944 flash_fixup_amd(info, &qry); 1945 break; 1946 case 0x001f: 1947 flash_fixup_atmel(info, &qry); 1948 break; 1949 case 0x0020: 1950 flash_fixup_stm(info, &qry); 1951 break; 1952 } 1953 1954 debug ("manufacturer is %d\n", info->vendor); 1955 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1956 debug ("device id is 0x%x\n", info->device_id); 1957 debug ("device id2 is 0x%x\n", info->device_id2); 1958 debug ("cfi version is 0x%04x\n", info->cfi_version); 1959 1960 size_ratio = info->portwidth / info->chipwidth; 1961 /* if the chip is x8/x16 reduce the ratio by half */ 1962 if ((info->interface == FLASH_CFI_X8X16) 1963 && (info->chipwidth == FLASH_CFI_BY8)) { 1964 size_ratio >>= 1; 1965 } 1966 debug ("size_ratio %d port %d bits chip %d bits\n", 1967 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1968 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1969 info->size = 1 << qry.dev_size; 1970 /* multiply the size by the number of chips */ 1971 info->size *= size_ratio; 1972 max_size = cfi_flash_bank_size(banknum); 1973 if (max_size && (info->size > max_size)) { 1974 debug("[truncated from %ldMiB]", info->size >> 20); 1975 info->size = max_size; 1976 } 1977 debug ("found %d erase regions\n", num_erase_regions); 1978 sect_cnt = 0; 1979 sector = base; 1980 for (i = 0; i < num_erase_regions; i++) { 1981 if (i > NUM_ERASE_REGIONS) { 1982 printf ("%d erase regions found, only %d used\n", 1983 num_erase_regions, NUM_ERASE_REGIONS); 1984 break; 1985 } 1986 1987 tmp = le32_to_cpu(qry.erase_region_info[i]); 1988 debug("erase region %u: 0x%08lx\n", i, tmp); 1989 1990 erase_region_count = (tmp & 0xffff) + 1; 1991 tmp >>= 16; 1992 erase_region_size = 1993 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1994 debug ("erase_region_count = %d erase_region_size = %d\n", 1995 erase_region_count, erase_region_size); 1996 for (j = 0; j < erase_region_count; j++) { 1997 if (sector - base >= info->size) 1998 break; 1999 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 2000 printf("ERROR: too many flash sectors\n"); 2001 break; 2002 } 2003 info->start[sect_cnt] = 2004 (ulong)map_physmem(sector, 2005 info->portwidth, 2006 MAP_NOCACHE); 2007 sector += (erase_region_size * size_ratio); 2008 2009 /* 2010 * Only read protection status from 2011 * supported devices (intel...) 2012 */ 2013 switch (info->vendor) { 2014 case CFI_CMDSET_INTEL_PROG_REGIONS: 2015 case CFI_CMDSET_INTEL_EXTENDED: 2016 case CFI_CMDSET_INTEL_STANDARD: 2017 /* 2018 * Set flash to read-id mode. Otherwise 2019 * reading protected status is not 2020 * guaranteed. 2021 */ 2022 flash_write_cmd(info, sect_cnt, 0, 2023 FLASH_CMD_READ_ID); 2024 info->protect[sect_cnt] = 2025 flash_isset (info, sect_cnt, 2026 FLASH_OFFSET_PROTECT, 2027 FLASH_STATUS_PROTECT); 2028 break; 2029 default: 2030 /* default: not protected */ 2031 info->protect[sect_cnt] = 0; 2032 } 2033 2034 sect_cnt++; 2035 } 2036 } 2037 2038 info->sector_count = sect_cnt; 2039 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 2040 tmp = 1 << qry.block_erase_timeout_typ; 2041 info->erase_blk_tout = tmp * 2042 (1 << qry.block_erase_timeout_max); 2043 tmp = (1 << qry.buf_write_timeout_typ) * 2044 (1 << qry.buf_write_timeout_max); 2045 2046 /* round up when converting to ms */ 2047 info->buffer_write_tout = (tmp + 999) / 1000; 2048 tmp = (1 << qry.word_write_timeout_typ) * 2049 (1 << qry.word_write_timeout_max); 2050 /* round up when converting to ms */ 2051 info->write_tout = (tmp + 999) / 1000; 2052 info->flash_id = FLASH_MAN_CFI; 2053 if ((info->interface == FLASH_CFI_X8X16) && 2054 (info->chipwidth == FLASH_CFI_BY8)) { 2055 /* XXX - Need to test on x8/x16 in parallel. */ 2056 info->portwidth >>= 1; 2057 } 2058 2059 flash_write_cmd (info, 0, 0, info->cmd_reset); 2060 } 2061 2062 return (info->size); 2063 } 2064 2065 #ifdef CONFIG_FLASH_CFI_MTD 2066 void flash_set_verbose(uint v) 2067 { 2068 flash_verbose = v; 2069 } 2070 #endif 2071 2072 static void cfi_flash_set_config_reg(u32 base, u16 val) 2073 { 2074 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS 2075 /* 2076 * Only set this config register if really defined 2077 * to a valid value (0xffff is invalid) 2078 */ 2079 if (val == 0xffff) 2080 return; 2081 2082 /* 2083 * Set configuration register. Data is "encrypted" in the 16 lower 2084 * address bits. 2085 */ 2086 flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1))); 2087 flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1))); 2088 2089 /* 2090 * Finally issue reset-command to bring device back to 2091 * read-array mode 2092 */ 2093 flash_write16(FLASH_CMD_RESET, (void *)base); 2094 #endif 2095 } 2096 2097 /*----------------------------------------------------------------------- 2098 */ 2099 2100 void flash_protect_default(void) 2101 { 2102 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2103 int i; 2104 struct apl_s { 2105 ulong start; 2106 ulong size; 2107 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 2108 #endif 2109 2110 /* Monitor protection ON by default */ 2111 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \ 2112 (!defined(CONFIG_MONITOR_IS_IN_RAM)) 2113 flash_protect(FLAG_PROTECT_SET, 2114 CONFIG_SYS_MONITOR_BASE, 2115 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2116 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2117 #endif 2118 2119 /* Environment protection ON by default */ 2120 #ifdef CONFIG_ENV_IS_IN_FLASH 2121 flash_protect(FLAG_PROTECT_SET, 2122 CONFIG_ENV_ADDR, 2123 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2124 flash_get_info(CONFIG_ENV_ADDR)); 2125 #endif 2126 2127 /* Redundant environment protection ON by default */ 2128 #ifdef CONFIG_ENV_ADDR_REDUND 2129 flash_protect(FLAG_PROTECT_SET, 2130 CONFIG_ENV_ADDR_REDUND, 2131 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2132 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2133 #endif 2134 2135 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2136 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2137 debug("autoprotecting from %08x to %08x\n", 2138 apl[i].start, apl[i].start + apl[i].size - 1); 2139 flash_protect(FLAG_PROTECT_SET, 2140 apl[i].start, 2141 apl[i].start + apl[i].size - 1, 2142 flash_get_info(apl[i].start)); 2143 } 2144 #endif 2145 } 2146 2147 unsigned long flash_init (void) 2148 { 2149 unsigned long size = 0; 2150 int i; 2151 2152 #ifdef CONFIG_SYS_FLASH_PROTECTION 2153 /* read environment from EEPROM */ 2154 char s[64]; 2155 getenv_f("unlock", s, sizeof(s)); 2156 #endif 2157 2158 /* Init: no FLASHes known */ 2159 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 2160 flash_info[i].flash_id = FLASH_UNKNOWN; 2161 2162 /* Optionally write flash configuration register */ 2163 cfi_flash_set_config_reg(cfi_flash_bank_addr(i), 2164 cfi_flash_config_reg(i)); 2165 2166 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i)) 2167 flash_get_size(cfi_flash_bank_addr(i), i); 2168 size += flash_info[i].size; 2169 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2170 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2171 printf ("## Unknown flash on Bank %d " 2172 "- Size = 0x%08lx = %ld MB\n", 2173 i+1, flash_info[i].size, 2174 flash_info[i].size >> 20); 2175 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2176 } 2177 #ifdef CONFIG_SYS_FLASH_PROTECTION 2178 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 2179 /* 2180 * Only the U-Boot image and it's environment 2181 * is protected, all other sectors are 2182 * unprotected (unlocked) if flash hardware 2183 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2184 * and the environment variable "unlock" is 2185 * set to "yes". 2186 */ 2187 if (flash_info[i].legacy_unlock) { 2188 int k; 2189 2190 /* 2191 * Disable legacy_unlock temporarily, 2192 * since flash_real_protect would 2193 * relock all other sectors again 2194 * otherwise. 2195 */ 2196 flash_info[i].legacy_unlock = 0; 2197 2198 /* 2199 * Legacy unlocking (e.g. Intel J3) -> 2200 * unlock only one sector. This will 2201 * unlock all sectors. 2202 */ 2203 flash_real_protect (&flash_info[i], 0, 0); 2204 2205 flash_info[i].legacy_unlock = 1; 2206 2207 /* 2208 * Manually mark other sectors as 2209 * unlocked (unprotected) 2210 */ 2211 for (k = 1; k < flash_info[i].sector_count; k++) 2212 flash_info[i].protect[k] = 0; 2213 } else { 2214 /* 2215 * No legancy unlocking -> unlock all sectors 2216 */ 2217 flash_protect (FLAG_PROTECT_CLEAR, 2218 flash_info[i].start[0], 2219 flash_info[i].start[0] 2220 + flash_info[i].size - 1, 2221 &flash_info[i]); 2222 } 2223 } 2224 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2225 } 2226 2227 flash_protect_default(); 2228 #ifdef CONFIG_FLASH_CFI_MTD 2229 cfi_mtd_init(); 2230 #endif 2231 2232 return (size); 2233 } 2234