1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #ifdef CFG_FLASH_CFI_DRIVER 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 #ifndef CFG_FLASH_BANKS_LIST 66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } 67 #endif 68 69 #define FLASH_CMD_CFI 0x98 70 #define FLASH_CMD_READ_ID 0x90 71 #define FLASH_CMD_RESET 0xff 72 #define FLASH_CMD_BLOCK_ERASE 0x20 73 #define FLASH_CMD_ERASE_CONFIRM 0xD0 74 #define FLASH_CMD_WRITE 0x40 75 #define FLASH_CMD_PROTECT 0x60 76 #define FLASH_CMD_PROTECT_SET 0x01 77 #define FLASH_CMD_PROTECT_CLEAR 0xD0 78 #define FLASH_CMD_CLEAR_STATUS 0x50 79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8 80 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0 81 82 #define FLASH_STATUS_DONE 0x80 83 #define FLASH_STATUS_ESS 0x40 84 #define FLASH_STATUS_ECLBS 0x20 85 #define FLASH_STATUS_PSLBS 0x10 86 #define FLASH_STATUS_VPENS 0x08 87 #define FLASH_STATUS_PSS 0x04 88 #define FLASH_STATUS_DPS 0x02 89 #define FLASH_STATUS_R 0x01 90 #define FLASH_STATUS_PROTECT 0x01 91 92 #define AMD_CMD_RESET 0xF0 93 #define AMD_CMD_WRITE 0xA0 94 #define AMD_CMD_ERASE_START 0x80 95 #define AMD_CMD_ERASE_SECTOR 0x30 96 #define AMD_CMD_UNLOCK_START 0xAA 97 #define AMD_CMD_UNLOCK_ACK 0x55 98 #define AMD_CMD_WRITE_TO_BUFFER 0x25 99 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 100 101 #define AMD_STATUS_TOGGLE 0x40 102 #define AMD_STATUS_ERROR 0x20 103 104 #define FLASH_OFFSET_MANUFACTURER_ID 0x00 105 #define FLASH_OFFSET_DEVICE_ID 0x01 106 #define FLASH_OFFSET_DEVICE_ID2 0x0E 107 #define FLASH_OFFSET_DEVICE_ID3 0x0F 108 #define FLASH_OFFSET_CFI 0x55 109 #define FLASH_OFFSET_CFI_ALT 0x555 110 #define FLASH_OFFSET_CFI_RESP 0x10 111 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 112 /* extended query table primary address */ 113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 114 #define FLASH_OFFSET_WTOUT 0x1F 115 #define FLASH_OFFSET_WBTOUT 0x20 116 #define FLASH_OFFSET_ETOUT 0x21 117 #define FLASH_OFFSET_CETOUT 0x22 118 #define FLASH_OFFSET_WMAX_TOUT 0x23 119 #define FLASH_OFFSET_WBMAX_TOUT 0x24 120 #define FLASH_OFFSET_EMAX_TOUT 0x25 121 #define FLASH_OFFSET_CEMAX_TOUT 0x26 122 #define FLASH_OFFSET_SIZE 0x27 123 #define FLASH_OFFSET_INTERFACE 0x28 124 #define FLASH_OFFSET_BUFFER_SIZE 0x2A 125 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C 126 #define FLASH_OFFSET_ERASE_REGIONS 0x2D 127 #define FLASH_OFFSET_PROTECT 0x02 128 #define FLASH_OFFSET_USER_PROTECTION 0x85 129 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 130 131 #define CFI_CMDSET_NONE 0 132 #define CFI_CMDSET_INTEL_EXTENDED 1 133 #define CFI_CMDSET_AMD_STANDARD 2 134 #define CFI_CMDSET_INTEL_STANDARD 3 135 #define CFI_CMDSET_AMD_EXTENDED 4 136 #define CFI_CMDSET_MITSU_STANDARD 256 137 #define CFI_CMDSET_MITSU_EXTENDED 257 138 #define CFI_CMDSET_SST 258 139 140 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ 141 # undef FLASH_CMD_RESET 142 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ 143 #endif 144 145 typedef union { 146 unsigned char c; 147 unsigned short w; 148 unsigned long l; 149 unsigned long long ll; 150 } cfiword_t; 151 152 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ 153 154 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 155 156 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */ 157 #ifdef CFG_MAX_FLASH_BANKS_DETECT 158 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST; 159 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */ 160 #else 161 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST; 162 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */ 163 #endif 164 165 /* 166 * Check if chip width is defined. If not, start detecting with 8bit. 167 */ 168 #ifndef CFG_FLASH_CFI_WIDTH 169 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT 170 #endif 171 172 typedef unsigned long flash_sect_t; 173 174 static void flash_write8(u8 value, void *addr) 175 { 176 __raw_writeb(value, addr); 177 } 178 179 static void flash_write16(u16 value, void *addr) 180 { 181 __raw_writew(value, addr); 182 } 183 184 static void flash_write32(u32 value, void *addr) 185 { 186 __raw_writel(value, addr); 187 } 188 189 static void flash_write64(u64 value, void *addr) 190 { 191 /* No architectures currently implement __raw_writeq() */ 192 *(volatile u64 *)addr = value; 193 } 194 195 static u8 flash_read8(void *addr) 196 { 197 return __raw_readb(addr); 198 } 199 200 static u16 flash_read16(void *addr) 201 { 202 return __raw_readw(addr); 203 } 204 205 static u32 flash_read32(void *addr) 206 { 207 return __raw_readl(addr); 208 } 209 210 static u64 flash_read64(void *addr) 211 { 212 /* No architectures currently implement __raw_readq() */ 213 return *(volatile u64 *)addr; 214 } 215 216 /*----------------------------------------------------------------------- 217 */ 218 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) 219 static flash_info_t *flash_get_info(ulong base) 220 { 221 int i; 222 flash_info_t * info = 0; 223 224 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { 225 info = & flash_info[i]; 226 if (info->size && info->start[0] <= base && 227 base <= info->start[0] + info->size - 1) 228 break; 229 } 230 231 return i == CFG_MAX_FLASH_BANKS ? 0 : info; 232 } 233 #endif 234 235 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 236 { 237 if (sect != (info->sector_count - 1)) 238 return info->start[sect + 1] - info->start[sect]; 239 else 240 return info->start[0] + info->size - info->start[sect]; 241 } 242 243 /*----------------------------------------------------------------------- 244 * create an address based on the offset and the port width 245 */ 246 static inline void * 247 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 248 { 249 unsigned int byte_offset = offset * info->portwidth; 250 251 return map_physmem(info->start[sect] + byte_offset, 252 flash_sector_size(info, sect) - byte_offset, 253 MAP_NOCACHE); 254 } 255 256 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 257 unsigned int offset, void *addr) 258 { 259 unsigned int byte_offset = offset * info->portwidth; 260 261 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset); 262 } 263 264 /*----------------------------------------------------------------------- 265 * make a proper sized command based on the port and chip widths 266 */ 267 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf) 268 { 269 int i; 270 uchar *cp = (uchar *) cmdbuf; 271 272 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 273 for (i = info->portwidth; i > 0; i--) 274 #else 275 for (i = 1; i <= info->portwidth; i++) 276 #endif 277 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd; 278 } 279 280 #ifdef DEBUG 281 /*----------------------------------------------------------------------- 282 * Debug support 283 */ 284 static void print_longlong (char *str, unsigned long long data) 285 { 286 int i; 287 char *cp; 288 289 cp = (unsigned char *) &data; 290 for (i = 0; i < 8; i++) 291 sprintf (&str[i * 2], "%2.2x", *cp++); 292 } 293 294 static void flash_printqry (flash_info_t * info, flash_sect_t sect) 295 { 296 void *addr; 297 int x, y; 298 299 for (x = 0; x < 0x40; x += 16U / info->portwidth) { 300 addr = flash_map(info, sect, x + FLASH_OFFSET_CFI_RESP); 301 debug ("%p : ", addr); 302 for (y = 0; y < 16; y++) { 303 debug ("%2.2x ", flash_read8(addr + y)); 304 } 305 debug (" "); 306 for (y = 0; y < 16; y++) { 307 unsigned char c = flash_read8(addr + y); 308 if (c >= 0x20 && c <= 0x7e) { 309 debug ("%c", c); 310 } else { 311 debug ("."); 312 } 313 } 314 debug ("\n"); 315 flash_unmap(info, sect, x + FLASH_OFFSET_CFI_RESP, addr); 316 } 317 } 318 #endif 319 320 321 /*----------------------------------------------------------------------- 322 * read a character at a port width address 323 */ 324 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 325 { 326 uchar *cp; 327 uchar retval; 328 329 cp = flash_map (info, 0, offset); 330 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 331 retval = flash_read8(cp); 332 #else 333 retval = flash_read8(cp + info->portwidth - 1); 334 #endif 335 flash_unmap (info, 0, offset, cp); 336 return retval; 337 } 338 339 /*----------------------------------------------------------------------- 340 * read a short word by swapping for ppc format. 341 */ 342 static ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, 343 uint offset) 344 { 345 uchar *addr; 346 ushort retval; 347 348 #ifdef DEBUG 349 int x; 350 #endif 351 addr = flash_map (info, sect, offset); 352 353 #ifdef DEBUG 354 debug ("ushort addr is at %p info->portwidth = %d\n", addr, 355 info->portwidth); 356 for (x = 0; x < 2 * info->portwidth; x++) { 357 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 358 } 359 #endif 360 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 361 retval = ((flash_read8(addr + info->portwidth) << 8) | 362 flash_read8(addr)); 363 #else 364 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 8) | 365 flash_read8(addr + info->portwidth - 1)); 366 #endif 367 368 debug ("retval = 0x%x\n", retval); 369 flash_unmap (info, sect, offset, addr); 370 371 return retval; 372 } 373 374 /*----------------------------------------------------------------------- 375 * read a long word by picking the least significant byte of each maximum 376 * port size word. Swap for ppc format. 377 */ 378 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 379 uint offset) 380 { 381 uchar *addr; 382 ulong retval; 383 384 #ifdef DEBUG 385 int x; 386 #endif 387 addr = flash_map (info, sect, offset); 388 389 #ifdef DEBUG 390 debug ("long addr is at %p info->portwidth = %d\n", addr, 391 info->portwidth); 392 for (x = 0; x < 4 * info->portwidth; x++) { 393 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 394 } 395 #endif 396 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) 397 retval = ((flash_read8(addr) << 16) | 398 (flash_read8(addr + info->portwidth) << 24) | 399 (flash_read8(addr + 2 * info->portwidth)) | 400 (flash_read8(addr + 3 * info->portwidth) << 8)); 401 #else 402 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 403 (flash_read8(addr + info->portwidth - 1) << 16) | 404 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 405 (flash_read8(addr + 3 * info->portwidth - 1))); 406 #endif 407 flash_unmap(info, sect, offset, addr); 408 409 return retval; 410 } 411 412 /* 413 * Write a proper sized command to the correct address 414 */ 415 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 416 uint offset, uchar cmd) 417 { 418 419 void *addr; 420 cfiword_t cword; 421 422 addr = flash_map (info, sect, offset); 423 flash_make_cmd (info, cmd, &cword); 424 switch (info->portwidth) { 425 case FLASH_CFI_8BIT: 426 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 427 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 428 flash_write8(cword.c, addr); 429 break; 430 case FLASH_CFI_16BIT: 431 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 432 cmd, cword.w, 433 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 434 flash_write16(cword.w, addr); 435 break; 436 case FLASH_CFI_32BIT: 437 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 438 cmd, cword.l, 439 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 440 flash_write32(cword.l, addr); 441 break; 442 case FLASH_CFI_64BIT: 443 #ifdef DEBUG 444 { 445 char str[20]; 446 447 print_longlong (str, cword.ll); 448 449 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 450 addr, cmd, str, 451 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 452 } 453 #endif 454 flash_write64(cword.ll, addr); 455 break; 456 } 457 458 /* Ensure all the instructions are fully finished */ 459 sync(); 460 461 flash_unmap(info, sect, offset, addr); 462 } 463 464 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 465 { 466 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 467 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 468 } 469 470 /*----------------------------------------------------------------------- 471 */ 472 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 473 uint offset, uchar cmd) 474 { 475 void *addr; 476 cfiword_t cword; 477 int retval; 478 479 addr = flash_map (info, sect, offset); 480 flash_make_cmd (info, cmd, &cword); 481 482 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 483 switch (info->portwidth) { 484 case FLASH_CFI_8BIT: 485 debug ("is= %x %x\n", flash_read8(addr), cword.c); 486 retval = (flash_read8(addr) == cword.c); 487 break; 488 case FLASH_CFI_16BIT: 489 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 490 retval = (flash_read16(addr) == cword.w); 491 break; 492 case FLASH_CFI_32BIT: 493 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l); 494 retval = (flash_read32(addr) == cword.l); 495 break; 496 case FLASH_CFI_64BIT: 497 #ifdef DEBUG 498 { 499 char str1[20]; 500 char str2[20]; 501 502 print_longlong (str1, flash_read64(addr)); 503 print_longlong (str2, cword.ll); 504 debug ("is= %s %s\n", str1, str2); 505 } 506 #endif 507 retval = (flash_read64(addr) == cword.ll); 508 break; 509 default: 510 retval = 0; 511 break; 512 } 513 flash_unmap(info, sect, offset, addr); 514 515 return retval; 516 } 517 518 /*----------------------------------------------------------------------- 519 */ 520 static int flash_isset (flash_info_t * info, flash_sect_t sect, 521 uint offset, uchar cmd) 522 { 523 void *addr; 524 cfiword_t cword; 525 int retval; 526 527 addr = flash_map (info, sect, offset); 528 flash_make_cmd (info, cmd, &cword); 529 switch (info->portwidth) { 530 case FLASH_CFI_8BIT: 531 retval = ((flash_read8(addr) & cword.c) == cword.c); 532 break; 533 case FLASH_CFI_16BIT: 534 retval = ((flash_read16(addr) & cword.w) == cword.w); 535 break; 536 case FLASH_CFI_32BIT: 537 retval = ((flash_read16(addr) & cword.l) == cword.l); 538 break; 539 case FLASH_CFI_64BIT: 540 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 541 break; 542 default: 543 retval = 0; 544 break; 545 } 546 flash_unmap(info, sect, offset, addr); 547 548 return retval; 549 } 550 551 /*----------------------------------------------------------------------- 552 */ 553 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 554 uint offset, uchar cmd) 555 { 556 void *addr; 557 cfiword_t cword; 558 int retval; 559 560 addr = flash_map (info, sect, offset); 561 flash_make_cmd (info, cmd, &cword); 562 switch (info->portwidth) { 563 case FLASH_CFI_8BIT: 564 retval = ((flash_read8(addr) & cword.c) != 565 (flash_read8(addr) & cword.c)); 566 break; 567 case FLASH_CFI_16BIT: 568 retval = ((flash_read16(addr) & cword.w) != 569 (flash_read16(addr) & cword.w)); 570 break; 571 case FLASH_CFI_32BIT: 572 retval = ((flash_read32(addr) & cword.l) != 573 (flash_read32(addr) & cword.l)); 574 break; 575 case FLASH_CFI_64BIT: 576 retval = ((flash_read64(addr) & cword.ll) != 577 (flash_read64(addr) & cword.ll)); 578 break; 579 default: 580 retval = 0; 581 break; 582 } 583 flash_unmap(info, sect, offset, addr); 584 585 return retval; 586 } 587 588 /* 589 * flash_is_busy - check to see if the flash is busy 590 * 591 * This routine checks the status of the chip and returns true if the 592 * chip is busy. 593 */ 594 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 595 { 596 int retval; 597 598 switch (info->vendor) { 599 case CFI_CMDSET_INTEL_STANDARD: 600 case CFI_CMDSET_INTEL_EXTENDED: 601 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 602 break; 603 case CFI_CMDSET_AMD_STANDARD: 604 case CFI_CMDSET_AMD_EXTENDED: 605 #ifdef CONFIG_FLASH_CFI_LEGACY 606 case CFI_CMDSET_AMD_LEGACY: 607 #endif 608 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 609 break; 610 default: 611 retval = 0; 612 } 613 debug ("flash_is_busy: %d\n", retval); 614 return retval; 615 } 616 617 /*----------------------------------------------------------------------- 618 * wait for XSR.7 to be set. Time out with an error if it does not. 619 * This routine does not set the flash to read-array mode. 620 */ 621 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 622 ulong tout, char *prompt) 623 { 624 ulong start; 625 626 #if CFG_HZ != 1000 627 tout *= CFG_HZ/1000; 628 #endif 629 630 /* Wait for command completion */ 631 start = get_timer (0); 632 while (flash_is_busy (info, sector)) { 633 if (get_timer (start) > tout) { 634 printf ("Flash %s timeout at address %lx data %lx\n", 635 prompt, info->start[sector], 636 flash_read_long (info, sector, 0)); 637 flash_write_cmd (info, sector, 0, info->cmd_reset); 638 return ERR_TIMOUT; 639 } 640 udelay (1); /* also triggers watchdog */ 641 } 642 return ERR_OK; 643 } 644 645 /*----------------------------------------------------------------------- 646 * Wait for XSR.7 to be set, if it times out print an error, otherwise 647 * do a full status check. 648 * 649 * This routine sets the flash to read-array mode. 650 */ 651 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 652 ulong tout, char *prompt) 653 { 654 int retcode; 655 656 retcode = flash_status_check (info, sector, tout, prompt); 657 switch (info->vendor) { 658 case CFI_CMDSET_INTEL_EXTENDED: 659 case CFI_CMDSET_INTEL_STANDARD: 660 if ((retcode == ERR_OK) 661 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 662 retcode = ERR_INVAL; 663 printf ("Flash %s error at address %lx\n", prompt, 664 info->start[sector]); 665 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 666 FLASH_STATUS_PSLBS)) { 667 puts ("Command Sequence Error.\n"); 668 } else if (flash_isset (info, sector, 0, 669 FLASH_STATUS_ECLBS)) { 670 puts ("Block Erase Error.\n"); 671 retcode = ERR_NOT_ERASED; 672 } else if (flash_isset (info, sector, 0, 673 FLASH_STATUS_PSLBS)) { 674 puts ("Locking Error\n"); 675 } 676 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 677 puts ("Block locked.\n"); 678 retcode = ERR_PROTECTED; 679 } 680 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 681 puts ("Vpp Low Error.\n"); 682 } 683 flash_write_cmd (info, sector, 0, info->cmd_reset); 684 break; 685 default: 686 break; 687 } 688 return retcode; 689 } 690 691 /*----------------------------------------------------------------------- 692 */ 693 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 694 { 695 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 696 unsigned short w; 697 unsigned int l; 698 unsigned long long ll; 699 #endif 700 701 switch (info->portwidth) { 702 case FLASH_CFI_8BIT: 703 cword->c = c; 704 break; 705 case FLASH_CFI_16BIT: 706 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 707 w = c; 708 w <<= 8; 709 cword->w = (cword->w >> 8) | w; 710 #else 711 cword->w = (cword->w << 8) | c; 712 #endif 713 break; 714 case FLASH_CFI_32BIT: 715 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 716 l = c; 717 l <<= 24; 718 cword->l = (cword->l >> 8) | l; 719 #else 720 cword->l = (cword->l << 8) | c; 721 #endif 722 break; 723 case FLASH_CFI_64BIT: 724 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) 725 ll = c; 726 ll <<= 56; 727 cword->ll = (cword->ll >> 8) | ll; 728 #else 729 cword->ll = (cword->ll << 8) | c; 730 #endif 731 break; 732 } 733 } 734 735 /* loop through the sectors from the highest address when the passed 736 * address is greater or equal to the sector address we have a match 737 */ 738 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 739 { 740 flash_sect_t sector; 741 742 for (sector = info->sector_count - 1; sector >= 0; sector--) { 743 if (addr >= info->start[sector]) 744 break; 745 } 746 return sector; 747 } 748 749 /*----------------------------------------------------------------------- 750 */ 751 static int flash_write_cfiword (flash_info_t * info, ulong dest, 752 cfiword_t cword) 753 { 754 void *dstaddr; 755 int flag; 756 757 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE); 758 759 /* Check if Flash is (sufficiently) erased */ 760 switch (info->portwidth) { 761 case FLASH_CFI_8BIT: 762 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 763 break; 764 case FLASH_CFI_16BIT: 765 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 766 break; 767 case FLASH_CFI_32BIT: 768 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 769 break; 770 case FLASH_CFI_64BIT: 771 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 772 break; 773 default: 774 flag = 0; 775 break; 776 } 777 if (!flag) { 778 unmap_physmem(dstaddr, info->portwidth); 779 return 2; 780 } 781 782 /* Disable interrupts which might cause a timeout here */ 783 flag = disable_interrupts (); 784 785 switch (info->vendor) { 786 case CFI_CMDSET_INTEL_EXTENDED: 787 case CFI_CMDSET_INTEL_STANDARD: 788 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 789 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 790 break; 791 case CFI_CMDSET_AMD_EXTENDED: 792 case CFI_CMDSET_AMD_STANDARD: 793 #ifdef CONFIG_FLASH_CFI_LEGACY 794 case CFI_CMDSET_AMD_LEGACY: 795 #endif 796 flash_unlock_seq (info, 0); 797 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 798 break; 799 } 800 801 switch (info->portwidth) { 802 case FLASH_CFI_8BIT: 803 flash_write8(cword.c, dstaddr); 804 break; 805 case FLASH_CFI_16BIT: 806 flash_write16(cword.w, dstaddr); 807 break; 808 case FLASH_CFI_32BIT: 809 flash_write32(cword.l, dstaddr); 810 break; 811 case FLASH_CFI_64BIT: 812 flash_write64(cword.ll, dstaddr); 813 break; 814 } 815 816 /* re-enable interrupts if necessary */ 817 if (flag) 818 enable_interrupts (); 819 820 unmap_physmem(dstaddr, info->portwidth); 821 822 return flash_full_status_check (info, find_sector (info, dest), 823 info->write_tout, "write"); 824 } 825 826 #ifdef CFG_FLASH_USE_BUFFER_WRITE 827 828 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 829 int len) 830 { 831 flash_sect_t sector; 832 int cnt; 833 int retcode; 834 void *src = cp; 835 void *dst = map_physmem(dest, len, MAP_NOCACHE); 836 837 sector = find_sector (info, dest); 838 839 switch (info->vendor) { 840 case CFI_CMDSET_INTEL_STANDARD: 841 case CFI_CMDSET_INTEL_EXTENDED: 842 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 843 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); 844 retcode = flash_status_check (info, sector, 845 info->buffer_write_tout, 846 "write to buffer"); 847 if (retcode == ERR_OK) { 848 /* reduce the number of loops by the width of 849 * the port */ 850 switch (info->portwidth) { 851 case FLASH_CFI_8BIT: 852 cnt = len; 853 break; 854 case FLASH_CFI_16BIT: 855 cnt = len >> 1; 856 break; 857 case FLASH_CFI_32BIT: 858 cnt = len >> 2; 859 break; 860 case FLASH_CFI_64BIT: 861 cnt = len >> 3; 862 break; 863 default: 864 retcode = ERR_INVAL; 865 goto out_unmap; 866 } 867 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 868 while (cnt-- > 0) { 869 switch (info->portwidth) { 870 case FLASH_CFI_8BIT: 871 flash_write8(flash_read8(src), dst); 872 src += 1, dst += 1; 873 break; 874 case FLASH_CFI_16BIT: 875 flash_write16(flash_read16(src), dst); 876 src += 2, dst += 2; 877 break; 878 case FLASH_CFI_32BIT: 879 flash_write32(flash_read32(src), dst); 880 src += 4, dst += 4; 881 break; 882 case FLASH_CFI_64BIT: 883 flash_write64(flash_read64(src), dst); 884 src += 8, dst += 8; 885 break; 886 default: 887 retcode = ERR_INVAL; 888 goto out_unmap; 889 } 890 } 891 flash_write_cmd (info, sector, 0, 892 FLASH_CMD_WRITE_BUFFER_CONFIRM); 893 retcode = flash_full_status_check ( 894 info, sector, info->buffer_write_tout, 895 "buffer write"); 896 } 897 898 break; 899 900 case CFI_CMDSET_AMD_STANDARD: 901 case CFI_CMDSET_AMD_EXTENDED: 902 flash_unlock_seq(info,0); 903 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER); 904 905 switch (info->portwidth) { 906 case FLASH_CFI_8BIT: 907 cnt = len; 908 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 909 while (cnt-- > 0) { 910 flash_write8(flash_read8(src), dst); 911 src += 1, dst += 1; 912 } 913 break; 914 case FLASH_CFI_16BIT: 915 cnt = len >> 1; 916 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 917 while (cnt-- > 0) { 918 flash_write16(flash_read16(src), dst); 919 src += 2, dst += 2; 920 } 921 break; 922 case FLASH_CFI_32BIT: 923 cnt = len >> 2; 924 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 925 while (cnt-- > 0) { 926 flash_write32(flash_read32(src), dst); 927 src += 4, dst += 4; 928 } 929 break; 930 case FLASH_CFI_64BIT: 931 cnt = len >> 3; 932 flash_write_cmd (info, sector, 0, (uchar) cnt - 1); 933 while (cnt-- > 0) { 934 flash_write64(flash_read64(src), dst); 935 src += 8, dst += 8; 936 } 937 break; 938 default: 939 retcode = ERR_INVAL; 940 goto out_unmap; 941 } 942 943 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 944 retcode = flash_full_status_check (info, sector, 945 info->buffer_write_tout, 946 "buffer write"); 947 break; 948 949 default: 950 debug ("Unknown Command Set\n"); 951 retcode = ERR_INVAL; 952 break; 953 } 954 955 out_unmap: 956 unmap_physmem(dst, len); 957 return retcode; 958 } 959 #endif /* CFG_FLASH_USE_BUFFER_WRITE */ 960 961 962 /*----------------------------------------------------------------------- 963 */ 964 int flash_erase (flash_info_t * info, int s_first, int s_last) 965 { 966 int rcode = 0; 967 int prot; 968 flash_sect_t sect; 969 970 if (info->flash_id != FLASH_MAN_CFI) { 971 puts ("Can't erase unknown flash type - aborted\n"); 972 return 1; 973 } 974 if ((s_first < 0) || (s_first > s_last)) { 975 puts ("- no sectors to erase\n"); 976 return 1; 977 } 978 979 prot = 0; 980 for (sect = s_first; sect <= s_last; ++sect) { 981 if (info->protect[sect]) { 982 prot++; 983 } 984 } 985 if (prot) { 986 printf ("- Warning: %d protected sectors will not be erased!\n", 987 prot); 988 } else { 989 putc ('\n'); 990 } 991 992 993 for (sect = s_first; sect <= s_last; sect++) { 994 if (info->protect[sect] == 0) { /* not protected */ 995 switch (info->vendor) { 996 case CFI_CMDSET_INTEL_STANDARD: 997 case CFI_CMDSET_INTEL_EXTENDED: 998 flash_write_cmd (info, sect, 0, 999 FLASH_CMD_CLEAR_STATUS); 1000 flash_write_cmd (info, sect, 0, 1001 FLASH_CMD_BLOCK_ERASE); 1002 flash_write_cmd (info, sect, 0, 1003 FLASH_CMD_ERASE_CONFIRM); 1004 break; 1005 case CFI_CMDSET_AMD_STANDARD: 1006 case CFI_CMDSET_AMD_EXTENDED: 1007 flash_unlock_seq (info, sect); 1008 flash_write_cmd (info, sect, 1009 info->addr_unlock1, 1010 AMD_CMD_ERASE_START); 1011 flash_unlock_seq (info, sect); 1012 flash_write_cmd (info, sect, 0, 1013 AMD_CMD_ERASE_SECTOR); 1014 break; 1015 #ifdef CONFIG_FLASH_CFI_LEGACY 1016 case CFI_CMDSET_AMD_LEGACY: 1017 flash_unlock_seq (info, 0); 1018 flash_write_cmd (info, 0, info->addr_unlock1, 1019 AMD_CMD_ERASE_START); 1020 flash_unlock_seq (info, 0); 1021 flash_write_cmd (info, sect, 0, 1022 AMD_CMD_ERASE_SECTOR); 1023 break; 1024 #endif 1025 default: 1026 debug ("Unkown flash vendor %d\n", 1027 info->vendor); 1028 break; 1029 } 1030 1031 if (flash_full_status_check 1032 (info, sect, info->erase_blk_tout, "erase")) { 1033 rcode = 1; 1034 } else 1035 putc ('.'); 1036 } 1037 } 1038 puts (" done\n"); 1039 return rcode; 1040 } 1041 1042 /*----------------------------------------------------------------------- 1043 */ 1044 void flash_print_info (flash_info_t * info) 1045 { 1046 int i; 1047 1048 if (info->flash_id != FLASH_MAN_CFI) { 1049 puts ("missing or unknown FLASH type\n"); 1050 return; 1051 } 1052 1053 printf ("%s FLASH (%d x %d)", 1054 info->name, 1055 (info->portwidth << 3), (info->chipwidth << 3)); 1056 if (info->size < 1024*1024) 1057 printf (" Size: %ld kB in %d Sectors\n", 1058 info->size >> 10, info->sector_count); 1059 else 1060 printf (" Size: %ld MB in %d Sectors\n", 1061 info->size >> 20, info->sector_count); 1062 printf (" "); 1063 switch (info->vendor) { 1064 case CFI_CMDSET_INTEL_STANDARD: 1065 printf ("Intel Standard"); 1066 break; 1067 case CFI_CMDSET_INTEL_EXTENDED: 1068 printf ("Intel Extended"); 1069 break; 1070 case CFI_CMDSET_AMD_STANDARD: 1071 printf ("AMD Standard"); 1072 break; 1073 case CFI_CMDSET_AMD_EXTENDED: 1074 printf ("AMD Extended"); 1075 break; 1076 #ifdef CONFIG_FLASH_CFI_LEGACY 1077 case CFI_CMDSET_AMD_LEGACY: 1078 printf ("AMD Legacy"); 1079 break; 1080 #endif 1081 default: 1082 printf ("Unknown (%d)", info->vendor); 1083 break; 1084 } 1085 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1086 info->manufacturer_id, info->device_id); 1087 if (info->device_id == 0x7E) { 1088 printf("%04X", info->device_id2); 1089 } 1090 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1091 info->erase_blk_tout, 1092 info->write_tout); 1093 if (info->buffer_size > 1) { 1094 printf (" Buffer write timeout: %ld ms, " 1095 "buffer size: %d bytes\n", 1096 info->buffer_write_tout, 1097 info->buffer_size); 1098 } 1099 1100 puts ("\n Sector Start Addresses:"); 1101 for (i = 0; i < info->sector_count; ++i) { 1102 if ((i % 5) == 0) 1103 printf ("\n"); 1104 #ifdef CFG_FLASH_EMPTY_INFO 1105 int k; 1106 int size; 1107 int erased; 1108 volatile unsigned long *flash; 1109 1110 /* 1111 * Check if whole sector is erased 1112 */ 1113 size = flash_sector_size(info, i); 1114 erased = 1; 1115 flash = (volatile unsigned long *) info->start[i]; 1116 size = size >> 2; /* divide by 4 for longword access */ 1117 for (k = 0; k < size; k++) { 1118 if (*flash++ != 0xffffffff) { 1119 erased = 0; 1120 break; 1121 } 1122 } 1123 1124 /* print empty and read-only info */ 1125 printf (" %08lX %c %s ", 1126 info->start[i], 1127 erased ? 'E' : ' ', 1128 info->protect[i] ? "RO" : " "); 1129 #else /* ! CFG_FLASH_EMPTY_INFO */ 1130 printf (" %08lX %s ", 1131 info->start[i], 1132 info->protect[i] ? "RO" : " "); 1133 #endif 1134 } 1135 putc ('\n'); 1136 return; 1137 } 1138 1139 /*----------------------------------------------------------------------- 1140 * Copy memory to flash, returns: 1141 * 0 - OK 1142 * 1 - write timeout 1143 * 2 - Flash not erased 1144 */ 1145 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1146 { 1147 ulong wp; 1148 uchar *p; 1149 int aln; 1150 cfiword_t cword; 1151 int i, rc; 1152 1153 #ifdef CFG_FLASH_USE_BUFFER_WRITE 1154 int buffered_size; 1155 #endif 1156 /* get lower aligned address */ 1157 wp = (addr & ~(info->portwidth - 1)); 1158 1159 /* handle unaligned start */ 1160 if ((aln = addr - wp) != 0) { 1161 cword.l = 0; 1162 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1163 for (i = 0; i < aln; ++i) 1164 flash_add_byte (info, &cword, flash_read8(p + i)); 1165 1166 for (; (i < info->portwidth) && (cnt > 0); i++) { 1167 flash_add_byte (info, &cword, *src++); 1168 cnt--; 1169 } 1170 for (; (cnt == 0) && (i < info->portwidth); ++i) 1171 flash_add_byte (info, &cword, flash_read8(p + i)); 1172 1173 rc = flash_write_cfiword (info, wp, cword); 1174 unmap_physmem(p, info->portwidth); 1175 if (rc != 0) 1176 return rc; 1177 1178 wp += i; 1179 } 1180 1181 /* handle the aligned part */ 1182 #ifdef CFG_FLASH_USE_BUFFER_WRITE 1183 buffered_size = (info->portwidth / info->chipwidth); 1184 buffered_size *= info->buffer_size; 1185 while (cnt >= info->portwidth) { 1186 /* prohibit buffer write when buffer_size is 1 */ 1187 if (info->buffer_size == 1) { 1188 cword.l = 0; 1189 for (i = 0; i < info->portwidth; i++) 1190 flash_add_byte (info, &cword, *src++); 1191 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1192 return rc; 1193 wp += info->portwidth; 1194 cnt -= info->portwidth; 1195 continue; 1196 } 1197 1198 /* write buffer until next buffered_size aligned boundary */ 1199 i = buffered_size - (wp % buffered_size); 1200 if (i > cnt) 1201 i = cnt; 1202 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1203 return rc; 1204 i -= i & (info->portwidth - 1); 1205 wp += i; 1206 src += i; 1207 cnt -= i; 1208 } 1209 #else 1210 while (cnt >= info->portwidth) { 1211 cword.l = 0; 1212 for (i = 0; i < info->portwidth; i++) { 1213 flash_add_byte (info, &cword, *src++); 1214 } 1215 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1216 return rc; 1217 wp += info->portwidth; 1218 cnt -= info->portwidth; 1219 } 1220 #endif /* CFG_FLASH_USE_BUFFER_WRITE */ 1221 if (cnt == 0) { 1222 return (0); 1223 } 1224 1225 /* 1226 * handle unaligned tail bytes 1227 */ 1228 cword.l = 0; 1229 p = map_physmem(wp, info->portwidth, MAP_NOCACHE); 1230 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1231 flash_add_byte (info, &cword, *src++); 1232 --cnt; 1233 } 1234 for (; i < info->portwidth; ++i) 1235 flash_add_byte (info, &cword, flash_read8(p + i)); 1236 unmap_physmem(p, info->portwidth); 1237 1238 return flash_write_cfiword (info, wp, cword); 1239 } 1240 1241 /*----------------------------------------------------------------------- 1242 */ 1243 #ifdef CFG_FLASH_PROTECTION 1244 1245 int flash_real_protect (flash_info_t * info, long sector, int prot) 1246 { 1247 int retcode = 0; 1248 1249 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1250 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1251 if (prot) 1252 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1253 else 1254 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1255 1256 if ((retcode = 1257 flash_full_status_check (info, sector, info->erase_blk_tout, 1258 prot ? "protect" : "unprotect")) == 0) { 1259 1260 info->protect[sector] = prot; 1261 1262 /* 1263 * On some of Intel's flash chips (marked via legacy_unlock) 1264 * unprotect unprotects all locking. 1265 */ 1266 if ((prot == 0) && (info->legacy_unlock)) { 1267 flash_sect_t i; 1268 1269 for (i = 0; i < info->sector_count; i++) { 1270 if (info->protect[i]) 1271 flash_real_protect (info, i, 1); 1272 } 1273 } 1274 } 1275 return retcode; 1276 } 1277 1278 /*----------------------------------------------------------------------- 1279 * flash_read_user_serial - read the OneTimeProgramming cells 1280 */ 1281 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1282 int len) 1283 { 1284 uchar *src; 1285 uchar *dst; 1286 1287 dst = buffer; 1288 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1289 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1290 memcpy (dst, src + offset, len); 1291 flash_write_cmd (info, 0, 0, info->cmd_reset); 1292 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1293 } 1294 1295 /* 1296 * flash_read_factory_serial - read the device Id from the protection area 1297 */ 1298 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1299 int len) 1300 { 1301 uchar *src; 1302 1303 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1304 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1305 memcpy (buffer, src + offset, len); 1306 flash_write_cmd (info, 0, 0, info->cmd_reset); 1307 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1308 } 1309 1310 #endif /* CFG_FLASH_PROTECTION */ 1311 1312 1313 /*----------------------------------------------------------------------- 1314 * read jedec ids from device and set corresponding fields in info struct 1315 * 1316 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1317 * 1318 */ 1319 static void flash_read_jedec_ids (flash_info_t * info) 1320 { 1321 info->manufacturer_id = 0; 1322 info->device_id = 0; 1323 info->device_id2 = 0; 1324 1325 switch (info->vendor) { 1326 case CFI_CMDSET_INTEL_STANDARD: 1327 case CFI_CMDSET_INTEL_EXTENDED: 1328 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1329 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1330 udelay(1000); /* some flash are slow to respond */ 1331 info->manufacturer_id = flash_read_uchar (info, 1332 FLASH_OFFSET_MANUFACTURER_ID); 1333 info->device_id = flash_read_uchar (info, 1334 FLASH_OFFSET_DEVICE_ID); 1335 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1336 break; 1337 case CFI_CMDSET_AMD_STANDARD: 1338 case CFI_CMDSET_AMD_EXTENDED: 1339 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1340 flash_unlock_seq(info, 0); 1341 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1342 udelay(1000); /* some flash are slow to respond */ 1343 info->manufacturer_id = flash_read_uchar (info, 1344 FLASH_OFFSET_MANUFACTURER_ID); 1345 info->device_id = flash_read_uchar (info, 1346 FLASH_OFFSET_DEVICE_ID); 1347 if (info->device_id == 0x7E) { 1348 /* AMD 3-byte (expanded) device ids */ 1349 info->device_id2 = flash_read_uchar (info, 1350 FLASH_OFFSET_DEVICE_ID2); 1351 info->device_id2 <<= 8; 1352 info->device_id2 |= flash_read_uchar (info, 1353 FLASH_OFFSET_DEVICE_ID3); 1354 } 1355 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1356 break; 1357 default: 1358 break; 1359 } 1360 } 1361 1362 #ifdef CONFIG_FLASH_CFI_LEGACY 1363 /*----------------------------------------------------------------------- 1364 * Call board code to request info about non-CFI flash. 1365 * board_flash_get_legacy needs to fill in at least: 1366 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1367 */ 1368 static int flash_detect_legacy(ulong base, int banknum) 1369 { 1370 flash_info_t *info = &flash_info[banknum]; 1371 1372 if (board_flash_get_legacy(base, banknum, info)) { 1373 /* board code may have filled info completely. If not, we 1374 use JEDEC ID probing. */ 1375 if (!info->vendor) { 1376 int modes[] = { 1377 CFI_CMDSET_AMD_STANDARD, 1378 CFI_CMDSET_INTEL_STANDARD 1379 }; 1380 int i; 1381 1382 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1383 info->vendor = modes[i]; 1384 info->start[0] = base; 1385 if (info->portwidth == FLASH_CFI_8BIT 1386 && info->interface == FLASH_CFI_X8X16) { 1387 info->addr_unlock1 = 0x2AAA; 1388 info->addr_unlock2 = 0x5555; 1389 } else { 1390 info->addr_unlock1 = 0x5555; 1391 info->addr_unlock2 = 0x2AAA; 1392 } 1393 flash_read_jedec_ids(info); 1394 debug("JEDEC PROBE: ID %x %x %x\n", 1395 info->manufacturer_id, 1396 info->device_id, 1397 info->device_id2); 1398 if (jedec_flash_match(info, base)) 1399 break; 1400 } 1401 } 1402 1403 switch(info->vendor) { 1404 case CFI_CMDSET_INTEL_STANDARD: 1405 case CFI_CMDSET_INTEL_EXTENDED: 1406 info->cmd_reset = FLASH_CMD_RESET; 1407 break; 1408 case CFI_CMDSET_AMD_STANDARD: 1409 case CFI_CMDSET_AMD_EXTENDED: 1410 case CFI_CMDSET_AMD_LEGACY: 1411 info->cmd_reset = AMD_CMD_RESET; 1412 break; 1413 } 1414 info->flash_id = FLASH_MAN_CFI; 1415 return 1; 1416 } 1417 return 0; /* use CFI */ 1418 } 1419 #else 1420 static inline int flash_detect_legacy(ulong base, int banknum) 1421 { 1422 return 0; /* use CFI */ 1423 } 1424 #endif 1425 1426 /*----------------------------------------------------------------------- 1427 * detect if flash is compatible with the Common Flash Interface (CFI) 1428 * http://www.jedec.org/download/search/jesd68.pdf 1429 */ 1430 static int __flash_detect_cfi (flash_info_t * info) 1431 { 1432 int cfi_offset; 1433 1434 flash_write_cmd (info, 0, 0, info->cmd_reset); 1435 for (cfi_offset=0; 1436 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1437 cfi_offset++) { 1438 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1439 FLASH_CMD_CFI); 1440 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1441 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1442 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1443 info->interface = flash_read_ushort (info, 0, 1444 FLASH_OFFSET_INTERFACE); 1445 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1446 debug ("device interface is %d\n", 1447 info->interface); 1448 debug ("found port %d chip %d ", 1449 info->portwidth, info->chipwidth); 1450 debug ("port %d bits chip %d bits\n", 1451 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1452 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1453 1454 /* calculate command offsets as in the Linux driver */ 1455 info->addr_unlock1 = 0x555; 1456 info->addr_unlock2 = 0x2aa; 1457 1458 /* 1459 * modify the unlock address if we are 1460 * in compatibility mode 1461 */ 1462 if ( /* x8/x16 in x8 mode */ 1463 ((info->chipwidth == FLASH_CFI_BY8) && 1464 (info->interface == FLASH_CFI_X8X16)) || 1465 /* x16/x32 in x16 mode */ 1466 ((info->chipwidth == FLASH_CFI_BY16) && 1467 (info->interface == FLASH_CFI_X16X32))) 1468 { 1469 info->addr_unlock1 = 0xaaa; 1470 info->addr_unlock2 = 0x555; 1471 } 1472 1473 info->name = "CFI conformant"; 1474 return 1; 1475 } 1476 } 1477 1478 return 0; 1479 } 1480 1481 static int flash_detect_cfi (flash_info_t * info) 1482 { 1483 debug ("flash detect cfi\n"); 1484 1485 for (info->portwidth = CFG_FLASH_CFI_WIDTH; 1486 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1487 for (info->chipwidth = FLASH_CFI_BY8; 1488 info->chipwidth <= info->portwidth; 1489 info->chipwidth <<= 1) 1490 if (__flash_detect_cfi(info)) 1491 return 1; 1492 } 1493 debug ("not found\n"); 1494 return 0; 1495 } 1496 1497 /* 1498 * The following code cannot be run from FLASH! 1499 * 1500 */ 1501 ulong flash_get_size (ulong base, int banknum) 1502 { 1503 flash_info_t *info = &flash_info[banknum]; 1504 int i, j; 1505 flash_sect_t sect_cnt; 1506 unsigned long sector; 1507 unsigned long tmp; 1508 int size_ratio; 1509 uchar num_erase_regions; 1510 int erase_region_size; 1511 int erase_region_count; 1512 int geometry_reversed = 0; 1513 1514 info->ext_addr = 0; 1515 info->cfi_version = 0; 1516 #ifdef CFG_FLASH_PROTECTION 1517 info->legacy_unlock = 0; 1518 #endif 1519 1520 info->start[0] = base; 1521 1522 if (flash_detect_cfi (info)) { 1523 info->vendor = flash_read_ushort (info, 0, 1524 FLASH_OFFSET_PRIMARY_VENDOR); 1525 flash_read_jedec_ids (info); 1526 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI); 1527 num_erase_regions = flash_read_uchar (info, 1528 FLASH_OFFSET_NUM_ERASE_REGIONS); 1529 info->ext_addr = flash_read_ushort (info, 0, 1530 FLASH_OFFSET_EXT_QUERY_T_P_ADDR); 1531 if (info->ext_addr) { 1532 info->cfi_version = (ushort) flash_read_uchar (info, 1533 info->ext_addr + 3) << 8; 1534 info->cfi_version |= (ushort) flash_read_uchar (info, 1535 info->ext_addr + 4); 1536 } 1537 #ifdef DEBUG 1538 flash_printqry (info, 0); 1539 #endif 1540 switch (info->vendor) { 1541 case CFI_CMDSET_INTEL_STANDARD: 1542 case CFI_CMDSET_INTEL_EXTENDED: 1543 default: 1544 info->cmd_reset = FLASH_CMD_RESET; 1545 #ifdef CFG_FLASH_PROTECTION 1546 /* read legacy lock/unlock bit from intel flash */ 1547 if (info->ext_addr) { 1548 info->legacy_unlock = flash_read_uchar (info, 1549 info->ext_addr + 5) & 0x08; 1550 } 1551 #endif 1552 break; 1553 case CFI_CMDSET_AMD_STANDARD: 1554 case CFI_CMDSET_AMD_EXTENDED: 1555 info->cmd_reset = AMD_CMD_RESET; 1556 /* check if flash geometry needs reversal */ 1557 if (num_erase_regions <= 1) 1558 break; 1559 /* reverse geometry if top boot part */ 1560 if (info->cfi_version < 0x3131) { 1561 /* CFI < 1.1, try to guess from device id */ 1562 if ((info->device_id & 0x80) != 0) { 1563 geometry_reversed = 1; 1564 } 1565 break; 1566 } 1567 /* CFI >= 1.1, deduct from top/bottom flag */ 1568 /* note: ext_addr is valid since cfi_version > 0 */ 1569 if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1570 geometry_reversed = 1; 1571 } 1572 break; 1573 } 1574 1575 debug ("manufacturer is %d\n", info->vendor); 1576 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1577 debug ("device id is 0x%x\n", info->device_id); 1578 debug ("device id2 is 0x%x\n", info->device_id2); 1579 debug ("cfi version is 0x%04x\n", info->cfi_version); 1580 1581 size_ratio = info->portwidth / info->chipwidth; 1582 /* if the chip is x8/x16 reduce the ratio by half */ 1583 if ((info->interface == FLASH_CFI_X8X16) 1584 && (info->chipwidth == FLASH_CFI_BY8)) { 1585 size_ratio >>= 1; 1586 } 1587 debug ("size_ratio %d port %d bits chip %d bits\n", 1588 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1589 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1590 debug ("found %d erase regions\n", num_erase_regions); 1591 sect_cnt = 0; 1592 sector = base; 1593 for (i = 0; i < num_erase_regions; i++) { 1594 if (i > NUM_ERASE_REGIONS) { 1595 printf ("%d erase regions found, only %d used\n", 1596 num_erase_regions, NUM_ERASE_REGIONS); 1597 break; 1598 } 1599 if (geometry_reversed) 1600 tmp = flash_read_long (info, 0, 1601 FLASH_OFFSET_ERASE_REGIONS + 1602 (num_erase_regions - 1 - i) * 4); 1603 else 1604 tmp = flash_read_long (info, 0, 1605 FLASH_OFFSET_ERASE_REGIONS + 1606 i * 4); 1607 erase_region_size = 1608 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1609 tmp >>= 16; 1610 erase_region_count = (tmp & 0xffff) + 1; 1611 debug ("erase_region_count = %d erase_region_size = %d\n", 1612 erase_region_count, erase_region_size); 1613 for (j = 0; j < erase_region_count; j++) { 1614 if (sect_cnt >= CFG_MAX_FLASH_SECT) { 1615 printf("ERROR: too many flash sectors\n"); 1616 break; 1617 } 1618 info->start[sect_cnt] = sector; 1619 sector += (erase_region_size * size_ratio); 1620 1621 /* 1622 * Only read protection status from 1623 * supported devices (intel...) 1624 */ 1625 switch (info->vendor) { 1626 case CFI_CMDSET_INTEL_EXTENDED: 1627 case CFI_CMDSET_INTEL_STANDARD: 1628 info->protect[sect_cnt] = 1629 flash_isset (info, sect_cnt, 1630 FLASH_OFFSET_PROTECT, 1631 FLASH_STATUS_PROTECT); 1632 break; 1633 default: 1634 /* default: not protected */ 1635 info->protect[sect_cnt] = 0; 1636 } 1637 1638 sect_cnt++; 1639 } 1640 } 1641 1642 info->sector_count = sect_cnt; 1643 info->size = 1 << flash_read_uchar (info, FLASH_OFFSET_SIZE); 1644 /* multiply the size by the number of chips */ 1645 info->size *= size_ratio; 1646 info->buffer_size = 1 << flash_read_ushort (info, 0, 1647 FLASH_OFFSET_BUFFER_SIZE); 1648 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT); 1649 info->erase_blk_tout = tmp * 1650 (1 << flash_read_uchar ( 1651 info, FLASH_OFFSET_EMAX_TOUT)); 1652 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) * 1653 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)); 1654 /* round up when converting to ms */ 1655 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); 1656 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * 1657 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); 1658 /* round up when converting to ms */ 1659 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); 1660 info->flash_id = FLASH_MAN_CFI; 1661 if ((info->interface == FLASH_CFI_X8X16) && 1662 (info->chipwidth == FLASH_CFI_BY8)) { 1663 /* XXX - Need to test on x8/x16 in parallel. */ 1664 info->portwidth >>= 1; 1665 } 1666 } 1667 1668 flash_write_cmd (info, 0, 0, info->cmd_reset); 1669 return (info->size); 1670 } 1671 1672 /*----------------------------------------------------------------------- 1673 */ 1674 unsigned long flash_init (void) 1675 { 1676 unsigned long size = 0; 1677 int i; 1678 1679 #ifdef CFG_FLASH_PROTECTION 1680 char *s = getenv("unlock"); 1681 #endif 1682 1683 /* Init: no FLASHes known */ 1684 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { 1685 flash_info[i].flash_id = FLASH_UNKNOWN; 1686 1687 if (!flash_detect_legacy (bank_base[i], i)) 1688 flash_get_size (bank_base[i], i); 1689 size += flash_info[i].size; 1690 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 1691 #ifndef CFG_FLASH_QUIET_TEST 1692 printf ("## Unknown FLASH on Bank %d " 1693 "- Size = 0x%08lx = %ld MB\n", 1694 i+1, flash_info[i].size, 1695 flash_info[i].size << 20); 1696 #endif /* CFG_FLASH_QUIET_TEST */ 1697 } 1698 #ifdef CFG_FLASH_PROTECTION 1699 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 1700 /* 1701 * Only the U-Boot image and it's environment 1702 * is protected, all other sectors are 1703 * unprotected (unlocked) if flash hardware 1704 * protection is used (CFG_FLASH_PROTECTION) 1705 * and the environment variable "unlock" is 1706 * set to "yes". 1707 */ 1708 if (flash_info[i].legacy_unlock) { 1709 int k; 1710 1711 /* 1712 * Disable legacy_unlock temporarily, 1713 * since flash_real_protect would 1714 * relock all other sectors again 1715 * otherwise. 1716 */ 1717 flash_info[i].legacy_unlock = 0; 1718 1719 /* 1720 * Legacy unlocking (e.g. Intel J3) -> 1721 * unlock only one sector. This will 1722 * unlock all sectors. 1723 */ 1724 flash_real_protect (&flash_info[i], 0, 0); 1725 1726 flash_info[i].legacy_unlock = 1; 1727 1728 /* 1729 * Manually mark other sectors as 1730 * unlocked (unprotected) 1731 */ 1732 for (k = 1; k < flash_info[i].sector_count; k++) 1733 flash_info[i].protect[k] = 0; 1734 } else { 1735 /* 1736 * No legancy unlocking -> unlock all sectors 1737 */ 1738 flash_protect (FLAG_PROTECT_CLEAR, 1739 flash_info[i].start[0], 1740 flash_info[i].start[0] 1741 + flash_info[i].size - 1, 1742 &flash_info[i]); 1743 } 1744 } 1745 #endif /* CFG_FLASH_PROTECTION */ 1746 } 1747 1748 /* Monitor protection ON by default */ 1749 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) 1750 flash_protect (FLAG_PROTECT_SET, 1751 CFG_MONITOR_BASE, 1752 CFG_MONITOR_BASE + monitor_flash_len - 1, 1753 flash_get_info(CFG_MONITOR_BASE)); 1754 #endif 1755 1756 /* Environment protection ON by default */ 1757 #ifdef CFG_ENV_IS_IN_FLASH 1758 flash_protect (FLAG_PROTECT_SET, 1759 CFG_ENV_ADDR, 1760 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, 1761 flash_get_info(CFG_ENV_ADDR)); 1762 #endif 1763 1764 /* Redundant environment protection ON by default */ 1765 #ifdef CFG_ENV_ADDR_REDUND 1766 flash_protect (FLAG_PROTECT_SET, 1767 CFG_ENV_ADDR_REDUND, 1768 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, 1769 flash_get_info(CFG_ENV_ADDR_REDUND)); 1770 #endif 1771 return (size); 1772 } 1773 1774 #endif /* CFG_FLASH_CFI */ 1775