1 /* 2 * (C) Copyright 2002-2004 3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com 4 * 5 * Copyright (C) 2003 Arabella Software Ltd. 6 * Yuli Barcohen <yuli@arabellasw.com> 7 * 8 * Copyright (C) 2004 9 * Ed Okerson 10 * 11 * Copyright (C) 2006 12 * Tolunay Orkun <listmember@orkun.us> 13 * 14 * See file CREDITS for list of people who contributed to this 15 * project. 16 * 17 * This program is free software; you can redistribute it and/or 18 * modify it under the terms of the GNU General Public License as 19 * published by the Free Software Foundation; either version 2 of 20 * the License, or (at your option) any later version. 21 * 22 * This program is distributed in the hope that it will be useful, 23 * but WITHOUT ANY WARRANTY; without even the implied warranty of 24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 25 * GNU General Public License for more details. 26 * 27 * You should have received a copy of the GNU General Public License 28 * along with this program; if not, write to the Free Software 29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * MA 02111-1307 USA 31 * 32 */ 33 34 /* The DEBUG define must be before common to enable debugging */ 35 /* #define DEBUG */ 36 37 #include <common.h> 38 #include <asm/processor.h> 39 #include <asm/io.h> 40 #include <asm/byteorder.h> 41 #include <environment.h> 42 #include <mtd/cfi_flash.h> 43 44 /* 45 * This file implements a Common Flash Interface (CFI) driver for 46 * U-Boot. 47 * 48 * The width of the port and the width of the chips are determined at 49 * initialization. These widths are used to calculate the address for 50 * access CFI data structures. 51 * 52 * References 53 * JEDEC Standard JESD68 - Common Flash Interface (CFI) 54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes 55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets 56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet 57 * AMD CFI Specification, Release 2.0 December 1, 2001 58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte 59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001 60 * 61 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between 62 * reading and writing ... (yes there is such a Hardware). 63 */ 64 65 #ifndef CONFIG_SYS_FLASH_BANKS_LIST 66 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 67 #endif 68 69 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; 70 static uint flash_verbose = 1; 71 72 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ 73 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT 74 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT 75 #else 76 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS 77 #endif 78 79 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ 80 81 /* 82 * Check if chip width is defined. If not, start detecting with 8bit. 83 */ 84 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH 85 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT 86 #endif 87 88 static void __flash_write8(u8 value, void *addr) 89 { 90 __raw_writeb(value, addr); 91 } 92 93 static void __flash_write16(u16 value, void *addr) 94 { 95 __raw_writew(value, addr); 96 } 97 98 static void __flash_write32(u32 value, void *addr) 99 { 100 __raw_writel(value, addr); 101 } 102 103 static void __flash_write64(u64 value, void *addr) 104 { 105 /* No architectures currently implement __raw_writeq() */ 106 *(volatile u64 *)addr = value; 107 } 108 109 static u8 __flash_read8(void *addr) 110 { 111 return __raw_readb(addr); 112 } 113 114 static u16 __flash_read16(void *addr) 115 { 116 return __raw_readw(addr); 117 } 118 119 static u32 __flash_read32(void *addr) 120 { 121 return __raw_readl(addr); 122 } 123 124 static u64 __flash_read64(void *addr) 125 { 126 /* No architectures currently implement __raw_readq() */ 127 return *(volatile u64 *)addr; 128 } 129 130 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 131 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8"))); 132 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16"))); 133 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32"))); 134 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64"))); 135 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8"))); 136 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16"))); 137 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32"))); 138 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); 139 #else 140 #define flash_write8 __flash_write8 141 #define flash_write16 __flash_write16 142 #define flash_write32 __flash_write32 143 #define flash_write64 __flash_write64 144 #define flash_read8 __flash_read8 145 #define flash_read16 __flash_read16 146 #define flash_read32 __flash_read32 147 #define flash_read64 __flash_read64 148 #endif 149 150 /*----------------------------------------------------------------------- 151 */ 152 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) 153 flash_info_t *flash_get_info(ulong base) 154 { 155 int i; 156 flash_info_t * info = 0; 157 158 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 159 info = & flash_info[i]; 160 if (info->size && info->start[0] <= base && 161 base <= info->start[0] + info->size - 1) 162 break; 163 } 164 165 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; 166 } 167 #endif 168 169 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect) 170 { 171 if (sect != (info->sector_count - 1)) 172 return info->start[sect + 1] - info->start[sect]; 173 else 174 return info->start[0] + info->size - info->start[sect]; 175 } 176 177 /*----------------------------------------------------------------------- 178 * create an address based on the offset and the port width 179 */ 180 static inline void * 181 flash_map (flash_info_t * info, flash_sect_t sect, uint offset) 182 { 183 unsigned int byte_offset = offset * info->portwidth; 184 185 return (void *)(info->start[sect] + byte_offset); 186 } 187 188 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect, 189 unsigned int offset, void *addr) 190 { 191 } 192 193 /*----------------------------------------------------------------------- 194 * make a proper sized command based on the port and chip widths 195 */ 196 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) 197 { 198 int i; 199 int cword_offset; 200 int cp_offset; 201 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 202 u32 cmd_le = cpu_to_le32(cmd); 203 #endif 204 uchar val; 205 uchar *cp = (uchar *) cmdbuf; 206 207 for (i = info->portwidth; i > 0; i--){ 208 cword_offset = (info->portwidth-i)%info->chipwidth; 209 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 210 cp_offset = info->portwidth - i; 211 val = *((uchar*)&cmd_le + cword_offset); 212 #else 213 cp_offset = i - 1; 214 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1); 215 #endif 216 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val; 217 } 218 } 219 220 #ifdef DEBUG 221 /*----------------------------------------------------------------------- 222 * Debug support 223 */ 224 static void print_longlong (char *str, unsigned long long data) 225 { 226 int i; 227 char *cp; 228 229 cp = (char *) &data; 230 for (i = 0; i < 8; i++) 231 sprintf (&str[i * 2], "%2.2x", *cp++); 232 } 233 234 static void flash_printqry (struct cfi_qry *qry) 235 { 236 u8 *p = (u8 *)qry; 237 int x, y; 238 239 for (x = 0; x < sizeof(struct cfi_qry); x += 16) { 240 debug("%02x : ", x); 241 for (y = 0; y < 16; y++) 242 debug("%2.2x ", p[x + y]); 243 debug(" "); 244 for (y = 0; y < 16; y++) { 245 unsigned char c = p[x + y]; 246 if (c >= 0x20 && c <= 0x7e) 247 debug("%c", c); 248 else 249 debug("."); 250 } 251 debug("\n"); 252 } 253 } 254 #endif 255 256 257 /*----------------------------------------------------------------------- 258 * read a character at a port width address 259 */ 260 static inline uchar flash_read_uchar (flash_info_t * info, uint offset) 261 { 262 uchar *cp; 263 uchar retval; 264 265 cp = flash_map (info, 0, offset); 266 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 267 retval = flash_read8(cp); 268 #else 269 retval = flash_read8(cp + info->portwidth - 1); 270 #endif 271 flash_unmap (info, 0, offset, cp); 272 return retval; 273 } 274 275 /*----------------------------------------------------------------------- 276 * read a word at a port width address, assume 16bit bus 277 */ 278 static inline ushort flash_read_word (flash_info_t * info, uint offset) 279 { 280 ushort *addr, retval; 281 282 addr = flash_map (info, 0, offset); 283 retval = flash_read16 (addr); 284 flash_unmap (info, 0, offset, addr); 285 return retval; 286 } 287 288 289 /*----------------------------------------------------------------------- 290 * read a long word by picking the least significant byte of each maximum 291 * port size word. Swap for ppc format. 292 */ 293 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, 294 uint offset) 295 { 296 uchar *addr; 297 ulong retval; 298 299 #ifdef DEBUG 300 int x; 301 #endif 302 addr = flash_map (info, sect, offset); 303 304 #ifdef DEBUG 305 debug ("long addr is at %p info->portwidth = %d\n", addr, 306 info->portwidth); 307 for (x = 0; x < 4 * info->portwidth; x++) { 308 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); 309 } 310 #endif 311 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 312 retval = ((flash_read8(addr) << 16) | 313 (flash_read8(addr + info->portwidth) << 24) | 314 (flash_read8(addr + 2 * info->portwidth)) | 315 (flash_read8(addr + 3 * info->portwidth) << 8)); 316 #else 317 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | 318 (flash_read8(addr + info->portwidth - 1) << 16) | 319 (flash_read8(addr + 4 * info->portwidth - 1) << 8) | 320 (flash_read8(addr + 3 * info->portwidth - 1))); 321 #endif 322 flash_unmap(info, sect, offset, addr); 323 324 return retval; 325 } 326 327 /* 328 * Write a proper sized command to the correct address 329 */ 330 void flash_write_cmd (flash_info_t * info, flash_sect_t sect, 331 uint offset, u32 cmd) 332 { 333 334 void *addr; 335 cfiword_t cword; 336 337 addr = flash_map (info, sect, offset); 338 flash_make_cmd (info, cmd, &cword); 339 switch (info->portwidth) { 340 case FLASH_CFI_8BIT: 341 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, 342 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 343 flash_write8(cword.c, addr); 344 break; 345 case FLASH_CFI_16BIT: 346 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, 347 cmd, cword.w, 348 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 349 flash_write16(cword.w, addr); 350 break; 351 case FLASH_CFI_32BIT: 352 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, 353 cmd, cword.l, 354 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 355 flash_write32(cword.l, addr); 356 break; 357 case FLASH_CFI_64BIT: 358 #ifdef DEBUG 359 { 360 char str[20]; 361 362 print_longlong (str, cword.ll); 363 364 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", 365 addr, cmd, str, 366 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 367 } 368 #endif 369 flash_write64(cword.ll, addr); 370 break; 371 } 372 373 /* Ensure all the instructions are fully finished */ 374 sync(); 375 376 flash_unmap(info, sect, offset, addr); 377 } 378 379 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) 380 { 381 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START); 382 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK); 383 } 384 385 /*----------------------------------------------------------------------- 386 */ 387 static int flash_isequal (flash_info_t * info, flash_sect_t sect, 388 uint offset, uchar cmd) 389 { 390 void *addr; 391 cfiword_t cword; 392 int retval; 393 394 addr = flash_map (info, sect, offset); 395 flash_make_cmd (info, cmd, &cword); 396 397 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); 398 switch (info->portwidth) { 399 case FLASH_CFI_8BIT: 400 debug ("is= %x %x\n", flash_read8(addr), cword.c); 401 retval = (flash_read8(addr) == cword.c); 402 break; 403 case FLASH_CFI_16BIT: 404 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); 405 retval = (flash_read16(addr) == cword.w); 406 break; 407 case FLASH_CFI_32BIT: 408 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); 409 retval = (flash_read32(addr) == cword.l); 410 break; 411 case FLASH_CFI_64BIT: 412 #ifdef DEBUG 413 { 414 char str1[20]; 415 char str2[20]; 416 417 print_longlong (str1, flash_read64(addr)); 418 print_longlong (str2, cword.ll); 419 debug ("is= %s %s\n", str1, str2); 420 } 421 #endif 422 retval = (flash_read64(addr) == cword.ll); 423 break; 424 default: 425 retval = 0; 426 break; 427 } 428 flash_unmap(info, sect, offset, addr); 429 430 return retval; 431 } 432 433 /*----------------------------------------------------------------------- 434 */ 435 static int flash_isset (flash_info_t * info, flash_sect_t sect, 436 uint offset, uchar cmd) 437 { 438 void *addr; 439 cfiword_t cword; 440 int retval; 441 442 addr = flash_map (info, sect, offset); 443 flash_make_cmd (info, cmd, &cword); 444 switch (info->portwidth) { 445 case FLASH_CFI_8BIT: 446 retval = ((flash_read8(addr) & cword.c) == cword.c); 447 break; 448 case FLASH_CFI_16BIT: 449 retval = ((flash_read16(addr) & cword.w) == cword.w); 450 break; 451 case FLASH_CFI_32BIT: 452 retval = ((flash_read32(addr) & cword.l) == cword.l); 453 break; 454 case FLASH_CFI_64BIT: 455 retval = ((flash_read64(addr) & cword.ll) == cword.ll); 456 break; 457 default: 458 retval = 0; 459 break; 460 } 461 flash_unmap(info, sect, offset, addr); 462 463 return retval; 464 } 465 466 /*----------------------------------------------------------------------- 467 */ 468 static int flash_toggle (flash_info_t * info, flash_sect_t sect, 469 uint offset, uchar cmd) 470 { 471 void *addr; 472 cfiword_t cword; 473 int retval; 474 475 addr = flash_map (info, sect, offset); 476 flash_make_cmd (info, cmd, &cword); 477 switch (info->portwidth) { 478 case FLASH_CFI_8BIT: 479 retval = flash_read8(addr) != flash_read8(addr); 480 break; 481 case FLASH_CFI_16BIT: 482 retval = flash_read16(addr) != flash_read16(addr); 483 break; 484 case FLASH_CFI_32BIT: 485 retval = flash_read32(addr) != flash_read32(addr); 486 break; 487 case FLASH_CFI_64BIT: 488 retval = ( (flash_read32( addr ) != flash_read32( addr )) || 489 (flash_read32(addr+4) != flash_read32(addr+4)) ); 490 break; 491 default: 492 retval = 0; 493 break; 494 } 495 flash_unmap(info, sect, offset, addr); 496 497 return retval; 498 } 499 500 /* 501 * flash_is_busy - check to see if the flash is busy 502 * 503 * This routine checks the status of the chip and returns true if the 504 * chip is busy. 505 */ 506 static int flash_is_busy (flash_info_t * info, flash_sect_t sect) 507 { 508 int retval; 509 510 switch (info->vendor) { 511 case CFI_CMDSET_INTEL_PROG_REGIONS: 512 case CFI_CMDSET_INTEL_STANDARD: 513 case CFI_CMDSET_INTEL_EXTENDED: 514 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE); 515 break; 516 case CFI_CMDSET_AMD_STANDARD: 517 case CFI_CMDSET_AMD_EXTENDED: 518 #ifdef CONFIG_FLASH_CFI_LEGACY 519 case CFI_CMDSET_AMD_LEGACY: 520 #endif 521 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE); 522 break; 523 default: 524 retval = 0; 525 } 526 debug ("flash_is_busy: %d\n", retval); 527 return retval; 528 } 529 530 /*----------------------------------------------------------------------- 531 * wait for XSR.7 to be set. Time out with an error if it does not. 532 * This routine does not set the flash to read-array mode. 533 */ 534 static int flash_status_check (flash_info_t * info, flash_sect_t sector, 535 ulong tout, char *prompt) 536 { 537 ulong start; 538 539 #if CONFIG_SYS_HZ != 1000 540 tout *= CONFIG_SYS_HZ/1000; 541 #endif 542 543 /* Wait for command completion */ 544 start = get_timer (0); 545 while (flash_is_busy (info, sector)) { 546 if (get_timer (start) > tout) { 547 printf ("Flash %s timeout at address %lx data %lx\n", 548 prompt, info->start[sector], 549 flash_read_long (info, sector, 0)); 550 flash_write_cmd (info, sector, 0, info->cmd_reset); 551 return ERR_TIMOUT; 552 } 553 udelay (1); /* also triggers watchdog */ 554 } 555 return ERR_OK; 556 } 557 558 /*----------------------------------------------------------------------- 559 * Wait for XSR.7 to be set, if it times out print an error, otherwise 560 * do a full status check. 561 * 562 * This routine sets the flash to read-array mode. 563 */ 564 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, 565 ulong tout, char *prompt) 566 { 567 int retcode; 568 569 retcode = flash_status_check (info, sector, tout, prompt); 570 switch (info->vendor) { 571 case CFI_CMDSET_INTEL_PROG_REGIONS: 572 case CFI_CMDSET_INTEL_EXTENDED: 573 case CFI_CMDSET_INTEL_STANDARD: 574 if ((retcode != ERR_OK) 575 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { 576 retcode = ERR_INVAL; 577 printf ("Flash %s error at address %lx\n", prompt, 578 info->start[sector]); 579 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | 580 FLASH_STATUS_PSLBS)) { 581 puts ("Command Sequence Error.\n"); 582 } else if (flash_isset (info, sector, 0, 583 FLASH_STATUS_ECLBS)) { 584 puts ("Block Erase Error.\n"); 585 retcode = ERR_NOT_ERASED; 586 } else if (flash_isset (info, sector, 0, 587 FLASH_STATUS_PSLBS)) { 588 puts ("Locking Error\n"); 589 } 590 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) { 591 puts ("Block locked.\n"); 592 retcode = ERR_PROTECTED; 593 } 594 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) 595 puts ("Vpp Low Error.\n"); 596 } 597 flash_write_cmd (info, sector, 0, info->cmd_reset); 598 break; 599 default: 600 break; 601 } 602 return retcode; 603 } 604 605 static int use_flash_status_poll(flash_info_t *info) 606 { 607 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 608 if (info->vendor == CFI_CMDSET_AMD_EXTENDED || 609 info->vendor == CFI_CMDSET_AMD_STANDARD) 610 return 1; 611 #endif 612 return 0; 613 } 614 615 static int flash_status_poll(flash_info_t *info, void *src, void *dst, 616 ulong tout, char *prompt) 617 { 618 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL 619 ulong start; 620 int ready; 621 622 #if CONFIG_SYS_HZ != 1000 623 if ((ulong)CONFIG_SYS_HZ > 100000) 624 tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */ 625 else 626 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000); 627 #endif 628 629 /* Wait for command completion */ 630 start = get_timer(0); 631 while (1) { 632 switch (info->portwidth) { 633 case FLASH_CFI_8BIT: 634 ready = flash_read8(dst) == flash_read8(src); 635 break; 636 case FLASH_CFI_16BIT: 637 ready = flash_read16(dst) == flash_read16(src); 638 break; 639 case FLASH_CFI_32BIT: 640 ready = flash_read32(dst) == flash_read32(src); 641 break; 642 case FLASH_CFI_64BIT: 643 ready = flash_read64(dst) == flash_read64(src); 644 break; 645 default: 646 ready = 0; 647 break; 648 } 649 if (ready) 650 break; 651 if (get_timer(start) > tout) { 652 printf("Flash %s timeout at address %lx data %lx\n", 653 prompt, (ulong)dst, (ulong)flash_read8(dst)); 654 return ERR_TIMOUT; 655 } 656 udelay(1); /* also triggers watchdog */ 657 } 658 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */ 659 return ERR_OK; 660 } 661 662 /*----------------------------------------------------------------------- 663 */ 664 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) 665 { 666 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 667 unsigned short w; 668 unsigned int l; 669 unsigned long long ll; 670 #endif 671 672 switch (info->portwidth) { 673 case FLASH_CFI_8BIT: 674 cword->c = c; 675 break; 676 case FLASH_CFI_16BIT: 677 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 678 w = c; 679 w <<= 8; 680 cword->w = (cword->w >> 8) | w; 681 #else 682 cword->w = (cword->w << 8) | c; 683 #endif 684 break; 685 case FLASH_CFI_32BIT: 686 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 687 l = c; 688 l <<= 24; 689 cword->l = (cword->l >> 8) | l; 690 #else 691 cword->l = (cword->l << 8) | c; 692 #endif 693 break; 694 case FLASH_CFI_64BIT: 695 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) 696 ll = c; 697 ll <<= 56; 698 cword->ll = (cword->ll >> 8) | ll; 699 #else 700 cword->ll = (cword->ll << 8) | c; 701 #endif 702 break; 703 } 704 } 705 706 /* 707 * Loop through the sector table starting from the previously found sector. 708 * Searches forwards or backwards, dependent on the passed address. 709 */ 710 static flash_sect_t find_sector (flash_info_t * info, ulong addr) 711 { 712 static flash_sect_t saved_sector = 0; /* previously found sector */ 713 flash_sect_t sector = saved_sector; 714 715 while ((info->start[sector] < addr) 716 && (sector < info->sector_count - 1)) 717 sector++; 718 while ((info->start[sector] > addr) && (sector > 0)) 719 /* 720 * also decrements the sector in case of an overshot 721 * in the first loop 722 */ 723 sector--; 724 725 saved_sector = sector; 726 return sector; 727 } 728 729 /*----------------------------------------------------------------------- 730 */ 731 static int flash_write_cfiword (flash_info_t * info, ulong dest, 732 cfiword_t cword) 733 { 734 void *dstaddr = (void *)dest; 735 int flag; 736 flash_sect_t sect = 0; 737 char sect_found = 0; 738 739 /* Check if Flash is (sufficiently) erased */ 740 switch (info->portwidth) { 741 case FLASH_CFI_8BIT: 742 flag = ((flash_read8(dstaddr) & cword.c) == cword.c); 743 break; 744 case FLASH_CFI_16BIT: 745 flag = ((flash_read16(dstaddr) & cword.w) == cword.w); 746 break; 747 case FLASH_CFI_32BIT: 748 flag = ((flash_read32(dstaddr) & cword.l) == cword.l); 749 break; 750 case FLASH_CFI_64BIT: 751 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll); 752 break; 753 default: 754 flag = 0; 755 break; 756 } 757 if (!flag) 758 return ERR_NOT_ERASED; 759 760 /* Disable interrupts which might cause a timeout here */ 761 flag = disable_interrupts (); 762 763 switch (info->vendor) { 764 case CFI_CMDSET_INTEL_PROG_REGIONS: 765 case CFI_CMDSET_INTEL_EXTENDED: 766 case CFI_CMDSET_INTEL_STANDARD: 767 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS); 768 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE); 769 break; 770 case CFI_CMDSET_AMD_EXTENDED: 771 case CFI_CMDSET_AMD_STANDARD: 772 sect = find_sector(info, dest); 773 flash_unlock_seq (info, sect); 774 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); 775 sect_found = 1; 776 break; 777 #ifdef CONFIG_FLASH_CFI_LEGACY 778 case CFI_CMDSET_AMD_LEGACY: 779 sect = find_sector(info, dest); 780 flash_unlock_seq (info, 0); 781 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); 782 sect_found = 1; 783 break; 784 #endif 785 } 786 787 switch (info->portwidth) { 788 case FLASH_CFI_8BIT: 789 flash_write8(cword.c, dstaddr); 790 break; 791 case FLASH_CFI_16BIT: 792 flash_write16(cword.w, dstaddr); 793 break; 794 case FLASH_CFI_32BIT: 795 flash_write32(cword.l, dstaddr); 796 break; 797 case FLASH_CFI_64BIT: 798 flash_write64(cword.ll, dstaddr); 799 break; 800 } 801 802 /* re-enable interrupts if necessary */ 803 if (flag) 804 enable_interrupts (); 805 806 if (!sect_found) 807 sect = find_sector (info, dest); 808 809 if (use_flash_status_poll(info)) 810 return flash_status_poll(info, &cword, dstaddr, 811 info->write_tout, "write"); 812 else 813 return flash_full_status_check(info, sect, 814 info->write_tout, "write"); 815 } 816 817 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 818 819 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, 820 int len) 821 { 822 flash_sect_t sector; 823 int cnt; 824 int retcode; 825 void *src = cp; 826 void *dst = (void *)dest; 827 void *dst2 = dst; 828 int flag = 0; 829 uint offset = 0; 830 unsigned int shift; 831 uchar write_cmd; 832 833 switch (info->portwidth) { 834 case FLASH_CFI_8BIT: 835 shift = 0; 836 break; 837 case FLASH_CFI_16BIT: 838 shift = 1; 839 break; 840 case FLASH_CFI_32BIT: 841 shift = 2; 842 break; 843 case FLASH_CFI_64BIT: 844 shift = 3; 845 break; 846 default: 847 retcode = ERR_INVAL; 848 goto out_unmap; 849 } 850 851 cnt = len >> shift; 852 853 while ((cnt-- > 0) && (flag == 0)) { 854 switch (info->portwidth) { 855 case FLASH_CFI_8BIT: 856 flag = ((flash_read8(dst2) & flash_read8(src)) == 857 flash_read8(src)); 858 src += 1, dst2 += 1; 859 break; 860 case FLASH_CFI_16BIT: 861 flag = ((flash_read16(dst2) & flash_read16(src)) == 862 flash_read16(src)); 863 src += 2, dst2 += 2; 864 break; 865 case FLASH_CFI_32BIT: 866 flag = ((flash_read32(dst2) & flash_read32(src)) == 867 flash_read32(src)); 868 src += 4, dst2 += 4; 869 break; 870 case FLASH_CFI_64BIT: 871 flag = ((flash_read64(dst2) & flash_read64(src)) == 872 flash_read64(src)); 873 src += 8, dst2 += 8; 874 break; 875 } 876 } 877 if (!flag) { 878 retcode = ERR_NOT_ERASED; 879 goto out_unmap; 880 } 881 882 src = cp; 883 sector = find_sector (info, dest); 884 885 switch (info->vendor) { 886 case CFI_CMDSET_INTEL_PROG_REGIONS: 887 case CFI_CMDSET_INTEL_STANDARD: 888 case CFI_CMDSET_INTEL_EXTENDED: 889 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ? 890 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER; 891 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 892 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS); 893 flash_write_cmd (info, sector, 0, write_cmd); 894 retcode = flash_status_check (info, sector, 895 info->buffer_write_tout, 896 "write to buffer"); 897 if (retcode == ERR_OK) { 898 /* reduce the number of loops by the width of 899 * the port */ 900 cnt = len >> shift; 901 flash_write_cmd (info, sector, 0, cnt - 1); 902 while (cnt-- > 0) { 903 switch (info->portwidth) { 904 case FLASH_CFI_8BIT: 905 flash_write8(flash_read8(src), dst); 906 src += 1, dst += 1; 907 break; 908 case FLASH_CFI_16BIT: 909 flash_write16(flash_read16(src), dst); 910 src += 2, dst += 2; 911 break; 912 case FLASH_CFI_32BIT: 913 flash_write32(flash_read32(src), dst); 914 src += 4, dst += 4; 915 break; 916 case FLASH_CFI_64BIT: 917 flash_write64(flash_read64(src), dst); 918 src += 8, dst += 8; 919 break; 920 default: 921 retcode = ERR_INVAL; 922 goto out_unmap; 923 } 924 } 925 flash_write_cmd (info, sector, 0, 926 FLASH_CMD_WRITE_BUFFER_CONFIRM); 927 retcode = flash_full_status_check ( 928 info, sector, info->buffer_write_tout, 929 "buffer write"); 930 } 931 932 break; 933 934 case CFI_CMDSET_AMD_STANDARD: 935 case CFI_CMDSET_AMD_EXTENDED: 936 flash_unlock_seq(info,0); 937 938 #ifdef CONFIG_FLASH_SPANSION_S29WS_N 939 offset = ((unsigned long)dst - info->start[sector]) >> shift; 940 #endif 941 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); 942 cnt = len >> shift; 943 flash_write_cmd(info, sector, offset, cnt - 1); 944 945 switch (info->portwidth) { 946 case FLASH_CFI_8BIT: 947 while (cnt-- > 0) { 948 flash_write8(flash_read8(src), dst); 949 src += 1, dst += 1; 950 } 951 break; 952 case FLASH_CFI_16BIT: 953 while (cnt-- > 0) { 954 flash_write16(flash_read16(src), dst); 955 src += 2, dst += 2; 956 } 957 break; 958 case FLASH_CFI_32BIT: 959 while (cnt-- > 0) { 960 flash_write32(flash_read32(src), dst); 961 src += 4, dst += 4; 962 } 963 break; 964 case FLASH_CFI_64BIT: 965 while (cnt-- > 0) { 966 flash_write64(flash_read64(src), dst); 967 src += 8, dst += 8; 968 } 969 break; 970 default: 971 retcode = ERR_INVAL; 972 goto out_unmap; 973 } 974 975 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); 976 if (use_flash_status_poll(info)) 977 retcode = flash_status_poll(info, src - (1 << shift), 978 dst - (1 << shift), 979 info->buffer_write_tout, 980 "buffer write"); 981 else 982 retcode = flash_full_status_check(info, sector, 983 info->buffer_write_tout, 984 "buffer write"); 985 break; 986 987 default: 988 debug ("Unknown Command Set\n"); 989 retcode = ERR_INVAL; 990 break; 991 } 992 993 out_unmap: 994 return retcode; 995 } 996 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 997 998 999 /*----------------------------------------------------------------------- 1000 */ 1001 int flash_erase (flash_info_t * info, int s_first, int s_last) 1002 { 1003 int rcode = 0; 1004 int prot; 1005 flash_sect_t sect; 1006 int st; 1007 1008 if (info->flash_id != FLASH_MAN_CFI) { 1009 puts ("Can't erase unknown flash type - aborted\n"); 1010 return 1; 1011 } 1012 if ((s_first < 0) || (s_first > s_last)) { 1013 puts ("- no sectors to erase\n"); 1014 return 1; 1015 } 1016 1017 prot = 0; 1018 for (sect = s_first; sect <= s_last; ++sect) { 1019 if (info->protect[sect]) { 1020 prot++; 1021 } 1022 } 1023 if (prot) { 1024 printf ("- Warning: %d protected sectors will not be erased!\n", 1025 prot); 1026 } else if (flash_verbose) { 1027 putc ('\n'); 1028 } 1029 1030 1031 for (sect = s_first; sect <= s_last; sect++) { 1032 if (info->protect[sect] == 0) { /* not protected */ 1033 switch (info->vendor) { 1034 case CFI_CMDSET_INTEL_PROG_REGIONS: 1035 case CFI_CMDSET_INTEL_STANDARD: 1036 case CFI_CMDSET_INTEL_EXTENDED: 1037 flash_write_cmd (info, sect, 0, 1038 FLASH_CMD_CLEAR_STATUS); 1039 flash_write_cmd (info, sect, 0, 1040 FLASH_CMD_BLOCK_ERASE); 1041 flash_write_cmd (info, sect, 0, 1042 FLASH_CMD_ERASE_CONFIRM); 1043 break; 1044 case CFI_CMDSET_AMD_STANDARD: 1045 case CFI_CMDSET_AMD_EXTENDED: 1046 flash_unlock_seq (info, sect); 1047 flash_write_cmd (info, sect, 1048 info->addr_unlock1, 1049 AMD_CMD_ERASE_START); 1050 flash_unlock_seq (info, sect); 1051 flash_write_cmd (info, sect, 0, 1052 AMD_CMD_ERASE_SECTOR); 1053 break; 1054 #ifdef CONFIG_FLASH_CFI_LEGACY 1055 case CFI_CMDSET_AMD_LEGACY: 1056 flash_unlock_seq (info, 0); 1057 flash_write_cmd (info, 0, info->addr_unlock1, 1058 AMD_CMD_ERASE_START); 1059 flash_unlock_seq (info, 0); 1060 flash_write_cmd (info, sect, 0, 1061 AMD_CMD_ERASE_SECTOR); 1062 break; 1063 #endif 1064 default: 1065 debug ("Unkown flash vendor %d\n", 1066 info->vendor); 1067 break; 1068 } 1069 1070 if (use_flash_status_poll(info)) { 1071 cfiword_t cword = (cfiword_t)0xffffffffffffffffULL; 1072 void *dest; 1073 dest = flash_map(info, sect, 0); 1074 st = flash_status_poll(info, &cword, dest, 1075 info->erase_blk_tout, "erase"); 1076 flash_unmap(info, sect, 0, dest); 1077 } else 1078 st = flash_full_status_check(info, sect, 1079 info->erase_blk_tout, 1080 "erase"); 1081 if (st) 1082 rcode = 1; 1083 else if (flash_verbose) 1084 putc ('.'); 1085 } 1086 } 1087 1088 if (flash_verbose) 1089 puts (" done\n"); 1090 1091 return rcode; 1092 } 1093 1094 /*----------------------------------------------------------------------- 1095 */ 1096 void flash_print_info (flash_info_t * info) 1097 { 1098 int i; 1099 1100 if (info->flash_id != FLASH_MAN_CFI) { 1101 puts ("missing or unknown FLASH type\n"); 1102 return; 1103 } 1104 1105 printf ("%s FLASH (%d x %d)", 1106 info->name, 1107 (info->portwidth << 3), (info->chipwidth << 3)); 1108 if (info->size < 1024*1024) 1109 printf (" Size: %ld kB in %d Sectors\n", 1110 info->size >> 10, info->sector_count); 1111 else 1112 printf (" Size: %ld MB in %d Sectors\n", 1113 info->size >> 20, info->sector_count); 1114 printf (" "); 1115 switch (info->vendor) { 1116 case CFI_CMDSET_INTEL_PROG_REGIONS: 1117 printf ("Intel Prog Regions"); 1118 break; 1119 case CFI_CMDSET_INTEL_STANDARD: 1120 printf ("Intel Standard"); 1121 break; 1122 case CFI_CMDSET_INTEL_EXTENDED: 1123 printf ("Intel Extended"); 1124 break; 1125 case CFI_CMDSET_AMD_STANDARD: 1126 printf ("AMD Standard"); 1127 break; 1128 case CFI_CMDSET_AMD_EXTENDED: 1129 printf ("AMD Extended"); 1130 break; 1131 #ifdef CONFIG_FLASH_CFI_LEGACY 1132 case CFI_CMDSET_AMD_LEGACY: 1133 printf ("AMD Legacy"); 1134 break; 1135 #endif 1136 default: 1137 printf ("Unknown (%d)", info->vendor); 1138 break; 1139 } 1140 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", 1141 info->manufacturer_id, info->device_id); 1142 if (info->device_id == 0x7E) { 1143 printf("%04X", info->device_id2); 1144 } 1145 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", 1146 info->erase_blk_tout, 1147 info->write_tout); 1148 if (info->buffer_size > 1) { 1149 printf (" Buffer write timeout: %ld ms, " 1150 "buffer size: %d bytes\n", 1151 info->buffer_write_tout, 1152 info->buffer_size); 1153 } 1154 1155 puts ("\n Sector Start Addresses:"); 1156 for (i = 0; i < info->sector_count; ++i) { 1157 if ((i % 5) == 0) 1158 printf ("\n"); 1159 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 1160 int k; 1161 int size; 1162 int erased; 1163 volatile unsigned long *flash; 1164 1165 /* 1166 * Check if whole sector is erased 1167 */ 1168 size = flash_sector_size(info, i); 1169 erased = 1; 1170 flash = (volatile unsigned long *) info->start[i]; 1171 size = size >> 2; /* divide by 4 for longword access */ 1172 for (k = 0; k < size; k++) { 1173 if (*flash++ != 0xffffffff) { 1174 erased = 0; 1175 break; 1176 } 1177 } 1178 1179 /* print empty and read-only info */ 1180 printf (" %08lX %c %s ", 1181 info->start[i], 1182 erased ? 'E' : ' ', 1183 info->protect[i] ? "RO" : " "); 1184 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ 1185 printf (" %08lX %s ", 1186 info->start[i], 1187 info->protect[i] ? "RO" : " "); 1188 #endif 1189 } 1190 putc ('\n'); 1191 return; 1192 } 1193 1194 /*----------------------------------------------------------------------- 1195 * This is used in a few places in write_buf() to show programming 1196 * progress. Making it a function is nasty because it needs to do side 1197 * effect updates to digit and dots. Repeated code is nasty too, so 1198 * we define it once here. 1199 */ 1200 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1201 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ 1202 if (flash_verbose) { \ 1203 dots -= dots_sub; \ 1204 if ((scale > 0) && (dots <= 0)) { \ 1205 if ((digit % 5) == 0) \ 1206 printf ("%d", digit / 5); \ 1207 else \ 1208 putc ('.'); \ 1209 digit--; \ 1210 dots += scale; \ 1211 } \ 1212 } 1213 #else 1214 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) 1215 #endif 1216 1217 /*----------------------------------------------------------------------- 1218 * Copy memory to flash, returns: 1219 * 0 - OK 1220 * 1 - write timeout 1221 * 2 - Flash not erased 1222 */ 1223 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 1224 { 1225 ulong wp; 1226 uchar *p; 1227 int aln; 1228 cfiword_t cword; 1229 int i, rc; 1230 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1231 int buffered_size; 1232 #endif 1233 #ifdef CONFIG_FLASH_SHOW_PROGRESS 1234 int digit = CONFIG_FLASH_SHOW_PROGRESS; 1235 int scale = 0; 1236 int dots = 0; 1237 1238 /* 1239 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes. 1240 */ 1241 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) { 1242 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) / 1243 CONFIG_FLASH_SHOW_PROGRESS); 1244 } 1245 #endif 1246 1247 /* get lower aligned address */ 1248 wp = (addr & ~(info->portwidth - 1)); 1249 1250 /* handle unaligned start */ 1251 if ((aln = addr - wp) != 0) { 1252 cword.l = 0; 1253 p = (uchar *)wp; 1254 for (i = 0; i < aln; ++i) 1255 flash_add_byte (info, &cword, flash_read8(p + i)); 1256 1257 for (; (i < info->portwidth) && (cnt > 0); i++) { 1258 flash_add_byte (info, &cword, *src++); 1259 cnt--; 1260 } 1261 for (; (cnt == 0) && (i < info->portwidth); ++i) 1262 flash_add_byte (info, &cword, flash_read8(p + i)); 1263 1264 rc = flash_write_cfiword (info, wp, cword); 1265 if (rc != 0) 1266 return rc; 1267 1268 wp += i; 1269 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1270 } 1271 1272 /* handle the aligned part */ 1273 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1274 buffered_size = (info->portwidth / info->chipwidth); 1275 buffered_size *= info->buffer_size; 1276 while (cnt >= info->portwidth) { 1277 /* prohibit buffer write when buffer_size is 1 */ 1278 if (info->buffer_size == 1) { 1279 cword.l = 0; 1280 for (i = 0; i < info->portwidth; i++) 1281 flash_add_byte (info, &cword, *src++); 1282 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1283 return rc; 1284 wp += info->portwidth; 1285 cnt -= info->portwidth; 1286 continue; 1287 } 1288 1289 /* write buffer until next buffered_size aligned boundary */ 1290 i = buffered_size - (wp % buffered_size); 1291 if (i > cnt) 1292 i = cnt; 1293 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) 1294 return rc; 1295 i -= i & (info->portwidth - 1); 1296 wp += i; 1297 src += i; 1298 cnt -= i; 1299 FLASH_SHOW_PROGRESS(scale, dots, digit, i); 1300 } 1301 #else 1302 while (cnt >= info->portwidth) { 1303 cword.l = 0; 1304 for (i = 0; i < info->portwidth; i++) { 1305 flash_add_byte (info, &cword, *src++); 1306 } 1307 if ((rc = flash_write_cfiword (info, wp, cword)) != 0) 1308 return rc; 1309 wp += info->portwidth; 1310 cnt -= info->portwidth; 1311 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); 1312 } 1313 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ 1314 1315 if (cnt == 0) { 1316 return (0); 1317 } 1318 1319 /* 1320 * handle unaligned tail bytes 1321 */ 1322 cword.l = 0; 1323 p = (uchar *)wp; 1324 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) { 1325 flash_add_byte (info, &cword, *src++); 1326 --cnt; 1327 } 1328 for (; i < info->portwidth; ++i) 1329 flash_add_byte (info, &cword, flash_read8(p + i)); 1330 1331 return flash_write_cfiword (info, wp, cword); 1332 } 1333 1334 /*----------------------------------------------------------------------- 1335 */ 1336 #ifdef CONFIG_SYS_FLASH_PROTECTION 1337 1338 int flash_real_protect (flash_info_t * info, long sector, int prot) 1339 { 1340 int retcode = 0; 1341 1342 switch (info->vendor) { 1343 case CFI_CMDSET_INTEL_PROG_REGIONS: 1344 case CFI_CMDSET_INTEL_STANDARD: 1345 case CFI_CMDSET_INTEL_EXTENDED: 1346 flash_write_cmd (info, sector, 0, 1347 FLASH_CMD_CLEAR_STATUS); 1348 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1349 if (prot) 1350 flash_write_cmd (info, sector, 0, 1351 FLASH_CMD_PROTECT_SET); 1352 else 1353 flash_write_cmd (info, sector, 0, 1354 FLASH_CMD_PROTECT_CLEAR); 1355 break; 1356 case CFI_CMDSET_AMD_EXTENDED: 1357 case CFI_CMDSET_AMD_STANDARD: 1358 /* U-Boot only checks the first byte */ 1359 if (info->manufacturer_id == (uchar)ATM_MANUFACT) { 1360 if (prot) { 1361 flash_unlock_seq (info, 0); 1362 flash_write_cmd (info, 0, 1363 info->addr_unlock1, 1364 ATM_CMD_SOFTLOCK_START); 1365 flash_unlock_seq (info, 0); 1366 flash_write_cmd (info, sector, 0, 1367 ATM_CMD_LOCK_SECT); 1368 } else { 1369 flash_write_cmd (info, 0, 1370 info->addr_unlock1, 1371 AMD_CMD_UNLOCK_START); 1372 if (info->device_id == ATM_ID_BV6416) 1373 flash_write_cmd (info, sector, 1374 0, ATM_CMD_UNLOCK_SECT); 1375 } 1376 } 1377 break; 1378 #ifdef CONFIG_FLASH_CFI_LEGACY 1379 case CFI_CMDSET_AMD_LEGACY: 1380 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); 1381 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT); 1382 if (prot) 1383 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET); 1384 else 1385 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR); 1386 #endif 1387 }; 1388 1389 if ((retcode = 1390 flash_full_status_check (info, sector, info->erase_blk_tout, 1391 prot ? "protect" : "unprotect")) == 0) { 1392 1393 info->protect[sector] = prot; 1394 1395 /* 1396 * On some of Intel's flash chips (marked via legacy_unlock) 1397 * unprotect unprotects all locking. 1398 */ 1399 if ((prot == 0) && (info->legacy_unlock)) { 1400 flash_sect_t i; 1401 1402 for (i = 0; i < info->sector_count; i++) { 1403 if (info->protect[i]) 1404 flash_real_protect (info, i, 1); 1405 } 1406 } 1407 } 1408 return retcode; 1409 } 1410 1411 /*----------------------------------------------------------------------- 1412 * flash_read_user_serial - read the OneTimeProgramming cells 1413 */ 1414 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, 1415 int len) 1416 { 1417 uchar *src; 1418 uchar *dst; 1419 1420 dst = buffer; 1421 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION); 1422 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1423 memcpy (dst, src + offset, len); 1424 flash_write_cmd (info, 0, 0, info->cmd_reset); 1425 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src); 1426 } 1427 1428 /* 1429 * flash_read_factory_serial - read the device Id from the protection area 1430 */ 1431 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, 1432 int len) 1433 { 1434 uchar *src; 1435 1436 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION); 1437 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); 1438 memcpy (buffer, src + offset, len); 1439 flash_write_cmd (info, 0, 0, info->cmd_reset); 1440 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); 1441 } 1442 1443 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 1444 1445 /*----------------------------------------------------------------------- 1446 * Reverse the order of the erase regions in the CFI QRY structure. 1447 * This is needed for chips that are either a) correctly detected as 1448 * top-boot, or b) buggy. 1449 */ 1450 static void cfi_reverse_geometry(struct cfi_qry *qry) 1451 { 1452 unsigned int i, j; 1453 u32 tmp; 1454 1455 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) { 1456 tmp = qry->erase_region_info[i]; 1457 qry->erase_region_info[i] = qry->erase_region_info[j]; 1458 qry->erase_region_info[j] = tmp; 1459 } 1460 } 1461 1462 /*----------------------------------------------------------------------- 1463 * read jedec ids from device and set corresponding fields in info struct 1464 * 1465 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct 1466 * 1467 */ 1468 static void cmdset_intel_read_jedec_ids(flash_info_t *info) 1469 { 1470 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1471 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); 1472 udelay(1000); /* some flash are slow to respond */ 1473 info->manufacturer_id = flash_read_uchar (info, 1474 FLASH_OFFSET_MANUFACTURER_ID); 1475 info->device_id = flash_read_uchar (info, 1476 FLASH_OFFSET_DEVICE_ID); 1477 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1478 } 1479 1480 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) 1481 { 1482 info->cmd_reset = FLASH_CMD_RESET; 1483 1484 cmdset_intel_read_jedec_ids(info); 1485 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1486 1487 #ifdef CONFIG_SYS_FLASH_PROTECTION 1488 /* read legacy lock/unlock bit from intel flash */ 1489 if (info->ext_addr) { 1490 info->legacy_unlock = flash_read_uchar (info, 1491 info->ext_addr + 5) & 0x08; 1492 } 1493 #endif 1494 1495 return 0; 1496 } 1497 1498 static void cmdset_amd_read_jedec_ids(flash_info_t *info) 1499 { 1500 ushort bankId = 0; 1501 uchar manuId; 1502 1503 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1504 flash_unlock_seq(info, 0); 1505 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID); 1506 udelay(1000); /* some flash are slow to respond */ 1507 1508 manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID); 1509 /* JEDEC JEP106Z specifies ID codes up to bank 7 */ 1510 while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) { 1511 bankId += 0x100; 1512 manuId = flash_read_uchar (info, 1513 bankId | FLASH_OFFSET_MANUFACTURER_ID); 1514 } 1515 info->manufacturer_id = manuId; 1516 1517 switch (info->chipwidth){ 1518 case FLASH_CFI_8BIT: 1519 info->device_id = flash_read_uchar (info, 1520 FLASH_OFFSET_DEVICE_ID); 1521 if (info->device_id == 0x7E) { 1522 /* AMD 3-byte (expanded) device ids */ 1523 info->device_id2 = flash_read_uchar (info, 1524 FLASH_OFFSET_DEVICE_ID2); 1525 info->device_id2 <<= 8; 1526 info->device_id2 |= flash_read_uchar (info, 1527 FLASH_OFFSET_DEVICE_ID3); 1528 } 1529 break; 1530 case FLASH_CFI_16BIT: 1531 info->device_id = flash_read_word (info, 1532 FLASH_OFFSET_DEVICE_ID); 1533 break; 1534 default: 1535 break; 1536 } 1537 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1538 } 1539 1540 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry) 1541 { 1542 info->cmd_reset = AMD_CMD_RESET; 1543 1544 cmdset_amd_read_jedec_ids(info); 1545 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); 1546 1547 return 0; 1548 } 1549 1550 #ifdef CONFIG_FLASH_CFI_LEGACY 1551 static void flash_read_jedec_ids (flash_info_t * info) 1552 { 1553 info->manufacturer_id = 0; 1554 info->device_id = 0; 1555 info->device_id2 = 0; 1556 1557 switch (info->vendor) { 1558 case CFI_CMDSET_INTEL_PROG_REGIONS: 1559 case CFI_CMDSET_INTEL_STANDARD: 1560 case CFI_CMDSET_INTEL_EXTENDED: 1561 cmdset_intel_read_jedec_ids(info); 1562 break; 1563 case CFI_CMDSET_AMD_STANDARD: 1564 case CFI_CMDSET_AMD_EXTENDED: 1565 cmdset_amd_read_jedec_ids(info); 1566 break; 1567 default: 1568 break; 1569 } 1570 } 1571 1572 /*----------------------------------------------------------------------- 1573 * Call board code to request info about non-CFI flash. 1574 * board_flash_get_legacy needs to fill in at least: 1575 * info->portwidth, info->chipwidth and info->interface for Jedec probing. 1576 */ 1577 static int flash_detect_legacy(phys_addr_t base, int banknum) 1578 { 1579 flash_info_t *info = &flash_info[banknum]; 1580 1581 if (board_flash_get_legacy(base, banknum, info)) { 1582 /* board code may have filled info completely. If not, we 1583 use JEDEC ID probing. */ 1584 if (!info->vendor) { 1585 int modes[] = { 1586 CFI_CMDSET_AMD_STANDARD, 1587 CFI_CMDSET_INTEL_STANDARD 1588 }; 1589 int i; 1590 1591 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) { 1592 info->vendor = modes[i]; 1593 info->start[0] = 1594 (ulong)map_physmem(base, 1595 info->portwidth, 1596 MAP_NOCACHE); 1597 if (info->portwidth == FLASH_CFI_8BIT 1598 && info->interface == FLASH_CFI_X8X16) { 1599 info->addr_unlock1 = 0x2AAA; 1600 info->addr_unlock2 = 0x5555; 1601 } else { 1602 info->addr_unlock1 = 0x5555; 1603 info->addr_unlock2 = 0x2AAA; 1604 } 1605 flash_read_jedec_ids(info); 1606 debug("JEDEC PROBE: ID %x %x %x\n", 1607 info->manufacturer_id, 1608 info->device_id, 1609 info->device_id2); 1610 if (jedec_flash_match(info, info->start[0])) 1611 break; 1612 else 1613 unmap_physmem((void *)info->start[0], 1614 MAP_NOCACHE); 1615 } 1616 } 1617 1618 switch(info->vendor) { 1619 case CFI_CMDSET_INTEL_PROG_REGIONS: 1620 case CFI_CMDSET_INTEL_STANDARD: 1621 case CFI_CMDSET_INTEL_EXTENDED: 1622 info->cmd_reset = FLASH_CMD_RESET; 1623 break; 1624 case CFI_CMDSET_AMD_STANDARD: 1625 case CFI_CMDSET_AMD_EXTENDED: 1626 case CFI_CMDSET_AMD_LEGACY: 1627 info->cmd_reset = AMD_CMD_RESET; 1628 break; 1629 } 1630 info->flash_id = FLASH_MAN_CFI; 1631 return 1; 1632 } 1633 return 0; /* use CFI */ 1634 } 1635 #else 1636 static inline int flash_detect_legacy(phys_addr_t base, int banknum) 1637 { 1638 return 0; /* use CFI */ 1639 } 1640 #endif 1641 1642 /*----------------------------------------------------------------------- 1643 * detect if flash is compatible with the Common Flash Interface (CFI) 1644 * http://www.jedec.org/download/search/jesd68.pdf 1645 */ 1646 static void flash_read_cfi (flash_info_t *info, void *buf, 1647 unsigned int start, size_t len) 1648 { 1649 u8 *p = buf; 1650 unsigned int i; 1651 1652 for (i = 0; i < len; i++) 1653 p[i] = flash_read_uchar(info, start + i); 1654 } 1655 1656 void __flash_cmd_reset(flash_info_t *info) 1657 { 1658 /* 1659 * We do not yet know what kind of commandset to use, so we issue 1660 * the reset command in both Intel and AMD variants, in the hope 1661 * that AMD flash roms ignore the Intel command. 1662 */ 1663 flash_write_cmd(info, 0, 0, AMD_CMD_RESET); 1664 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1665 } 1666 void flash_cmd_reset(flash_info_t *info) 1667 __attribute__((weak,alias("__flash_cmd_reset"))); 1668 1669 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1670 { 1671 int cfi_offset; 1672 1673 /* Issue FLASH reset command */ 1674 flash_cmd_reset(info); 1675 1676 for (cfi_offset=0; 1677 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint); 1678 cfi_offset++) { 1679 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], 1680 FLASH_CMD_CFI); 1681 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') 1682 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') 1683 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { 1684 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP, 1685 sizeof(struct cfi_qry)); 1686 info->interface = le16_to_cpu(qry->interface_desc); 1687 1688 info->cfi_offset = flash_offset_cfi[cfi_offset]; 1689 debug ("device interface is %d\n", 1690 info->interface); 1691 debug ("found port %d chip %d ", 1692 info->portwidth, info->chipwidth); 1693 debug ("port %d bits chip %d bits\n", 1694 info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1695 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1696 1697 /* calculate command offsets as in the Linux driver */ 1698 info->addr_unlock1 = 0x555; 1699 info->addr_unlock2 = 0x2aa; 1700 1701 /* 1702 * modify the unlock address if we are 1703 * in compatibility mode 1704 */ 1705 if ( /* x8/x16 in x8 mode */ 1706 ((info->chipwidth == FLASH_CFI_BY8) && 1707 (info->interface == FLASH_CFI_X8X16)) || 1708 /* x16/x32 in x16 mode */ 1709 ((info->chipwidth == FLASH_CFI_BY16) && 1710 (info->interface == FLASH_CFI_X16X32))) 1711 { 1712 info->addr_unlock1 = 0xaaa; 1713 info->addr_unlock2 = 0x555; 1714 } 1715 1716 info->name = "CFI conformant"; 1717 return 1; 1718 } 1719 } 1720 1721 return 0; 1722 } 1723 1724 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) 1725 { 1726 debug ("flash detect cfi\n"); 1727 1728 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; 1729 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { 1730 for (info->chipwidth = FLASH_CFI_BY8; 1731 info->chipwidth <= info->portwidth; 1732 info->chipwidth <<= 1) 1733 if (__flash_detect_cfi(info, qry)) 1734 return 1; 1735 } 1736 debug ("not found\n"); 1737 return 0; 1738 } 1739 1740 /* 1741 * Manufacturer-specific quirks. Add workarounds for geometry 1742 * reversal, etc. here. 1743 */ 1744 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry) 1745 { 1746 /* check if flash geometry needs reversal */ 1747 if (qry->num_erase_regions > 1) { 1748 /* reverse geometry if top boot part */ 1749 if (info->cfi_version < 0x3131) { 1750 /* CFI < 1.1, try to guess from device id */ 1751 if ((info->device_id & 0x80) != 0) 1752 cfi_reverse_geometry(qry); 1753 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { 1754 /* CFI >= 1.1, deduct from top/bottom flag */ 1755 /* note: ext_addr is valid since cfi_version > 0 */ 1756 cfi_reverse_geometry(qry); 1757 } 1758 } 1759 } 1760 1761 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry) 1762 { 1763 int reverse_geometry = 0; 1764 1765 /* Check the "top boot" bit in the PRI */ 1766 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1)) 1767 reverse_geometry = 1; 1768 1769 /* AT49BV6416(T) list the erase regions in the wrong order. 1770 * However, the device ID is identical with the non-broken 1771 * AT49BV642D they differ in the high byte. 1772 */ 1773 if (info->device_id == 0xd6 || info->device_id == 0xd2) 1774 reverse_geometry = !reverse_geometry; 1775 1776 if (reverse_geometry) 1777 cfi_reverse_geometry(qry); 1778 } 1779 1780 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry) 1781 { 1782 /* check if flash geometry needs reversal */ 1783 if (qry->num_erase_regions > 1) { 1784 /* reverse geometry if top boot part */ 1785 if (info->cfi_version < 0x3131) { 1786 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */ 1787 if (info->device_id == 0x22CA || 1788 info->device_id == 0x2256) { 1789 cfi_reverse_geometry(qry); 1790 } 1791 } 1792 } 1793 } 1794 1795 /* 1796 * The following code cannot be run from FLASH! 1797 * 1798 */ 1799 ulong flash_get_size (phys_addr_t base, int banknum) 1800 { 1801 flash_info_t *info = &flash_info[banknum]; 1802 int i, j; 1803 flash_sect_t sect_cnt; 1804 phys_addr_t sector; 1805 unsigned long tmp; 1806 int size_ratio; 1807 uchar num_erase_regions; 1808 int erase_region_size; 1809 int erase_region_count; 1810 struct cfi_qry qry; 1811 1812 memset(&qry, 0, sizeof(qry)); 1813 1814 info->ext_addr = 0; 1815 info->cfi_version = 0; 1816 #ifdef CONFIG_SYS_FLASH_PROTECTION 1817 info->legacy_unlock = 0; 1818 #endif 1819 1820 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE); 1821 1822 if (flash_detect_cfi (info, &qry)) { 1823 info->vendor = le16_to_cpu(qry.p_id); 1824 info->ext_addr = le16_to_cpu(qry.p_adr); 1825 num_erase_regions = qry.num_erase_regions; 1826 1827 if (info->ext_addr) { 1828 info->cfi_version = (ushort) flash_read_uchar (info, 1829 info->ext_addr + 3) << 8; 1830 info->cfi_version |= (ushort) flash_read_uchar (info, 1831 info->ext_addr + 4); 1832 } 1833 1834 #ifdef DEBUG 1835 flash_printqry (&qry); 1836 #endif 1837 1838 switch (info->vendor) { 1839 case CFI_CMDSET_INTEL_PROG_REGIONS: 1840 case CFI_CMDSET_INTEL_STANDARD: 1841 case CFI_CMDSET_INTEL_EXTENDED: 1842 cmdset_intel_init(info, &qry); 1843 break; 1844 case CFI_CMDSET_AMD_STANDARD: 1845 case CFI_CMDSET_AMD_EXTENDED: 1846 cmdset_amd_init(info, &qry); 1847 break; 1848 default: 1849 printf("CFI: Unknown command set 0x%x\n", 1850 info->vendor); 1851 /* 1852 * Unfortunately, this means we don't know how 1853 * to get the chip back to Read mode. Might 1854 * as well try an Intel-style reset... 1855 */ 1856 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); 1857 return 0; 1858 } 1859 1860 /* Do manufacturer-specific fixups */ 1861 switch (info->manufacturer_id) { 1862 case 0x0001: 1863 flash_fixup_amd(info, &qry); 1864 break; 1865 case 0x001f: 1866 flash_fixup_atmel(info, &qry); 1867 break; 1868 case 0x0020: 1869 flash_fixup_stm(info, &qry); 1870 break; 1871 } 1872 1873 debug ("manufacturer is %d\n", info->vendor); 1874 debug ("manufacturer id is 0x%x\n", info->manufacturer_id); 1875 debug ("device id is 0x%x\n", info->device_id); 1876 debug ("device id2 is 0x%x\n", info->device_id2); 1877 debug ("cfi version is 0x%04x\n", info->cfi_version); 1878 1879 size_ratio = info->portwidth / info->chipwidth; 1880 /* if the chip is x8/x16 reduce the ratio by half */ 1881 if ((info->interface == FLASH_CFI_X8X16) 1882 && (info->chipwidth == FLASH_CFI_BY8)) { 1883 size_ratio >>= 1; 1884 } 1885 debug ("size_ratio %d port %d bits chip %d bits\n", 1886 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, 1887 info->chipwidth << CFI_FLASH_SHIFT_WIDTH); 1888 debug ("found %d erase regions\n", num_erase_regions); 1889 sect_cnt = 0; 1890 sector = base; 1891 for (i = 0; i < num_erase_regions; i++) { 1892 if (i > NUM_ERASE_REGIONS) { 1893 printf ("%d erase regions found, only %d used\n", 1894 num_erase_regions, NUM_ERASE_REGIONS); 1895 break; 1896 } 1897 1898 tmp = le32_to_cpu(qry.erase_region_info[i]); 1899 debug("erase region %u: 0x%08lx\n", i, tmp); 1900 1901 erase_region_count = (tmp & 0xffff) + 1; 1902 tmp >>= 16; 1903 erase_region_size = 1904 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; 1905 debug ("erase_region_count = %d erase_region_size = %d\n", 1906 erase_region_count, erase_region_size); 1907 for (j = 0; j < erase_region_count; j++) { 1908 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { 1909 printf("ERROR: too many flash sectors\n"); 1910 break; 1911 } 1912 info->start[sect_cnt] = 1913 (ulong)map_physmem(sector, 1914 info->portwidth, 1915 MAP_NOCACHE); 1916 sector += (erase_region_size * size_ratio); 1917 1918 /* 1919 * Only read protection status from 1920 * supported devices (intel...) 1921 */ 1922 switch (info->vendor) { 1923 case CFI_CMDSET_INTEL_PROG_REGIONS: 1924 case CFI_CMDSET_INTEL_EXTENDED: 1925 case CFI_CMDSET_INTEL_STANDARD: 1926 info->protect[sect_cnt] = 1927 flash_isset (info, sect_cnt, 1928 FLASH_OFFSET_PROTECT, 1929 FLASH_STATUS_PROTECT); 1930 break; 1931 default: 1932 /* default: not protected */ 1933 info->protect[sect_cnt] = 0; 1934 } 1935 1936 sect_cnt++; 1937 } 1938 } 1939 1940 info->sector_count = sect_cnt; 1941 info->size = 1 << qry.dev_size; 1942 /* multiply the size by the number of chips */ 1943 info->size *= size_ratio; 1944 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size); 1945 tmp = 1 << qry.block_erase_timeout_typ; 1946 info->erase_blk_tout = tmp * 1947 (1 << qry.block_erase_timeout_max); 1948 tmp = (1 << qry.buf_write_timeout_typ) * 1949 (1 << qry.buf_write_timeout_max); 1950 1951 /* round up when converting to ms */ 1952 info->buffer_write_tout = (tmp + 999) / 1000; 1953 tmp = (1 << qry.word_write_timeout_typ) * 1954 (1 << qry.word_write_timeout_max); 1955 /* round up when converting to ms */ 1956 info->write_tout = (tmp + 999) / 1000; 1957 info->flash_id = FLASH_MAN_CFI; 1958 if ((info->interface == FLASH_CFI_X8X16) && 1959 (info->chipwidth == FLASH_CFI_BY8)) { 1960 /* XXX - Need to test on x8/x16 in parallel. */ 1961 info->portwidth >>= 1; 1962 } 1963 1964 flash_write_cmd (info, 0, 0, info->cmd_reset); 1965 } 1966 1967 return (info->size); 1968 } 1969 1970 void flash_set_verbose(uint v) 1971 { 1972 flash_verbose = v; 1973 } 1974 1975 /*----------------------------------------------------------------------- 1976 */ 1977 unsigned long flash_init (void) 1978 { 1979 unsigned long size = 0; 1980 int i; 1981 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 1982 struct apl_s { 1983 ulong start; 1984 ulong size; 1985 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; 1986 #endif 1987 1988 #ifdef CONFIG_SYS_FLASH_PROTECTION 1989 /* read environment from EEPROM */ 1990 char s[64]; 1991 getenv_r ("unlock", s, sizeof(s)); 1992 #endif 1993 1994 #define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) 1995 1996 /* Init: no FLASHes known */ 1997 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { 1998 flash_info[i].flash_id = FLASH_UNKNOWN; 1999 2000 if (!flash_detect_legacy (BANK_BASE(i), i)) 2001 flash_get_size (BANK_BASE(i), i); 2002 size += flash_info[i].size; 2003 if (flash_info[i].flash_id == FLASH_UNKNOWN) { 2004 #ifndef CONFIG_SYS_FLASH_QUIET_TEST 2005 printf ("## Unknown FLASH on Bank %d " 2006 "- Size = 0x%08lx = %ld MB\n", 2007 i+1, flash_info[i].size, 2008 flash_info[i].size << 20); 2009 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */ 2010 } 2011 #ifdef CONFIG_SYS_FLASH_PROTECTION 2012 else if ((s != NULL) && (strcmp(s, "yes") == 0)) { 2013 /* 2014 * Only the U-Boot image and it's environment 2015 * is protected, all other sectors are 2016 * unprotected (unlocked) if flash hardware 2017 * protection is used (CONFIG_SYS_FLASH_PROTECTION) 2018 * and the environment variable "unlock" is 2019 * set to "yes". 2020 */ 2021 if (flash_info[i].legacy_unlock) { 2022 int k; 2023 2024 /* 2025 * Disable legacy_unlock temporarily, 2026 * since flash_real_protect would 2027 * relock all other sectors again 2028 * otherwise. 2029 */ 2030 flash_info[i].legacy_unlock = 0; 2031 2032 /* 2033 * Legacy unlocking (e.g. Intel J3) -> 2034 * unlock only one sector. This will 2035 * unlock all sectors. 2036 */ 2037 flash_real_protect (&flash_info[i], 0, 0); 2038 2039 flash_info[i].legacy_unlock = 1; 2040 2041 /* 2042 * Manually mark other sectors as 2043 * unlocked (unprotected) 2044 */ 2045 for (k = 1; k < flash_info[i].sector_count; k++) 2046 flash_info[i].protect[k] = 0; 2047 } else { 2048 /* 2049 * No legancy unlocking -> unlock all sectors 2050 */ 2051 flash_protect (FLAG_PROTECT_CLEAR, 2052 flash_info[i].start[0], 2053 flash_info[i].start[0] 2054 + flash_info[i].size - 1, 2055 &flash_info[i]); 2056 } 2057 } 2058 #endif /* CONFIG_SYS_FLASH_PROTECTION */ 2059 } 2060 2061 /* Monitor protection ON by default */ 2062 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \ 2063 (!defined(CONFIG_MONITOR_IS_IN_RAM)) 2064 flash_protect (FLAG_PROTECT_SET, 2065 CONFIG_SYS_MONITOR_BASE, 2066 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, 2067 flash_get_info(CONFIG_SYS_MONITOR_BASE)); 2068 #endif 2069 2070 /* Environment protection ON by default */ 2071 #ifdef CONFIG_ENV_IS_IN_FLASH 2072 flash_protect (FLAG_PROTECT_SET, 2073 CONFIG_ENV_ADDR, 2074 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, 2075 flash_get_info(CONFIG_ENV_ADDR)); 2076 #endif 2077 2078 /* Redundant environment protection ON by default */ 2079 #ifdef CONFIG_ENV_ADDR_REDUND 2080 flash_protect (FLAG_PROTECT_SET, 2081 CONFIG_ENV_ADDR_REDUND, 2082 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, 2083 flash_get_info(CONFIG_ENV_ADDR_REDUND)); 2084 #endif 2085 2086 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) 2087 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { 2088 debug("autoprotecting from %08x to %08x\n", 2089 apl[i].start, apl[i].start + apl[i].size - 1); 2090 flash_protect (FLAG_PROTECT_SET, 2091 apl[i].start, 2092 apl[i].start + apl[i].size - 1, 2093 flash_get_info(apl[i].start)); 2094 } 2095 #endif 2096 2097 #ifdef CONFIG_FLASH_CFI_MTD 2098 cfi_mtd_init(); 2099 #endif 2100 2101 return (size); 2102 } 2103