1 /* 2 * Copyright 2008, Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based vaguely on the Linux code 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <config.h> 11 #include <common.h> 12 #include <command.h> 13 #include <dm.h> 14 #include <dm/device-internal.h> 15 #include <errno.h> 16 #include <mmc.h> 17 #include <part.h> 18 #include <malloc.h> 19 #include <memalign.h> 20 #include <linux/list.h> 21 #include <div64.h> 22 #include "mmc_private.h" 23 24 __weak int board_mmc_getwp(struct mmc *mmc) 25 { 26 return -1; 27 } 28 29 int mmc_getwp(struct mmc *mmc) 30 { 31 int wp; 32 33 wp = board_mmc_getwp(mmc); 34 35 if (wp < 0) { 36 if (mmc->cfg->ops->getwp) 37 wp = mmc->cfg->ops->getwp(mmc); 38 else 39 wp = 0; 40 } 41 42 return wp; 43 } 44 45 __weak int board_mmc_getcd(struct mmc *mmc) 46 { 47 return -1; 48 } 49 50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 51 { 52 int ret; 53 54 #ifdef CONFIG_MMC_TRACE 55 int i; 56 u8 *ptr; 57 58 printf("CMD_SEND:%d\n", cmd->cmdidx); 59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); 60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 61 if (ret) { 62 printf("\t\tRET\t\t\t %d\n", ret); 63 } else { 64 switch (cmd->resp_type) { 65 case MMC_RSP_NONE: 66 printf("\t\tMMC_RSP_NONE\n"); 67 break; 68 case MMC_RSP_R1: 69 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", 70 cmd->response[0]); 71 break; 72 case MMC_RSP_R1b: 73 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", 74 cmd->response[0]); 75 break; 76 case MMC_RSP_R2: 77 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", 78 cmd->response[0]); 79 printf("\t\t \t\t 0x%08X \n", 80 cmd->response[1]); 81 printf("\t\t \t\t 0x%08X \n", 82 cmd->response[2]); 83 printf("\t\t \t\t 0x%08X \n", 84 cmd->response[3]); 85 printf("\n"); 86 printf("\t\t\t\t\tDUMPING DATA\n"); 87 for (i = 0; i < 4; i++) { 88 int j; 89 printf("\t\t\t\t\t%03d - ", i*4); 90 ptr = (u8 *)&cmd->response[i]; 91 ptr += 3; 92 for (j = 0; j < 4; j++) 93 printf("%02X ", *ptr--); 94 printf("\n"); 95 } 96 break; 97 case MMC_RSP_R3: 98 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", 99 cmd->response[0]); 100 break; 101 default: 102 printf("\t\tERROR MMC rsp not supported\n"); 103 break; 104 } 105 } 106 #else 107 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 108 #endif 109 return ret; 110 } 111 112 int mmc_send_status(struct mmc *mmc, int timeout) 113 { 114 struct mmc_cmd cmd; 115 int err, retries = 5; 116 #ifdef CONFIG_MMC_TRACE 117 int status; 118 #endif 119 120 cmd.cmdidx = MMC_CMD_SEND_STATUS; 121 cmd.resp_type = MMC_RSP_R1; 122 if (!mmc_host_is_spi(mmc)) 123 cmd.cmdarg = mmc->rca << 16; 124 125 while (1) { 126 err = mmc_send_cmd(mmc, &cmd, NULL); 127 if (!err) { 128 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && 129 (cmd.response[0] & MMC_STATUS_CURR_STATE) != 130 MMC_STATE_PRG) 131 break; 132 else if (cmd.response[0] & MMC_STATUS_MASK) { 133 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 134 printf("Status Error: 0x%08X\n", 135 cmd.response[0]); 136 #endif 137 return COMM_ERR; 138 } 139 } else if (--retries < 0) 140 return err; 141 142 if (timeout-- <= 0) 143 break; 144 145 udelay(1000); 146 } 147 148 #ifdef CONFIG_MMC_TRACE 149 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; 150 printf("CURR STATE:%d\n", status); 151 #endif 152 if (timeout <= 0) { 153 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 154 printf("Timeout waiting card ready\n"); 155 #endif 156 return TIMEOUT; 157 } 158 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR) 159 return SWITCH_ERR; 160 161 return 0; 162 } 163 164 int mmc_set_blocklen(struct mmc *mmc, int len) 165 { 166 struct mmc_cmd cmd; 167 168 if (mmc->ddr_mode) 169 return 0; 170 171 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; 172 cmd.resp_type = MMC_RSP_R1; 173 cmd.cmdarg = len; 174 175 return mmc_send_cmd(mmc, &cmd, NULL); 176 } 177 178 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, 179 lbaint_t blkcnt) 180 { 181 struct mmc_cmd cmd; 182 struct mmc_data data; 183 184 if (blkcnt > 1) 185 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; 186 else 187 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; 188 189 if (mmc->high_capacity) 190 cmd.cmdarg = start; 191 else 192 cmd.cmdarg = start * mmc->read_bl_len; 193 194 cmd.resp_type = MMC_RSP_R1; 195 196 data.dest = dst; 197 data.blocks = blkcnt; 198 data.blocksize = mmc->read_bl_len; 199 data.flags = MMC_DATA_READ; 200 201 if (mmc_send_cmd(mmc, &cmd, &data)) 202 return 0; 203 204 if (blkcnt > 1) { 205 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; 206 cmd.cmdarg = 0; 207 cmd.resp_type = MMC_RSP_R1b; 208 if (mmc_send_cmd(mmc, &cmd, NULL)) { 209 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 210 printf("mmc fail to send stop cmd\n"); 211 #endif 212 return 0; 213 } 214 } 215 216 return blkcnt; 217 } 218 219 static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, 220 lbaint_t blkcnt, void *dst) 221 { 222 int dev_num = block_dev->devnum; 223 int err; 224 lbaint_t cur, blocks_todo = blkcnt; 225 226 if (blkcnt == 0) 227 return 0; 228 229 struct mmc *mmc = find_mmc_device(dev_num); 230 if (!mmc) 231 return 0; 232 233 err = blk_dselect_hwpart(block_dev, block_dev->hwpart); 234 if (err < 0) 235 return 0; 236 237 if ((start + blkcnt) > block_dev->lba) { 238 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 239 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", 240 start + blkcnt, block_dev->lba); 241 #endif 242 return 0; 243 } 244 245 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) { 246 debug("%s: Failed to set blocklen\n", __func__); 247 return 0; 248 } 249 250 do { 251 cur = (blocks_todo > mmc->cfg->b_max) ? 252 mmc->cfg->b_max : blocks_todo; 253 if (mmc_read_blocks(mmc, dst, start, cur) != cur) { 254 debug("%s: Failed to read blocks\n", __func__); 255 return 0; 256 } 257 blocks_todo -= cur; 258 start += cur; 259 dst += cur * mmc->read_bl_len; 260 } while (blocks_todo > 0); 261 262 return blkcnt; 263 } 264 265 static int mmc_go_idle(struct mmc *mmc) 266 { 267 struct mmc_cmd cmd; 268 int err; 269 270 udelay(1000); 271 272 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; 273 cmd.cmdarg = 0; 274 cmd.resp_type = MMC_RSP_NONE; 275 276 err = mmc_send_cmd(mmc, &cmd, NULL); 277 278 if (err) 279 return err; 280 281 udelay(2000); 282 283 return 0; 284 } 285 286 static int sd_send_op_cond(struct mmc *mmc) 287 { 288 int timeout = 1000; 289 int err; 290 struct mmc_cmd cmd; 291 292 while (1) { 293 cmd.cmdidx = MMC_CMD_APP_CMD; 294 cmd.resp_type = MMC_RSP_R1; 295 cmd.cmdarg = 0; 296 297 err = mmc_send_cmd(mmc, &cmd, NULL); 298 299 if (err) 300 return err; 301 302 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; 303 cmd.resp_type = MMC_RSP_R3; 304 305 /* 306 * Most cards do not answer if some reserved bits 307 * in the ocr are set. However, Some controller 308 * can set bit 7 (reserved for low voltages), but 309 * how to manage low voltages SD card is not yet 310 * specified. 311 */ 312 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : 313 (mmc->cfg->voltages & 0xff8000); 314 315 if (mmc->version == SD_VERSION_2) 316 cmd.cmdarg |= OCR_HCS; 317 318 err = mmc_send_cmd(mmc, &cmd, NULL); 319 320 if (err) 321 return err; 322 323 if (cmd.response[0] & OCR_BUSY) 324 break; 325 326 if (timeout-- <= 0) 327 return UNUSABLE_ERR; 328 329 udelay(1000); 330 } 331 332 if (mmc->version != SD_VERSION_2) 333 mmc->version = SD_VERSION_1_0; 334 335 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 336 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 337 cmd.resp_type = MMC_RSP_R3; 338 cmd.cmdarg = 0; 339 340 err = mmc_send_cmd(mmc, &cmd, NULL); 341 342 if (err) 343 return err; 344 } 345 346 mmc->ocr = cmd.response[0]; 347 348 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 349 mmc->rca = 0; 350 351 return 0; 352 } 353 354 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg) 355 { 356 struct mmc_cmd cmd; 357 int err; 358 359 cmd.cmdidx = MMC_CMD_SEND_OP_COND; 360 cmd.resp_type = MMC_RSP_R3; 361 cmd.cmdarg = 0; 362 if (use_arg && !mmc_host_is_spi(mmc)) 363 cmd.cmdarg = OCR_HCS | 364 (mmc->cfg->voltages & 365 (mmc->ocr & OCR_VOLTAGE_MASK)) | 366 (mmc->ocr & OCR_ACCESS_MODE); 367 368 err = mmc_send_cmd(mmc, &cmd, NULL); 369 if (err) 370 return err; 371 mmc->ocr = cmd.response[0]; 372 return 0; 373 } 374 375 static int mmc_send_op_cond(struct mmc *mmc) 376 { 377 int err, i; 378 379 /* Some cards seem to need this */ 380 mmc_go_idle(mmc); 381 382 /* Asking to the card its capabilities */ 383 for (i = 0; i < 2; i++) { 384 err = mmc_send_op_cond_iter(mmc, i != 0); 385 if (err) 386 return err; 387 388 /* exit if not busy (flag seems to be inverted) */ 389 if (mmc->ocr & OCR_BUSY) 390 break; 391 } 392 mmc->op_cond_pending = 1; 393 return 0; 394 } 395 396 static int mmc_complete_op_cond(struct mmc *mmc) 397 { 398 struct mmc_cmd cmd; 399 int timeout = 1000; 400 uint start; 401 int err; 402 403 mmc->op_cond_pending = 0; 404 if (!(mmc->ocr & OCR_BUSY)) { 405 start = get_timer(0); 406 while (1) { 407 err = mmc_send_op_cond_iter(mmc, 1); 408 if (err) 409 return err; 410 if (mmc->ocr & OCR_BUSY) 411 break; 412 if (get_timer(start) > timeout) 413 return UNUSABLE_ERR; 414 udelay(100); 415 } 416 } 417 418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 420 cmd.resp_type = MMC_RSP_R3; 421 cmd.cmdarg = 0; 422 423 err = mmc_send_cmd(mmc, &cmd, NULL); 424 425 if (err) 426 return err; 427 428 mmc->ocr = cmd.response[0]; 429 } 430 431 mmc->version = MMC_VERSION_UNKNOWN; 432 433 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 434 mmc->rca = 1; 435 436 return 0; 437 } 438 439 440 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) 441 { 442 struct mmc_cmd cmd; 443 struct mmc_data data; 444 int err; 445 446 /* Get the Card Status Register */ 447 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; 448 cmd.resp_type = MMC_RSP_R1; 449 cmd.cmdarg = 0; 450 451 data.dest = (char *)ext_csd; 452 data.blocks = 1; 453 data.blocksize = MMC_MAX_BLOCK_LEN; 454 data.flags = MMC_DATA_READ; 455 456 err = mmc_send_cmd(mmc, &cmd, &data); 457 458 return err; 459 } 460 461 462 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) 463 { 464 struct mmc_cmd cmd; 465 int timeout = 1000; 466 int ret; 467 468 cmd.cmdidx = MMC_CMD_SWITCH; 469 cmd.resp_type = MMC_RSP_R1b; 470 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 471 (index << 16) | 472 (value << 8); 473 474 ret = mmc_send_cmd(mmc, &cmd, NULL); 475 476 /* Waiting for the ready status */ 477 if (!ret) 478 ret = mmc_send_status(mmc, timeout); 479 480 return ret; 481 482 } 483 484 static int mmc_change_freq(struct mmc *mmc) 485 { 486 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 487 char cardtype; 488 int err; 489 490 mmc->card_caps = 0; 491 492 if (mmc_host_is_spi(mmc)) 493 return 0; 494 495 /* Only version 4 supports high-speed */ 496 if (mmc->version < MMC_VERSION_4) 497 return 0; 498 499 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; 500 501 err = mmc_send_ext_csd(mmc, ext_csd); 502 503 if (err) 504 return err; 505 506 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; 507 508 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); 509 510 if (err) 511 return err == SWITCH_ERR ? 0 : err; 512 513 /* Now check to see that it worked */ 514 err = mmc_send_ext_csd(mmc, ext_csd); 515 516 if (err) 517 return err; 518 519 /* No high-speed support */ 520 if (!ext_csd[EXT_CSD_HS_TIMING]) 521 return 0; 522 523 /* High Speed is set, there are two types: 52MHz and 26MHz */ 524 if (cardtype & EXT_CSD_CARD_TYPE_52) { 525 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) 526 mmc->card_caps |= MMC_MODE_DDR_52MHz; 527 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; 528 } else { 529 mmc->card_caps |= MMC_MODE_HS; 530 } 531 532 return 0; 533 } 534 535 static int mmc_set_capacity(struct mmc *mmc, int part_num) 536 { 537 switch (part_num) { 538 case 0: 539 mmc->capacity = mmc->capacity_user; 540 break; 541 case 1: 542 case 2: 543 mmc->capacity = mmc->capacity_boot; 544 break; 545 case 3: 546 mmc->capacity = mmc->capacity_rpmb; 547 break; 548 case 4: 549 case 5: 550 case 6: 551 case 7: 552 mmc->capacity = mmc->capacity_gp[part_num - 4]; 553 break; 554 default: 555 return -1; 556 } 557 558 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len); 559 560 return 0; 561 } 562 563 static int mmc_switch_part(struct mmc *mmc, unsigned int part_num) 564 { 565 int ret; 566 567 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 568 (mmc->part_config & ~PART_ACCESS_MASK) 569 | (part_num & PART_ACCESS_MASK)); 570 571 /* 572 * Set the capacity if the switch succeeded or was intended 573 * to return to representing the raw device. 574 */ 575 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) { 576 ret = mmc_set_capacity(mmc, part_num); 577 mmc_get_blk_desc(mmc)->hwpart = part_num; 578 } 579 580 return ret; 581 } 582 583 static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart) 584 { 585 struct mmc *mmc = find_mmc_device(desc->devnum); 586 int ret; 587 588 if (!mmc) 589 return -ENODEV; 590 591 if (mmc->block_dev.hwpart == hwpart) 592 return 0; 593 594 if (mmc->part_config == MMCPART_NOAVAILABLE) 595 return -EMEDIUMTYPE; 596 597 ret = mmc_switch_part(mmc, hwpart); 598 if (ret) 599 return ret; 600 601 return 0; 602 } 603 604 int mmc_select_hwpart(int dev_num, int hwpart) 605 { 606 struct mmc *mmc = find_mmc_device(dev_num); 607 int ret; 608 609 if (!mmc) 610 return -ENODEV; 611 612 if (mmc->block_dev.hwpart == hwpart) 613 return 0; 614 615 if (mmc->part_config == MMCPART_NOAVAILABLE) 616 return -EMEDIUMTYPE; 617 618 ret = mmc_switch_part(mmc, hwpart); 619 if (ret) 620 return ret; 621 622 return 0; 623 } 624 625 int mmc_hwpart_config(struct mmc *mmc, 626 const struct mmc_hwpart_conf *conf, 627 enum mmc_hwpart_conf_mode mode) 628 { 629 u8 part_attrs = 0; 630 u32 enh_size_mult; 631 u32 enh_start_addr; 632 u32 gp_size_mult[4]; 633 u32 max_enh_size_mult; 634 u32 tot_enh_size_mult = 0; 635 u8 wr_rel_set; 636 int i, pidx, err; 637 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 638 639 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE) 640 return -EINVAL; 641 642 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) { 643 printf("eMMC >= 4.4 required for enhanced user data area\n"); 644 return -EMEDIUMTYPE; 645 } 646 647 if (!(mmc->part_support & PART_SUPPORT)) { 648 printf("Card does not support partitioning\n"); 649 return -EMEDIUMTYPE; 650 } 651 652 if (!mmc->hc_wp_grp_size) { 653 printf("Card does not define HC WP group size\n"); 654 return -EMEDIUMTYPE; 655 } 656 657 /* check partition alignment and total enhanced size */ 658 if (conf->user.enh_size) { 659 if (conf->user.enh_size % mmc->hc_wp_grp_size || 660 conf->user.enh_start % mmc->hc_wp_grp_size) { 661 printf("User data enhanced area not HC WP group " 662 "size aligned\n"); 663 return -EINVAL; 664 } 665 part_attrs |= EXT_CSD_ENH_USR; 666 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size; 667 if (mmc->high_capacity) { 668 enh_start_addr = conf->user.enh_start; 669 } else { 670 enh_start_addr = (conf->user.enh_start << 9); 671 } 672 } else { 673 enh_size_mult = 0; 674 enh_start_addr = 0; 675 } 676 tot_enh_size_mult += enh_size_mult; 677 678 for (pidx = 0; pidx < 4; pidx++) { 679 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) { 680 printf("GP%i partition not HC WP group size " 681 "aligned\n", pidx+1); 682 return -EINVAL; 683 } 684 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size; 685 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) { 686 part_attrs |= EXT_CSD_ENH_GP(pidx); 687 tot_enh_size_mult += gp_size_mult[pidx]; 688 } 689 } 690 691 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) { 692 printf("Card does not support enhanced attribute\n"); 693 return -EMEDIUMTYPE; 694 } 695 696 err = mmc_send_ext_csd(mmc, ext_csd); 697 if (err) 698 return err; 699 700 max_enh_size_mult = 701 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) + 702 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) + 703 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]; 704 if (tot_enh_size_mult > max_enh_size_mult) { 705 printf("Total enhanced size exceeds maximum (%u > %u)\n", 706 tot_enh_size_mult, max_enh_size_mult); 707 return -EMEDIUMTYPE; 708 } 709 710 /* The default value of EXT_CSD_WR_REL_SET is device 711 * dependent, the values can only be changed if the 712 * EXT_CSD_HS_CTRL_REL bit is set. The values can be 713 * changed only once and before partitioning is completed. */ 714 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 715 if (conf->user.wr_rel_change) { 716 if (conf->user.wr_rel_set) 717 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR; 718 else 719 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR; 720 } 721 for (pidx = 0; pidx < 4; pidx++) { 722 if (conf->gp_part[pidx].wr_rel_change) { 723 if (conf->gp_part[pidx].wr_rel_set) 724 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx); 725 else 726 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx); 727 } 728 } 729 730 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] && 731 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) { 732 puts("Card does not support host controlled partition write " 733 "reliability settings\n"); 734 return -EMEDIUMTYPE; 735 } 736 737 if (ext_csd[EXT_CSD_PARTITION_SETTING] & 738 EXT_CSD_PARTITION_SETTING_COMPLETED) { 739 printf("Card already partitioned\n"); 740 return -EPERM; 741 } 742 743 if (mode == MMC_HWPART_CONF_CHECK) 744 return 0; 745 746 /* Partitioning requires high-capacity size definitions */ 747 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) { 748 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 749 EXT_CSD_ERASE_GROUP_DEF, 1); 750 751 if (err) 752 return err; 753 754 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 755 756 /* update erase group size to be high-capacity */ 757 mmc->erase_grp_size = 758 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 759 760 } 761 762 /* all OK, write the configuration */ 763 for (i = 0; i < 4; i++) { 764 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 765 EXT_CSD_ENH_START_ADDR+i, 766 (enh_start_addr >> (i*8)) & 0xFF); 767 if (err) 768 return err; 769 } 770 for (i = 0; i < 3; i++) { 771 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 772 EXT_CSD_ENH_SIZE_MULT+i, 773 (enh_size_mult >> (i*8)) & 0xFF); 774 if (err) 775 return err; 776 } 777 for (pidx = 0; pidx < 4; pidx++) { 778 for (i = 0; i < 3; i++) { 779 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 780 EXT_CSD_GP_SIZE_MULT+pidx*3+i, 781 (gp_size_mult[pidx] >> (i*8)) & 0xFF); 782 if (err) 783 return err; 784 } 785 } 786 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 787 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs); 788 if (err) 789 return err; 790 791 if (mode == MMC_HWPART_CONF_SET) 792 return 0; 793 794 /* The WR_REL_SET is a write-once register but shall be 795 * written before setting PART_SETTING_COMPLETED. As it is 796 * write-once we can only write it when completing the 797 * partitioning. */ 798 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) { 799 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 800 EXT_CSD_WR_REL_SET, wr_rel_set); 801 if (err) 802 return err; 803 } 804 805 /* Setting PART_SETTING_COMPLETED confirms the partition 806 * configuration but it only becomes effective after power 807 * cycle, so we do not adjust the partition related settings 808 * in the mmc struct. */ 809 810 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 811 EXT_CSD_PARTITION_SETTING, 812 EXT_CSD_PARTITION_SETTING_COMPLETED); 813 if (err) 814 return err; 815 816 return 0; 817 } 818 819 int mmc_getcd(struct mmc *mmc) 820 { 821 int cd; 822 823 cd = board_mmc_getcd(mmc); 824 825 if (cd < 0) { 826 if (mmc->cfg->ops->getcd) 827 cd = mmc->cfg->ops->getcd(mmc); 828 else 829 cd = 1; 830 } 831 832 return cd; 833 } 834 835 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) 836 { 837 struct mmc_cmd cmd; 838 struct mmc_data data; 839 840 /* Switch the frequency */ 841 cmd.cmdidx = SD_CMD_SWITCH_FUNC; 842 cmd.resp_type = MMC_RSP_R1; 843 cmd.cmdarg = (mode << 31) | 0xffffff; 844 cmd.cmdarg &= ~(0xf << (group * 4)); 845 cmd.cmdarg |= value << (group * 4); 846 847 data.dest = (char *)resp; 848 data.blocksize = 64; 849 data.blocks = 1; 850 data.flags = MMC_DATA_READ; 851 852 return mmc_send_cmd(mmc, &cmd, &data); 853 } 854 855 856 static int sd_change_freq(struct mmc *mmc) 857 { 858 int err; 859 struct mmc_cmd cmd; 860 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); 861 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); 862 struct mmc_data data; 863 int timeout; 864 865 mmc->card_caps = 0; 866 867 if (mmc_host_is_spi(mmc)) 868 return 0; 869 870 /* Read the SCR to find out if this card supports higher speeds */ 871 cmd.cmdidx = MMC_CMD_APP_CMD; 872 cmd.resp_type = MMC_RSP_R1; 873 cmd.cmdarg = mmc->rca << 16; 874 875 err = mmc_send_cmd(mmc, &cmd, NULL); 876 877 if (err) 878 return err; 879 880 cmd.cmdidx = SD_CMD_APP_SEND_SCR; 881 cmd.resp_type = MMC_RSP_R1; 882 cmd.cmdarg = 0; 883 884 timeout = 3; 885 886 retry_scr: 887 data.dest = (char *)scr; 888 data.blocksize = 8; 889 data.blocks = 1; 890 data.flags = MMC_DATA_READ; 891 892 err = mmc_send_cmd(mmc, &cmd, &data); 893 894 if (err) { 895 if (timeout--) 896 goto retry_scr; 897 898 return err; 899 } 900 901 mmc->scr[0] = __be32_to_cpu(scr[0]); 902 mmc->scr[1] = __be32_to_cpu(scr[1]); 903 904 switch ((mmc->scr[0] >> 24) & 0xf) { 905 case 0: 906 mmc->version = SD_VERSION_1_0; 907 break; 908 case 1: 909 mmc->version = SD_VERSION_1_10; 910 break; 911 case 2: 912 mmc->version = SD_VERSION_2; 913 if ((mmc->scr[0] >> 15) & 0x1) 914 mmc->version = SD_VERSION_3; 915 break; 916 default: 917 mmc->version = SD_VERSION_1_0; 918 break; 919 } 920 921 if (mmc->scr[0] & SD_DATA_4BIT) 922 mmc->card_caps |= MMC_MODE_4BIT; 923 924 /* Version 1.0 doesn't support switching */ 925 if (mmc->version == SD_VERSION_1_0) 926 return 0; 927 928 timeout = 4; 929 while (timeout--) { 930 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, 931 (u8 *)switch_status); 932 933 if (err) 934 return err; 935 936 /* The high-speed function is busy. Try again */ 937 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) 938 break; 939 } 940 941 /* If high-speed isn't supported, we return */ 942 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) 943 return 0; 944 945 /* 946 * If the host doesn't support SD_HIGHSPEED, do not switch card to 947 * HIGHSPEED mode even if the card support SD_HIGHSPPED. 948 * This can avoid furthur problem when the card runs in different 949 * mode between the host. 950 */ 951 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && 952 (mmc->cfg->host_caps & MMC_MODE_HS))) 953 return 0; 954 955 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); 956 957 if (err) 958 return err; 959 960 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) 961 mmc->card_caps |= MMC_MODE_HS; 962 963 return 0; 964 } 965 966 /* frequency bases */ 967 /* divided by 10 to be nice to platforms without floating point */ 968 static const int fbase[] = { 969 10000, 970 100000, 971 1000000, 972 10000000, 973 }; 974 975 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice 976 * to platforms without floating point. 977 */ 978 static const int multipliers[] = { 979 0, /* reserved */ 980 10, 981 12, 982 13, 983 15, 984 20, 985 25, 986 30, 987 35, 988 40, 989 45, 990 50, 991 55, 992 60, 993 70, 994 80, 995 }; 996 997 static void mmc_set_ios(struct mmc *mmc) 998 { 999 if (mmc->cfg->ops->set_ios) 1000 mmc->cfg->ops->set_ios(mmc); 1001 } 1002 1003 void mmc_set_clock(struct mmc *mmc, uint clock) 1004 { 1005 if (clock > mmc->cfg->f_max) 1006 clock = mmc->cfg->f_max; 1007 1008 if (clock < mmc->cfg->f_min) 1009 clock = mmc->cfg->f_min; 1010 1011 mmc->clock = clock; 1012 1013 mmc_set_ios(mmc); 1014 } 1015 1016 static void mmc_set_bus_width(struct mmc *mmc, uint width) 1017 { 1018 mmc->bus_width = width; 1019 1020 mmc_set_ios(mmc); 1021 } 1022 1023 static int mmc_startup(struct mmc *mmc) 1024 { 1025 int err, i; 1026 uint mult, freq; 1027 u64 cmult, csize, capacity; 1028 struct mmc_cmd cmd; 1029 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 1030 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); 1031 int timeout = 1000; 1032 bool has_parts = false; 1033 bool part_completed; 1034 struct blk_desc *bdesc; 1035 1036 #ifdef CONFIG_MMC_SPI_CRC_ON 1037 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ 1038 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; 1039 cmd.resp_type = MMC_RSP_R1; 1040 cmd.cmdarg = 1; 1041 err = mmc_send_cmd(mmc, &cmd, NULL); 1042 1043 if (err) 1044 return err; 1045 } 1046 #endif 1047 1048 /* Put the Card in Identify Mode */ 1049 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : 1050 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ 1051 cmd.resp_type = MMC_RSP_R2; 1052 cmd.cmdarg = 0; 1053 1054 err = mmc_send_cmd(mmc, &cmd, NULL); 1055 1056 if (err) 1057 return err; 1058 1059 memcpy(mmc->cid, cmd.response, 16); 1060 1061 /* 1062 * For MMC cards, set the Relative Address. 1063 * For SD cards, get the Relatvie Address. 1064 * This also puts the cards into Standby State 1065 */ 1066 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1067 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; 1068 cmd.cmdarg = mmc->rca << 16; 1069 cmd.resp_type = MMC_RSP_R6; 1070 1071 err = mmc_send_cmd(mmc, &cmd, NULL); 1072 1073 if (err) 1074 return err; 1075 1076 if (IS_SD(mmc)) 1077 mmc->rca = (cmd.response[0] >> 16) & 0xffff; 1078 } 1079 1080 /* Get the Card-Specific Data */ 1081 cmd.cmdidx = MMC_CMD_SEND_CSD; 1082 cmd.resp_type = MMC_RSP_R2; 1083 cmd.cmdarg = mmc->rca << 16; 1084 1085 err = mmc_send_cmd(mmc, &cmd, NULL); 1086 1087 /* Waiting for the ready status */ 1088 mmc_send_status(mmc, timeout); 1089 1090 if (err) 1091 return err; 1092 1093 mmc->csd[0] = cmd.response[0]; 1094 mmc->csd[1] = cmd.response[1]; 1095 mmc->csd[2] = cmd.response[2]; 1096 mmc->csd[3] = cmd.response[3]; 1097 1098 if (mmc->version == MMC_VERSION_UNKNOWN) { 1099 int version = (cmd.response[0] >> 26) & 0xf; 1100 1101 switch (version) { 1102 case 0: 1103 mmc->version = MMC_VERSION_1_2; 1104 break; 1105 case 1: 1106 mmc->version = MMC_VERSION_1_4; 1107 break; 1108 case 2: 1109 mmc->version = MMC_VERSION_2_2; 1110 break; 1111 case 3: 1112 mmc->version = MMC_VERSION_3; 1113 break; 1114 case 4: 1115 mmc->version = MMC_VERSION_4; 1116 break; 1117 default: 1118 mmc->version = MMC_VERSION_1_2; 1119 break; 1120 } 1121 } 1122 1123 /* divide frequency by 10, since the mults are 10x bigger */ 1124 freq = fbase[(cmd.response[0] & 0x7)]; 1125 mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; 1126 1127 mmc->tran_speed = freq * mult; 1128 1129 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); 1130 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); 1131 1132 if (IS_SD(mmc)) 1133 mmc->write_bl_len = mmc->read_bl_len; 1134 else 1135 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); 1136 1137 if (mmc->high_capacity) { 1138 csize = (mmc->csd[1] & 0x3f) << 16 1139 | (mmc->csd[2] & 0xffff0000) >> 16; 1140 cmult = 8; 1141 } else { 1142 csize = (mmc->csd[1] & 0x3ff) << 2 1143 | (mmc->csd[2] & 0xc0000000) >> 30; 1144 cmult = (mmc->csd[2] & 0x00038000) >> 15; 1145 } 1146 1147 mmc->capacity_user = (csize + 1) << (cmult + 2); 1148 mmc->capacity_user *= mmc->read_bl_len; 1149 mmc->capacity_boot = 0; 1150 mmc->capacity_rpmb = 0; 1151 for (i = 0; i < 4; i++) 1152 mmc->capacity_gp[i] = 0; 1153 1154 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) 1155 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 1156 1157 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) 1158 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 1159 1160 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { 1161 cmd.cmdidx = MMC_CMD_SET_DSR; 1162 cmd.cmdarg = (mmc->dsr & 0xffff) << 16; 1163 cmd.resp_type = MMC_RSP_NONE; 1164 if (mmc_send_cmd(mmc, &cmd, NULL)) 1165 printf("MMC: SET_DSR failed\n"); 1166 } 1167 1168 /* Select the card, and put it into Transfer Mode */ 1169 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 1170 cmd.cmdidx = MMC_CMD_SELECT_CARD; 1171 cmd.resp_type = MMC_RSP_R1; 1172 cmd.cmdarg = mmc->rca << 16; 1173 err = mmc_send_cmd(mmc, &cmd, NULL); 1174 1175 if (err) 1176 return err; 1177 } 1178 1179 /* 1180 * For SD, its erase group is always one sector 1181 */ 1182 mmc->erase_grp_size = 1; 1183 mmc->part_config = MMCPART_NOAVAILABLE; 1184 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { 1185 /* check ext_csd version and capacity */ 1186 err = mmc_send_ext_csd(mmc, ext_csd); 1187 if (err) 1188 return err; 1189 if (ext_csd[EXT_CSD_REV] >= 2) { 1190 /* 1191 * According to the JEDEC Standard, the value of 1192 * ext_csd's capacity is valid if the value is more 1193 * than 2GB 1194 */ 1195 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 1196 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 1197 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 1198 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; 1199 capacity *= MMC_MAX_BLOCK_LEN; 1200 if ((capacity >> 20) > 2 * 1024) 1201 mmc->capacity_user = capacity; 1202 } 1203 1204 switch (ext_csd[EXT_CSD_REV]) { 1205 case 1: 1206 mmc->version = MMC_VERSION_4_1; 1207 break; 1208 case 2: 1209 mmc->version = MMC_VERSION_4_2; 1210 break; 1211 case 3: 1212 mmc->version = MMC_VERSION_4_3; 1213 break; 1214 case 5: 1215 mmc->version = MMC_VERSION_4_41; 1216 break; 1217 case 6: 1218 mmc->version = MMC_VERSION_4_5; 1219 break; 1220 case 7: 1221 mmc->version = MMC_VERSION_5_0; 1222 break; 1223 } 1224 1225 /* The partition data may be non-zero but it is only 1226 * effective if PARTITION_SETTING_COMPLETED is set in 1227 * EXT_CSD, so ignore any data if this bit is not set, 1228 * except for enabling the high-capacity group size 1229 * definition (see below). */ 1230 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] & 1231 EXT_CSD_PARTITION_SETTING_COMPLETED); 1232 1233 /* store the partition info of emmc */ 1234 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; 1235 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || 1236 ext_csd[EXT_CSD_BOOT_MULT]) 1237 mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; 1238 if (part_completed && 1239 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) 1240 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; 1241 1242 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; 1243 1244 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; 1245 1246 for (i = 0; i < 4; i++) { 1247 int idx = EXT_CSD_GP_SIZE_MULT + i * 3; 1248 uint mult = (ext_csd[idx + 2] << 16) + 1249 (ext_csd[idx + 1] << 8) + ext_csd[idx]; 1250 if (mult) 1251 has_parts = true; 1252 if (!part_completed) 1253 continue; 1254 mmc->capacity_gp[i] = mult; 1255 mmc->capacity_gp[i] *= 1256 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1257 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1258 mmc->capacity_gp[i] <<= 19; 1259 } 1260 1261 if (part_completed) { 1262 mmc->enh_user_size = 1263 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) + 1264 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) + 1265 ext_csd[EXT_CSD_ENH_SIZE_MULT]; 1266 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1267 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1268 mmc->enh_user_size <<= 19; 1269 mmc->enh_user_start = 1270 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) + 1271 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) + 1272 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) + 1273 ext_csd[EXT_CSD_ENH_START_ADDR]; 1274 if (mmc->high_capacity) 1275 mmc->enh_user_start <<= 9; 1276 } 1277 1278 /* 1279 * Host needs to enable ERASE_GRP_DEF bit if device is 1280 * partitioned. This bit will be lost every time after a reset 1281 * or power off. This will affect erase size. 1282 */ 1283 if (part_completed) 1284 has_parts = true; 1285 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && 1286 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) 1287 has_parts = true; 1288 if (has_parts) { 1289 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1290 EXT_CSD_ERASE_GROUP_DEF, 1); 1291 1292 if (err) 1293 return err; 1294 else 1295 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 1296 } 1297 1298 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) { 1299 /* Read out group size from ext_csd */ 1300 mmc->erase_grp_size = 1301 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 1302 /* 1303 * if high capacity and partition setting completed 1304 * SEC_COUNT is valid even if it is smaller than 2 GiB 1305 * JEDEC Standard JESD84-B45, 6.2.4 1306 */ 1307 if (mmc->high_capacity && part_completed) { 1308 capacity = (ext_csd[EXT_CSD_SEC_CNT]) | 1309 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | 1310 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | 1311 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1312 capacity *= MMC_MAX_BLOCK_LEN; 1313 mmc->capacity_user = capacity; 1314 } 1315 } else { 1316 /* Calculate the group size from the csd value. */ 1317 int erase_gsz, erase_gmul; 1318 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; 1319 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; 1320 mmc->erase_grp_size = (erase_gsz + 1) 1321 * (erase_gmul + 1); 1322 } 1323 1324 mmc->hc_wp_grp_size = 1024 1325 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1326 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1327 1328 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; 1329 } 1330 1331 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart); 1332 if (err) 1333 return err; 1334 1335 if (IS_SD(mmc)) 1336 err = sd_change_freq(mmc); 1337 else 1338 err = mmc_change_freq(mmc); 1339 1340 if (err) 1341 return err; 1342 1343 /* Restrict card's capabilities by what the host can do */ 1344 mmc->card_caps &= mmc->cfg->host_caps; 1345 1346 if (IS_SD(mmc)) { 1347 if (mmc->card_caps & MMC_MODE_4BIT) { 1348 cmd.cmdidx = MMC_CMD_APP_CMD; 1349 cmd.resp_type = MMC_RSP_R1; 1350 cmd.cmdarg = mmc->rca << 16; 1351 1352 err = mmc_send_cmd(mmc, &cmd, NULL); 1353 if (err) 1354 return err; 1355 1356 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; 1357 cmd.resp_type = MMC_RSP_R1; 1358 cmd.cmdarg = 2; 1359 err = mmc_send_cmd(mmc, &cmd, NULL); 1360 if (err) 1361 return err; 1362 1363 mmc_set_bus_width(mmc, 4); 1364 } 1365 1366 if (mmc->card_caps & MMC_MODE_HS) 1367 mmc->tran_speed = 50000000; 1368 else 1369 mmc->tran_speed = 25000000; 1370 } else if (mmc->version >= MMC_VERSION_4) { 1371 /* Only version 4 of MMC supports wider bus widths */ 1372 int idx; 1373 1374 /* An array of possible bus widths in order of preference */ 1375 static unsigned ext_csd_bits[] = { 1376 EXT_CSD_DDR_BUS_WIDTH_8, 1377 EXT_CSD_DDR_BUS_WIDTH_4, 1378 EXT_CSD_BUS_WIDTH_8, 1379 EXT_CSD_BUS_WIDTH_4, 1380 EXT_CSD_BUS_WIDTH_1, 1381 }; 1382 1383 /* An array to map CSD bus widths to host cap bits */ 1384 static unsigned ext_to_hostcaps[] = { 1385 [EXT_CSD_DDR_BUS_WIDTH_4] = 1386 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT, 1387 [EXT_CSD_DDR_BUS_WIDTH_8] = 1388 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT, 1389 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, 1390 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, 1391 }; 1392 1393 /* An array to map chosen bus width to an integer */ 1394 static unsigned widths[] = { 1395 8, 4, 8, 4, 1, 1396 }; 1397 1398 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { 1399 unsigned int extw = ext_csd_bits[idx]; 1400 unsigned int caps = ext_to_hostcaps[extw]; 1401 1402 /* 1403 * If the bus width is still not changed, 1404 * don't try to set the default again. 1405 * Otherwise, recover from switch attempts 1406 * by switching to 1-bit bus width. 1407 */ 1408 if (extw == EXT_CSD_BUS_WIDTH_1 && 1409 mmc->bus_width == 1) { 1410 err = 0; 1411 break; 1412 } 1413 1414 /* 1415 * Check to make sure the card and controller support 1416 * these capabilities 1417 */ 1418 if ((mmc->card_caps & caps) != caps) 1419 continue; 1420 1421 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1422 EXT_CSD_BUS_WIDTH, extw); 1423 1424 if (err) 1425 continue; 1426 1427 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0; 1428 mmc_set_bus_width(mmc, widths[idx]); 1429 1430 err = mmc_send_ext_csd(mmc, test_csd); 1431 1432 if (err) 1433 continue; 1434 1435 /* Only compare read only fields */ 1436 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] 1437 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && 1438 ext_csd[EXT_CSD_HC_WP_GRP_SIZE] 1439 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && 1440 ext_csd[EXT_CSD_REV] 1441 == test_csd[EXT_CSD_REV] && 1442 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1443 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && 1444 memcmp(&ext_csd[EXT_CSD_SEC_CNT], 1445 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) 1446 break; 1447 else 1448 err = SWITCH_ERR; 1449 } 1450 1451 if (err) 1452 return err; 1453 1454 if (mmc->card_caps & MMC_MODE_HS) { 1455 if (mmc->card_caps & MMC_MODE_HS_52MHz) 1456 mmc->tran_speed = 52000000; 1457 else 1458 mmc->tran_speed = 26000000; 1459 } 1460 } 1461 1462 mmc_set_clock(mmc, mmc->tran_speed); 1463 1464 /* Fix the block length for DDR mode */ 1465 if (mmc->ddr_mode) { 1466 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 1467 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 1468 } 1469 1470 /* fill in device description */ 1471 bdesc = mmc_get_blk_desc(mmc); 1472 bdesc->lun = 0; 1473 bdesc->hwpart = 0; 1474 bdesc->type = 0; 1475 bdesc->blksz = mmc->read_bl_len; 1476 bdesc->log2blksz = LOG2(bdesc->blksz); 1477 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); 1478 #if !defined(CONFIG_SPL_BUILD) || \ 1479 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ 1480 !defined(CONFIG_USE_TINY_PRINTF)) 1481 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x", 1482 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), 1483 (mmc->cid[3] >> 16) & 0xffff); 1484 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, 1485 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, 1486 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, 1487 (mmc->cid[2] >> 24) & 0xff); 1488 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, 1489 (mmc->cid[2] >> 16) & 0xf); 1490 #else 1491 bdesc->vendor[0] = 0; 1492 bdesc->product[0] = 0; 1493 bdesc->revision[0] = 0; 1494 #endif 1495 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) 1496 part_init(bdesc); 1497 #endif 1498 1499 return 0; 1500 } 1501 1502 static int mmc_send_if_cond(struct mmc *mmc) 1503 { 1504 struct mmc_cmd cmd; 1505 int err; 1506 1507 cmd.cmdidx = SD_CMD_SEND_IF_COND; 1508 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ 1509 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; 1510 cmd.resp_type = MMC_RSP_R7; 1511 1512 err = mmc_send_cmd(mmc, &cmd, NULL); 1513 1514 if (err) 1515 return err; 1516 1517 if ((cmd.response[0] & 0xff) != 0xaa) 1518 return UNUSABLE_ERR; 1519 else 1520 mmc->version = SD_VERSION_2; 1521 1522 return 0; 1523 } 1524 1525 /* not used any more */ 1526 int __deprecated mmc_register(struct mmc *mmc) 1527 { 1528 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1529 printf("%s is deprecated! use mmc_create() instead.\n", __func__); 1530 #endif 1531 return -1; 1532 } 1533 1534 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) 1535 { 1536 struct blk_desc *bdesc; 1537 struct mmc *mmc; 1538 1539 /* quick validation */ 1540 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL || 1541 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0) 1542 return NULL; 1543 1544 mmc = calloc(1, sizeof(*mmc)); 1545 if (mmc == NULL) 1546 return NULL; 1547 1548 mmc->cfg = cfg; 1549 mmc->priv = priv; 1550 1551 /* the following chunk was mmc_register() */ 1552 1553 /* Setup dsr related values */ 1554 mmc->dsr_imp = 0; 1555 mmc->dsr = 0xffffffff; 1556 /* Setup the universal parts of the block interface just once */ 1557 bdesc = mmc_get_blk_desc(mmc); 1558 bdesc->if_type = IF_TYPE_MMC; 1559 bdesc->removable = 1; 1560 bdesc->devnum = mmc_get_next_devnum(); 1561 bdesc->block_read = mmc_bread; 1562 bdesc->block_write = mmc_bwrite; 1563 bdesc->block_erase = mmc_berase; 1564 1565 /* setup initial part type */ 1566 bdesc->part_type = mmc->cfg->part_type; 1567 mmc_list_add(mmc); 1568 1569 return mmc; 1570 } 1571 1572 void mmc_destroy(struct mmc *mmc) 1573 { 1574 /* only freeing memory for now */ 1575 free(mmc); 1576 } 1577 1578 static int mmc_get_dev(int dev, struct blk_desc **descp) 1579 { 1580 struct mmc *mmc = find_mmc_device(dev); 1581 int ret; 1582 1583 if (!mmc) 1584 return -ENODEV; 1585 ret = mmc_init(mmc); 1586 if (ret) 1587 return ret; 1588 1589 *descp = &mmc->block_dev; 1590 1591 return 0; 1592 } 1593 1594 /* board-specific MMC power initializations. */ 1595 __weak void board_mmc_power_init(void) 1596 { 1597 } 1598 1599 int mmc_start_init(struct mmc *mmc) 1600 { 1601 int err; 1602 1603 /* we pretend there's no card when init is NULL */ 1604 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) { 1605 mmc->has_init = 0; 1606 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1607 printf("MMC: no card present\n"); 1608 #endif 1609 return NO_CARD_ERR; 1610 } 1611 1612 if (mmc->has_init) 1613 return 0; 1614 1615 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT 1616 mmc_adapter_card_type_ident(); 1617 #endif 1618 board_mmc_power_init(); 1619 1620 /* made sure it's not NULL earlier */ 1621 err = mmc->cfg->ops->init(mmc); 1622 1623 if (err) 1624 return err; 1625 1626 mmc->ddr_mode = 0; 1627 mmc_set_bus_width(mmc, 1); 1628 mmc_set_clock(mmc, 1); 1629 1630 /* Reset the Card */ 1631 err = mmc_go_idle(mmc); 1632 1633 if (err) 1634 return err; 1635 1636 /* The internal partition reset to user partition(0) at every CMD0*/ 1637 mmc_get_blk_desc(mmc)->hwpart = 0; 1638 1639 /* Test for SD version 2 */ 1640 err = mmc_send_if_cond(mmc); 1641 1642 /* Now try to get the SD card's operating condition */ 1643 err = sd_send_op_cond(mmc); 1644 1645 /* If the command timed out, we check for an MMC card */ 1646 if (err == TIMEOUT) { 1647 err = mmc_send_op_cond(mmc); 1648 1649 if (err) { 1650 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1651 printf("Card did not respond to voltage select!\n"); 1652 #endif 1653 return UNUSABLE_ERR; 1654 } 1655 } 1656 1657 if (!err) 1658 mmc->init_in_progress = 1; 1659 1660 return err; 1661 } 1662 1663 static int mmc_complete_init(struct mmc *mmc) 1664 { 1665 int err = 0; 1666 1667 mmc->init_in_progress = 0; 1668 if (mmc->op_cond_pending) 1669 err = mmc_complete_op_cond(mmc); 1670 1671 if (!err) 1672 err = mmc_startup(mmc); 1673 if (err) 1674 mmc->has_init = 0; 1675 else 1676 mmc->has_init = 1; 1677 return err; 1678 } 1679 1680 int mmc_init(struct mmc *mmc) 1681 { 1682 int err = 0; 1683 unsigned start; 1684 1685 if (mmc->has_init) 1686 return 0; 1687 1688 start = get_timer(0); 1689 1690 if (!mmc->init_in_progress) 1691 err = mmc_start_init(mmc); 1692 1693 if (!err) 1694 err = mmc_complete_init(mmc); 1695 debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); 1696 return err; 1697 } 1698 1699 int mmc_set_dsr(struct mmc *mmc, u16 val) 1700 { 1701 mmc->dsr = val; 1702 return 0; 1703 } 1704 1705 /* CPU-specific MMC initializations */ 1706 __weak int cpu_mmc_init(bd_t *bis) 1707 { 1708 return -1; 1709 } 1710 1711 /* board-specific MMC initializations. */ 1712 __weak int board_mmc_init(bd_t *bis) 1713 { 1714 return -1; 1715 } 1716 1717 void mmc_set_preinit(struct mmc *mmc, int preinit) 1718 { 1719 mmc->preinit = preinit; 1720 } 1721 1722 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD) 1723 static int mmc_probe(bd_t *bis) 1724 { 1725 return 0; 1726 } 1727 #elif defined(CONFIG_DM_MMC) 1728 static int mmc_probe(bd_t *bis) 1729 { 1730 int ret, i; 1731 struct uclass *uc; 1732 struct udevice *dev; 1733 1734 ret = uclass_get(UCLASS_MMC, &uc); 1735 if (ret) 1736 return ret; 1737 1738 /* 1739 * Try to add them in sequence order. Really with driver model we 1740 * should allow holes, but the current MMC list does not allow that. 1741 * So if we request 0, 1, 3 we will get 0, 1, 2. 1742 */ 1743 for (i = 0; ; i++) { 1744 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev); 1745 if (ret == -ENODEV) 1746 break; 1747 } 1748 uclass_foreach_dev(dev, uc) { 1749 ret = device_probe(dev); 1750 if (ret) 1751 printf("%s - probe failed: %d\n", dev->name, ret); 1752 } 1753 1754 return 0; 1755 } 1756 #else 1757 static int mmc_probe(bd_t *bis) 1758 { 1759 if (board_mmc_init(bis) < 0) 1760 cpu_mmc_init(bis); 1761 1762 return 0; 1763 } 1764 #endif 1765 1766 int mmc_initialize(bd_t *bis) 1767 { 1768 static int initialized = 0; 1769 int ret; 1770 if (initialized) /* Avoid initializing mmc multiple times */ 1771 return 0; 1772 initialized = 1; 1773 1774 #ifndef CONFIG_BLK 1775 mmc_list_init(); 1776 #endif 1777 ret = mmc_probe(bis); 1778 if (ret) 1779 return ret; 1780 1781 #ifndef CONFIG_SPL_BUILD 1782 print_mmc_devices(','); 1783 #endif 1784 1785 mmc_do_preinit(); 1786 return 0; 1787 } 1788 1789 #ifdef CONFIG_SUPPORT_EMMC_BOOT 1790 /* 1791 * This function changes the size of boot partition and the size of rpmb 1792 * partition present on EMMC devices. 1793 * 1794 * Input Parameters: 1795 * struct *mmc: pointer for the mmc device strcuture 1796 * bootsize: size of boot partition 1797 * rpmbsize: size of rpmb partition 1798 * 1799 * Returns 0 on success. 1800 */ 1801 1802 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, 1803 unsigned long rpmbsize) 1804 { 1805 int err; 1806 struct mmc_cmd cmd; 1807 1808 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */ 1809 cmd.cmdidx = MMC_CMD_RES_MAN; 1810 cmd.resp_type = MMC_RSP_R1b; 1811 cmd.cmdarg = MMC_CMD62_ARG1; 1812 1813 err = mmc_send_cmd(mmc, &cmd, NULL); 1814 if (err) { 1815 debug("mmc_boot_partition_size_change: Error1 = %d\n", err); 1816 return err; 1817 } 1818 1819 /* Boot partition changing mode */ 1820 cmd.cmdidx = MMC_CMD_RES_MAN; 1821 cmd.resp_type = MMC_RSP_R1b; 1822 cmd.cmdarg = MMC_CMD62_ARG2; 1823 1824 err = mmc_send_cmd(mmc, &cmd, NULL); 1825 if (err) { 1826 debug("mmc_boot_partition_size_change: Error2 = %d\n", err); 1827 return err; 1828 } 1829 /* boot partition size is multiple of 128KB */ 1830 bootsize = (bootsize * 1024) / 128; 1831 1832 /* Arg: boot partition size */ 1833 cmd.cmdidx = MMC_CMD_RES_MAN; 1834 cmd.resp_type = MMC_RSP_R1b; 1835 cmd.cmdarg = bootsize; 1836 1837 err = mmc_send_cmd(mmc, &cmd, NULL); 1838 if (err) { 1839 debug("mmc_boot_partition_size_change: Error3 = %d\n", err); 1840 return err; 1841 } 1842 /* RPMB partition size is multiple of 128KB */ 1843 rpmbsize = (rpmbsize * 1024) / 128; 1844 /* Arg: RPMB partition size */ 1845 cmd.cmdidx = MMC_CMD_RES_MAN; 1846 cmd.resp_type = MMC_RSP_R1b; 1847 cmd.cmdarg = rpmbsize; 1848 1849 err = mmc_send_cmd(mmc, &cmd, NULL); 1850 if (err) { 1851 debug("mmc_boot_partition_size_change: Error4 = %d\n", err); 1852 return err; 1853 } 1854 return 0; 1855 } 1856 1857 /* 1858 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH 1859 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH 1860 * and BOOT_MODE. 1861 * 1862 * Returns 0 on success. 1863 */ 1864 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) 1865 { 1866 int err; 1867 1868 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, 1869 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | 1870 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | 1871 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); 1872 1873 if (err) 1874 return err; 1875 return 0; 1876 } 1877 1878 /* 1879 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG) 1880 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and 1881 * PARTITION_ACCESS. 1882 * 1883 * Returns 0 on success. 1884 */ 1885 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access) 1886 { 1887 int err; 1888 1889 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 1890 EXT_CSD_BOOT_ACK(ack) | 1891 EXT_CSD_BOOT_PART_NUM(part_num) | 1892 EXT_CSD_PARTITION_ACCESS(access)); 1893 1894 if (err) 1895 return err; 1896 return 0; 1897 } 1898 1899 /* 1900 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value 1901 * for enable. Note that this is a write-once field for non-zero values. 1902 * 1903 * Returns 0 on success. 1904 */ 1905 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable) 1906 { 1907 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION, 1908 enable); 1909 } 1910 #endif 1911 1912 U_BOOT_LEGACY_BLK(mmc) = { 1913 .if_typename = "mmc", 1914 .if_type = IF_TYPE_MMC, 1915 .max_devs = -1, 1916 .get_dev = mmc_get_dev, 1917 .select_hwpart = mmc_select_hwpartp, 1918 }; 1919