1 /* 2 * Copyright 2008, Freescale Semiconductor, Inc 3 * Andy Fleming 4 * 5 * Based vaguely on the Linux code 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <config.h> 11 #include <common.h> 12 #include <command.h> 13 #include <errno.h> 14 #include <mmc.h> 15 #include <part.h> 16 #include <malloc.h> 17 #include <linux/list.h> 18 #include <div64.h> 19 #include "mmc_private.h" 20 21 static struct list_head mmc_devices; 22 static int cur_dev_num = -1; 23 24 __weak int board_mmc_getwp(struct mmc *mmc) 25 { 26 return -1; 27 } 28 29 int mmc_getwp(struct mmc *mmc) 30 { 31 int wp; 32 33 wp = board_mmc_getwp(mmc); 34 35 if (wp < 0) { 36 if (mmc->cfg->ops->getwp) 37 wp = mmc->cfg->ops->getwp(mmc); 38 else 39 wp = 0; 40 } 41 42 return wp; 43 } 44 45 __weak int board_mmc_getcd(struct mmc *mmc) 46 { 47 return -1; 48 } 49 50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) 51 { 52 int ret; 53 54 #ifdef CONFIG_MMC_TRACE 55 int i; 56 u8 *ptr; 57 58 printf("CMD_SEND:%d\n", cmd->cmdidx); 59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); 60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 61 switch (cmd->resp_type) { 62 case MMC_RSP_NONE: 63 printf("\t\tMMC_RSP_NONE\n"); 64 break; 65 case MMC_RSP_R1: 66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", 67 cmd->response[0]); 68 break; 69 case MMC_RSP_R1b: 70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", 71 cmd->response[0]); 72 break; 73 case MMC_RSP_R2: 74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", 75 cmd->response[0]); 76 printf("\t\t \t\t 0x%08X \n", 77 cmd->response[1]); 78 printf("\t\t \t\t 0x%08X \n", 79 cmd->response[2]); 80 printf("\t\t \t\t 0x%08X \n", 81 cmd->response[3]); 82 printf("\n"); 83 printf("\t\t\t\t\tDUMPING DATA\n"); 84 for (i = 0; i < 4; i++) { 85 int j; 86 printf("\t\t\t\t\t%03d - ", i*4); 87 ptr = (u8 *)&cmd->response[i]; 88 ptr += 3; 89 for (j = 0; j < 4; j++) 90 printf("%02X ", *ptr--); 91 printf("\n"); 92 } 93 break; 94 case MMC_RSP_R3: 95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", 96 cmd->response[0]); 97 break; 98 default: 99 printf("\t\tERROR MMC rsp not supported\n"); 100 break; 101 } 102 #else 103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); 104 #endif 105 return ret; 106 } 107 108 int mmc_send_status(struct mmc *mmc, int timeout) 109 { 110 struct mmc_cmd cmd; 111 int err, retries = 5; 112 #ifdef CONFIG_MMC_TRACE 113 int status; 114 #endif 115 116 cmd.cmdidx = MMC_CMD_SEND_STATUS; 117 cmd.resp_type = MMC_RSP_R1; 118 if (!mmc_host_is_spi(mmc)) 119 cmd.cmdarg = mmc->rca << 16; 120 121 do { 122 err = mmc_send_cmd(mmc, &cmd, NULL); 123 if (!err) { 124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && 125 (cmd.response[0] & MMC_STATUS_CURR_STATE) != 126 MMC_STATE_PRG) 127 break; 128 else if (cmd.response[0] & MMC_STATUS_MASK) { 129 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 130 printf("Status Error: 0x%08X\n", 131 cmd.response[0]); 132 #endif 133 return COMM_ERR; 134 } 135 } else if (--retries < 0) 136 return err; 137 138 udelay(1000); 139 140 } while (timeout--); 141 142 #ifdef CONFIG_MMC_TRACE 143 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; 144 printf("CURR STATE:%d\n", status); 145 #endif 146 if (timeout <= 0) { 147 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 148 printf("Timeout waiting card ready\n"); 149 #endif 150 return TIMEOUT; 151 } 152 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR) 153 return SWITCH_ERR; 154 155 return 0; 156 } 157 158 int mmc_set_blocklen(struct mmc *mmc, int len) 159 { 160 struct mmc_cmd cmd; 161 162 if (mmc->ddr_mode) 163 return 0; 164 165 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; 166 cmd.resp_type = MMC_RSP_R1; 167 cmd.cmdarg = len; 168 169 return mmc_send_cmd(mmc, &cmd, NULL); 170 } 171 172 struct mmc *find_mmc_device(int dev_num) 173 { 174 struct mmc *m; 175 struct list_head *entry; 176 177 list_for_each(entry, &mmc_devices) { 178 m = list_entry(entry, struct mmc, link); 179 180 if (m->block_dev.dev == dev_num) 181 return m; 182 } 183 184 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 185 printf("MMC Device %d not found\n", dev_num); 186 #endif 187 188 return NULL; 189 } 190 191 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, 192 lbaint_t blkcnt) 193 { 194 struct mmc_cmd cmd; 195 struct mmc_data data; 196 197 if (blkcnt > 1) 198 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; 199 else 200 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; 201 202 if (mmc->high_capacity) 203 cmd.cmdarg = start; 204 else 205 cmd.cmdarg = start * mmc->read_bl_len; 206 207 cmd.resp_type = MMC_RSP_R1; 208 209 data.dest = dst; 210 data.blocks = blkcnt; 211 data.blocksize = mmc->read_bl_len; 212 data.flags = MMC_DATA_READ; 213 214 if (mmc_send_cmd(mmc, &cmd, &data)) 215 return 0; 216 217 if (blkcnt > 1) { 218 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; 219 cmd.cmdarg = 0; 220 cmd.resp_type = MMC_RSP_R1b; 221 if (mmc_send_cmd(mmc, &cmd, NULL)) { 222 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 223 printf("mmc fail to send stop cmd\n"); 224 #endif 225 return 0; 226 } 227 } 228 229 return blkcnt; 230 } 231 232 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst) 233 { 234 lbaint_t cur, blocks_todo = blkcnt; 235 236 if (blkcnt == 0) 237 return 0; 238 239 struct mmc *mmc = find_mmc_device(dev_num); 240 if (!mmc) 241 return 0; 242 243 if ((start + blkcnt) > mmc->block_dev.lba) { 244 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", 246 start + blkcnt, mmc->block_dev.lba); 247 #endif 248 return 0; 249 } 250 251 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) 252 return 0; 253 254 do { 255 cur = (blocks_todo > mmc->cfg->b_max) ? 256 mmc->cfg->b_max : blocks_todo; 257 if(mmc_read_blocks(mmc, dst, start, cur) != cur) 258 return 0; 259 blocks_todo -= cur; 260 start += cur; 261 dst += cur * mmc->read_bl_len; 262 } while (blocks_todo > 0); 263 264 return blkcnt; 265 } 266 267 static int mmc_go_idle(struct mmc *mmc) 268 { 269 struct mmc_cmd cmd; 270 int err; 271 272 udelay(1000); 273 274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; 275 cmd.cmdarg = 0; 276 cmd.resp_type = MMC_RSP_NONE; 277 278 err = mmc_send_cmd(mmc, &cmd, NULL); 279 280 if (err) 281 return err; 282 283 udelay(2000); 284 285 return 0; 286 } 287 288 static int sd_send_op_cond(struct mmc *mmc) 289 { 290 int timeout = 1000; 291 int err; 292 struct mmc_cmd cmd; 293 294 do { 295 cmd.cmdidx = MMC_CMD_APP_CMD; 296 cmd.resp_type = MMC_RSP_R1; 297 cmd.cmdarg = 0; 298 299 err = mmc_send_cmd(mmc, &cmd, NULL); 300 301 if (err) 302 return err; 303 304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; 305 cmd.resp_type = MMC_RSP_R3; 306 307 /* 308 * Most cards do not answer if some reserved bits 309 * in the ocr are set. However, Some controller 310 * can set bit 7 (reserved for low voltages), but 311 * how to manage low voltages SD card is not yet 312 * specified. 313 */ 314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : 315 (mmc->cfg->voltages & 0xff8000); 316 317 if (mmc->version == SD_VERSION_2) 318 cmd.cmdarg |= OCR_HCS; 319 320 err = mmc_send_cmd(mmc, &cmd, NULL); 321 322 if (err) 323 return err; 324 325 udelay(1000); 326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); 327 328 if (timeout <= 0) 329 return UNUSABLE_ERR; 330 331 if (mmc->version != SD_VERSION_2) 332 mmc->version = SD_VERSION_1_0; 333 334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 336 cmd.resp_type = MMC_RSP_R3; 337 cmd.cmdarg = 0; 338 339 err = mmc_send_cmd(mmc, &cmd, NULL); 340 341 if (err) 342 return err; 343 } 344 345 mmc->ocr = cmd.response[0]; 346 347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 348 mmc->rca = 0; 349 350 return 0; 351 } 352 353 /* We pass in the cmd since otherwise the init seems to fail */ 354 static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd, 355 int use_arg) 356 { 357 int err; 358 359 cmd->cmdidx = MMC_CMD_SEND_OP_COND; 360 cmd->resp_type = MMC_RSP_R3; 361 cmd->cmdarg = 0; 362 if (use_arg && !mmc_host_is_spi(mmc)) { 363 cmd->cmdarg = 364 (mmc->cfg->voltages & 365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) | 366 (mmc->op_cond_response & OCR_ACCESS_MODE); 367 368 if (mmc->cfg->host_caps & MMC_MODE_HC) 369 cmd->cmdarg |= OCR_HCS; 370 } 371 err = mmc_send_cmd(mmc, cmd, NULL); 372 if (err) 373 return err; 374 mmc->op_cond_response = cmd->response[0]; 375 return 0; 376 } 377 378 static int mmc_send_op_cond(struct mmc *mmc) 379 { 380 struct mmc_cmd cmd; 381 int err, i; 382 383 /* Some cards seem to need this */ 384 mmc_go_idle(mmc); 385 386 /* Asking to the card its capabilities */ 387 mmc->op_cond_pending = 1; 388 for (i = 0; i < 2; i++) { 389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0); 390 if (err) 391 return err; 392 393 /* exit if not busy (flag seems to be inverted) */ 394 if (mmc->op_cond_response & OCR_BUSY) 395 return 0; 396 } 397 return IN_PROGRESS; 398 } 399 400 static int mmc_complete_op_cond(struct mmc *mmc) 401 { 402 struct mmc_cmd cmd; 403 int timeout = 1000; 404 uint start; 405 int err; 406 407 mmc->op_cond_pending = 0; 408 start = get_timer(0); 409 do { 410 err = mmc_send_op_cond_iter(mmc, &cmd, 1); 411 if (err) 412 return err; 413 if (get_timer(start) > timeout) 414 return UNUSABLE_ERR; 415 udelay(100); 416 } while (!(mmc->op_cond_response & OCR_BUSY)); 417 418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ 419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR; 420 cmd.resp_type = MMC_RSP_R3; 421 cmd.cmdarg = 0; 422 423 err = mmc_send_cmd(mmc, &cmd, NULL); 424 425 if (err) 426 return err; 427 } 428 429 mmc->version = MMC_VERSION_UNKNOWN; 430 mmc->ocr = cmd.response[0]; 431 432 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); 433 mmc->rca = 1; 434 435 return 0; 436 } 437 438 439 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) 440 { 441 struct mmc_cmd cmd; 442 struct mmc_data data; 443 int err; 444 445 /* Get the Card Status Register */ 446 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; 447 cmd.resp_type = MMC_RSP_R1; 448 cmd.cmdarg = 0; 449 450 data.dest = (char *)ext_csd; 451 data.blocks = 1; 452 data.blocksize = MMC_MAX_BLOCK_LEN; 453 data.flags = MMC_DATA_READ; 454 455 err = mmc_send_cmd(mmc, &cmd, &data); 456 457 return err; 458 } 459 460 461 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) 462 { 463 struct mmc_cmd cmd; 464 int timeout = 1000; 465 int ret; 466 467 cmd.cmdidx = MMC_CMD_SWITCH; 468 cmd.resp_type = MMC_RSP_R1b; 469 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | 470 (index << 16) | 471 (value << 8); 472 473 ret = mmc_send_cmd(mmc, &cmd, NULL); 474 475 /* Waiting for the ready status */ 476 if (!ret) 477 ret = mmc_send_status(mmc, timeout); 478 479 return ret; 480 481 } 482 483 static int mmc_change_freq(struct mmc *mmc) 484 { 485 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 486 char cardtype; 487 int err; 488 489 mmc->card_caps = MMC_MODE_4BIT | MMC_MODE_8BIT; 490 491 if (mmc_host_is_spi(mmc)) 492 return 0; 493 494 /* Only version 4 supports high-speed */ 495 if (mmc->version < MMC_VERSION_4) 496 return 0; 497 498 err = mmc_send_ext_csd(mmc, ext_csd); 499 500 if (err) 501 return err; 502 503 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; 504 505 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); 506 507 if (err) 508 return err == SWITCH_ERR ? 0 : err; 509 510 /* Now check to see that it worked */ 511 err = mmc_send_ext_csd(mmc, ext_csd); 512 513 if (err) 514 return err; 515 516 /* No high-speed support */ 517 if (!ext_csd[EXT_CSD_HS_TIMING]) 518 return 0; 519 520 /* High Speed is set, there are two types: 52MHz and 26MHz */ 521 if (cardtype & EXT_CSD_CARD_TYPE_52) { 522 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) 523 mmc->card_caps |= MMC_MODE_DDR_52MHz; 524 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; 525 } else { 526 mmc->card_caps |= MMC_MODE_HS; 527 } 528 529 return 0; 530 } 531 532 static int mmc_set_capacity(struct mmc *mmc, int part_num) 533 { 534 switch (part_num) { 535 case 0: 536 mmc->capacity = mmc->capacity_user; 537 break; 538 case 1: 539 case 2: 540 mmc->capacity = mmc->capacity_boot; 541 break; 542 case 3: 543 mmc->capacity = mmc->capacity_rpmb; 544 break; 545 case 4: 546 case 5: 547 case 6: 548 case 7: 549 mmc->capacity = mmc->capacity_gp[part_num - 4]; 550 break; 551 default: 552 return -1; 553 } 554 555 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); 556 557 return 0; 558 } 559 560 int mmc_select_hwpart(int dev_num, int hwpart) 561 { 562 struct mmc *mmc = find_mmc_device(dev_num); 563 int ret; 564 565 if (!mmc) 566 return -ENODEV; 567 568 if (mmc->part_num == hwpart) 569 return 0; 570 571 if (mmc->part_config == MMCPART_NOAVAILABLE) { 572 printf("Card doesn't support part_switch\n"); 573 return -EMEDIUMTYPE; 574 } 575 576 ret = mmc_switch_part(dev_num, hwpart); 577 if (ret) 578 return ret; 579 580 mmc->part_num = hwpart; 581 582 return 0; 583 } 584 585 586 int mmc_switch_part(int dev_num, unsigned int part_num) 587 { 588 struct mmc *mmc = find_mmc_device(dev_num); 589 int ret; 590 591 if (!mmc) 592 return -1; 593 594 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 595 (mmc->part_config & ~PART_ACCESS_MASK) 596 | (part_num & PART_ACCESS_MASK)); 597 598 /* 599 * Set the capacity if the switch succeeded or was intended 600 * to return to representing the raw device. 601 */ 602 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) 603 ret = mmc_set_capacity(mmc, part_num); 604 605 return ret; 606 } 607 608 int mmc_getcd(struct mmc *mmc) 609 { 610 int cd; 611 612 cd = board_mmc_getcd(mmc); 613 614 if (cd < 0) { 615 if (mmc->cfg->ops->getcd) 616 cd = mmc->cfg->ops->getcd(mmc); 617 else 618 cd = 1; 619 } 620 621 return cd; 622 } 623 624 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) 625 { 626 struct mmc_cmd cmd; 627 struct mmc_data data; 628 629 /* Switch the frequency */ 630 cmd.cmdidx = SD_CMD_SWITCH_FUNC; 631 cmd.resp_type = MMC_RSP_R1; 632 cmd.cmdarg = (mode << 31) | 0xffffff; 633 cmd.cmdarg &= ~(0xf << (group * 4)); 634 cmd.cmdarg |= value << (group * 4); 635 636 data.dest = (char *)resp; 637 data.blocksize = 64; 638 data.blocks = 1; 639 data.flags = MMC_DATA_READ; 640 641 return mmc_send_cmd(mmc, &cmd, &data); 642 } 643 644 645 static int sd_change_freq(struct mmc *mmc) 646 { 647 int err; 648 struct mmc_cmd cmd; 649 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); 650 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); 651 struct mmc_data data; 652 int timeout; 653 654 mmc->card_caps = 0; 655 656 if (mmc_host_is_spi(mmc)) 657 return 0; 658 659 /* Read the SCR to find out if this card supports higher speeds */ 660 cmd.cmdidx = MMC_CMD_APP_CMD; 661 cmd.resp_type = MMC_RSP_R1; 662 cmd.cmdarg = mmc->rca << 16; 663 664 err = mmc_send_cmd(mmc, &cmd, NULL); 665 666 if (err) 667 return err; 668 669 cmd.cmdidx = SD_CMD_APP_SEND_SCR; 670 cmd.resp_type = MMC_RSP_R1; 671 cmd.cmdarg = 0; 672 673 timeout = 3; 674 675 retry_scr: 676 data.dest = (char *)scr; 677 data.blocksize = 8; 678 data.blocks = 1; 679 data.flags = MMC_DATA_READ; 680 681 err = mmc_send_cmd(mmc, &cmd, &data); 682 683 if (err) { 684 if (timeout--) 685 goto retry_scr; 686 687 return err; 688 } 689 690 mmc->scr[0] = __be32_to_cpu(scr[0]); 691 mmc->scr[1] = __be32_to_cpu(scr[1]); 692 693 switch ((mmc->scr[0] >> 24) & 0xf) { 694 case 0: 695 mmc->version = SD_VERSION_1_0; 696 break; 697 case 1: 698 mmc->version = SD_VERSION_1_10; 699 break; 700 case 2: 701 mmc->version = SD_VERSION_2; 702 if ((mmc->scr[0] >> 15) & 0x1) 703 mmc->version = SD_VERSION_3; 704 break; 705 default: 706 mmc->version = SD_VERSION_1_0; 707 break; 708 } 709 710 if (mmc->scr[0] & SD_DATA_4BIT) 711 mmc->card_caps |= MMC_MODE_4BIT; 712 713 /* Version 1.0 doesn't support switching */ 714 if (mmc->version == SD_VERSION_1_0) 715 return 0; 716 717 timeout = 4; 718 while (timeout--) { 719 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, 720 (u8 *)switch_status); 721 722 if (err) 723 return err; 724 725 /* The high-speed function is busy. Try again */ 726 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) 727 break; 728 } 729 730 /* If high-speed isn't supported, we return */ 731 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) 732 return 0; 733 734 /* 735 * If the host doesn't support SD_HIGHSPEED, do not switch card to 736 * HIGHSPEED mode even if the card support SD_HIGHSPPED. 737 * This can avoid furthur problem when the card runs in different 738 * mode between the host. 739 */ 740 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && 741 (mmc->cfg->host_caps & MMC_MODE_HS))) 742 return 0; 743 744 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); 745 746 if (err) 747 return err; 748 749 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) 750 mmc->card_caps |= MMC_MODE_HS; 751 752 return 0; 753 } 754 755 /* frequency bases */ 756 /* divided by 10 to be nice to platforms without floating point */ 757 static const int fbase[] = { 758 10000, 759 100000, 760 1000000, 761 10000000, 762 }; 763 764 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice 765 * to platforms without floating point. 766 */ 767 static const int multipliers[] = { 768 0, /* reserved */ 769 10, 770 12, 771 13, 772 15, 773 20, 774 25, 775 30, 776 35, 777 40, 778 45, 779 50, 780 55, 781 60, 782 70, 783 80, 784 }; 785 786 static void mmc_set_ios(struct mmc *mmc) 787 { 788 if (mmc->cfg->ops->set_ios) 789 mmc->cfg->ops->set_ios(mmc); 790 } 791 792 void mmc_set_clock(struct mmc *mmc, uint clock) 793 { 794 if (clock > mmc->cfg->f_max) 795 clock = mmc->cfg->f_max; 796 797 if (clock < mmc->cfg->f_min) 798 clock = mmc->cfg->f_min; 799 800 mmc->clock = clock; 801 802 mmc_set_ios(mmc); 803 } 804 805 static void mmc_set_bus_width(struct mmc *mmc, uint width) 806 { 807 mmc->bus_width = width; 808 809 mmc_set_ios(mmc); 810 } 811 812 static int mmc_startup(struct mmc *mmc) 813 { 814 int err, i; 815 uint mult, freq; 816 u64 cmult, csize, capacity; 817 struct mmc_cmd cmd; 818 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); 819 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); 820 int timeout = 1000; 821 bool has_parts = false; 822 823 #ifdef CONFIG_MMC_SPI_CRC_ON 824 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ 825 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; 826 cmd.resp_type = MMC_RSP_R1; 827 cmd.cmdarg = 1; 828 err = mmc_send_cmd(mmc, &cmd, NULL); 829 830 if (err) 831 return err; 832 } 833 #endif 834 835 /* Put the Card in Identify Mode */ 836 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : 837 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ 838 cmd.resp_type = MMC_RSP_R2; 839 cmd.cmdarg = 0; 840 841 err = mmc_send_cmd(mmc, &cmd, NULL); 842 843 if (err) 844 return err; 845 846 memcpy(mmc->cid, cmd.response, 16); 847 848 /* 849 * For MMC cards, set the Relative Address. 850 * For SD cards, get the Relatvie Address. 851 * This also puts the cards into Standby State 852 */ 853 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 854 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; 855 cmd.cmdarg = mmc->rca << 16; 856 cmd.resp_type = MMC_RSP_R6; 857 858 err = mmc_send_cmd(mmc, &cmd, NULL); 859 860 if (err) 861 return err; 862 863 if (IS_SD(mmc)) 864 mmc->rca = (cmd.response[0] >> 16) & 0xffff; 865 } 866 867 /* Get the Card-Specific Data */ 868 cmd.cmdidx = MMC_CMD_SEND_CSD; 869 cmd.resp_type = MMC_RSP_R2; 870 cmd.cmdarg = mmc->rca << 16; 871 872 err = mmc_send_cmd(mmc, &cmd, NULL); 873 874 /* Waiting for the ready status */ 875 mmc_send_status(mmc, timeout); 876 877 if (err) 878 return err; 879 880 mmc->csd[0] = cmd.response[0]; 881 mmc->csd[1] = cmd.response[1]; 882 mmc->csd[2] = cmd.response[2]; 883 mmc->csd[3] = cmd.response[3]; 884 885 if (mmc->version == MMC_VERSION_UNKNOWN) { 886 int version = (cmd.response[0] >> 26) & 0xf; 887 888 switch (version) { 889 case 0: 890 mmc->version = MMC_VERSION_1_2; 891 break; 892 case 1: 893 mmc->version = MMC_VERSION_1_4; 894 break; 895 case 2: 896 mmc->version = MMC_VERSION_2_2; 897 break; 898 case 3: 899 mmc->version = MMC_VERSION_3; 900 break; 901 case 4: 902 mmc->version = MMC_VERSION_4; 903 break; 904 default: 905 mmc->version = MMC_VERSION_1_2; 906 break; 907 } 908 } 909 910 /* divide frequency by 10, since the mults are 10x bigger */ 911 freq = fbase[(cmd.response[0] & 0x7)]; 912 mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; 913 914 mmc->tran_speed = freq * mult; 915 916 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); 917 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); 918 919 if (IS_SD(mmc)) 920 mmc->write_bl_len = mmc->read_bl_len; 921 else 922 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); 923 924 if (mmc->high_capacity) { 925 csize = (mmc->csd[1] & 0x3f) << 16 926 | (mmc->csd[2] & 0xffff0000) >> 16; 927 cmult = 8; 928 } else { 929 csize = (mmc->csd[1] & 0x3ff) << 2 930 | (mmc->csd[2] & 0xc0000000) >> 30; 931 cmult = (mmc->csd[2] & 0x00038000) >> 15; 932 } 933 934 mmc->capacity_user = (csize + 1) << (cmult + 2); 935 mmc->capacity_user *= mmc->read_bl_len; 936 mmc->capacity_boot = 0; 937 mmc->capacity_rpmb = 0; 938 for (i = 0; i < 4; i++) 939 mmc->capacity_gp[i] = 0; 940 941 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) 942 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 943 944 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) 945 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 946 947 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { 948 cmd.cmdidx = MMC_CMD_SET_DSR; 949 cmd.cmdarg = (mmc->dsr & 0xffff) << 16; 950 cmd.resp_type = MMC_RSP_NONE; 951 if (mmc_send_cmd(mmc, &cmd, NULL)) 952 printf("MMC: SET_DSR failed\n"); 953 } 954 955 /* Select the card, and put it into Transfer Mode */ 956 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ 957 cmd.cmdidx = MMC_CMD_SELECT_CARD; 958 cmd.resp_type = MMC_RSP_R1; 959 cmd.cmdarg = mmc->rca << 16; 960 err = mmc_send_cmd(mmc, &cmd, NULL); 961 962 if (err) 963 return err; 964 } 965 966 /* 967 * For SD, its erase group is always one sector 968 */ 969 mmc->erase_grp_size = 1; 970 mmc->part_config = MMCPART_NOAVAILABLE; 971 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { 972 /* check ext_csd version and capacity */ 973 err = mmc_send_ext_csd(mmc, ext_csd); 974 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) { 975 /* 976 * According to the JEDEC Standard, the value of 977 * ext_csd's capacity is valid if the value is more 978 * than 2GB 979 */ 980 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 981 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 982 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 983 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; 984 capacity *= MMC_MAX_BLOCK_LEN; 985 if ((capacity >> 20) > 2 * 1024) 986 mmc->capacity_user = capacity; 987 } 988 989 switch (ext_csd[EXT_CSD_REV]) { 990 case 1: 991 mmc->version = MMC_VERSION_4_1; 992 break; 993 case 2: 994 mmc->version = MMC_VERSION_4_2; 995 break; 996 case 3: 997 mmc->version = MMC_VERSION_4_3; 998 break; 999 case 5: 1000 mmc->version = MMC_VERSION_4_41; 1001 break; 1002 case 6: 1003 mmc->version = MMC_VERSION_4_5; 1004 break; 1005 case 7: 1006 mmc->version = MMC_VERSION_5_0; 1007 break; 1008 } 1009 1010 /* store the partition info of emmc */ 1011 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; 1012 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || 1013 ext_csd[EXT_CSD_BOOT_MULT]) 1014 mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; 1015 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT) 1016 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; 1017 1018 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; 1019 1020 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; 1021 1022 for (i = 0; i < 4; i++) { 1023 int idx = EXT_CSD_GP_SIZE_MULT + i * 3; 1024 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) + 1025 (ext_csd[idx + 1] << 8) + ext_csd[idx]; 1026 mmc->capacity_gp[i] *= 1027 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1028 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1029 mmc->capacity_gp[i] <<= 19; 1030 if (mmc->capacity_gp[i]) 1031 has_parts = true; 1032 } 1033 1034 mmc->enh_user_size = 1035 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) + 1036 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) + 1037 ext_csd[EXT_CSD_ENH_SIZE_MULT]; 1038 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; 1039 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; 1040 mmc->enh_user_size <<= 19; 1041 mmc->enh_user_start = 1042 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) + 1043 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) + 1044 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) + 1045 ext_csd[EXT_CSD_ENH_START_ADDR]; 1046 if (mmc->high_capacity) 1047 mmc->enh_user_start <<= 9; 1048 1049 /* 1050 * Host needs to enable ERASE_GRP_DEF bit if device is 1051 * partitioned. This bit will be lost every time after a reset 1052 * or power off. This will affect erase size. 1053 */ 1054 if (ext_csd[EXT_CSD_PARTITION_SETTING] & 1055 EXT_CSD_PARTITION_SETTING_COMPLETED) 1056 has_parts = true; 1057 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && 1058 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) 1059 has_parts = true; 1060 if (has_parts) { 1061 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1062 EXT_CSD_ERASE_GROUP_DEF, 1); 1063 1064 if (err) 1065 return err; 1066 else 1067 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; 1068 1069 /* Read out group size from ext_csd */ 1070 mmc->erase_grp_size = 1071 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; 1072 /* 1073 * if high capacity and partition setting completed 1074 * SEC_COUNT is valid even if it is smaller than 2 GiB 1075 * JEDEC Standard JESD84-B45, 6.2.4 1076 */ 1077 if (mmc->high_capacity && 1078 (ext_csd[EXT_CSD_PARTITION_SETTING] & 1079 EXT_CSD_PARTITION_SETTING_COMPLETED)) { 1080 capacity = (ext_csd[EXT_CSD_SEC_CNT]) | 1081 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | 1082 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | 1083 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); 1084 capacity *= MMC_MAX_BLOCK_LEN; 1085 mmc->capacity_user = capacity; 1086 } 1087 } else { 1088 /* Calculate the group size from the csd value. */ 1089 int erase_gsz, erase_gmul; 1090 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; 1091 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; 1092 mmc->erase_grp_size = (erase_gsz + 1) 1093 * (erase_gmul + 1); 1094 } 1095 } 1096 1097 err = mmc_set_capacity(mmc, mmc->part_num); 1098 if (err) 1099 return err; 1100 1101 if (IS_SD(mmc)) 1102 err = sd_change_freq(mmc); 1103 else 1104 err = mmc_change_freq(mmc); 1105 1106 if (err) 1107 return err; 1108 1109 /* Restrict card's capabilities by what the host can do */ 1110 mmc->card_caps &= mmc->cfg->host_caps; 1111 1112 if (IS_SD(mmc)) { 1113 if (mmc->card_caps & MMC_MODE_4BIT) { 1114 cmd.cmdidx = MMC_CMD_APP_CMD; 1115 cmd.resp_type = MMC_RSP_R1; 1116 cmd.cmdarg = mmc->rca << 16; 1117 1118 err = mmc_send_cmd(mmc, &cmd, NULL); 1119 if (err) 1120 return err; 1121 1122 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; 1123 cmd.resp_type = MMC_RSP_R1; 1124 cmd.cmdarg = 2; 1125 err = mmc_send_cmd(mmc, &cmd, NULL); 1126 if (err) 1127 return err; 1128 1129 mmc_set_bus_width(mmc, 4); 1130 } 1131 1132 if (mmc->card_caps & MMC_MODE_HS) 1133 mmc->tran_speed = 50000000; 1134 else 1135 mmc->tran_speed = 25000000; 1136 } else { 1137 int idx; 1138 1139 /* An array of possible bus widths in order of preference */ 1140 static unsigned ext_csd_bits[] = { 1141 EXT_CSD_DDR_BUS_WIDTH_8, 1142 EXT_CSD_DDR_BUS_WIDTH_4, 1143 EXT_CSD_BUS_WIDTH_8, 1144 EXT_CSD_BUS_WIDTH_4, 1145 EXT_CSD_BUS_WIDTH_1, 1146 }; 1147 1148 /* An array to map CSD bus widths to host cap bits */ 1149 static unsigned ext_to_hostcaps[] = { 1150 [EXT_CSD_DDR_BUS_WIDTH_4] = 1151 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT, 1152 [EXT_CSD_DDR_BUS_WIDTH_8] = 1153 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT, 1154 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, 1155 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, 1156 }; 1157 1158 /* An array to map chosen bus width to an integer */ 1159 static unsigned widths[] = { 1160 8, 4, 8, 4, 1, 1161 }; 1162 1163 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { 1164 unsigned int extw = ext_csd_bits[idx]; 1165 unsigned int caps = ext_to_hostcaps[extw]; 1166 1167 /* 1168 * Check to make sure the card and controller support 1169 * these capabilities 1170 */ 1171 if ((mmc->card_caps & caps) != caps) 1172 continue; 1173 1174 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, 1175 EXT_CSD_BUS_WIDTH, extw); 1176 1177 if (err) 1178 continue; 1179 1180 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0; 1181 mmc_set_bus_width(mmc, widths[idx]); 1182 1183 err = mmc_send_ext_csd(mmc, test_csd); 1184 1185 if (err) 1186 continue; 1187 1188 /* Only compare read only fields */ 1189 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] 1190 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && 1191 ext_csd[EXT_CSD_HC_WP_GRP_SIZE] 1192 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && 1193 ext_csd[EXT_CSD_REV] 1194 == test_csd[EXT_CSD_REV] && 1195 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] 1196 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && 1197 memcmp(&ext_csd[EXT_CSD_SEC_CNT], 1198 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) 1199 break; 1200 else 1201 err = SWITCH_ERR; 1202 } 1203 1204 if (err) 1205 return err; 1206 1207 if (mmc->card_caps & MMC_MODE_HS) { 1208 if (mmc->card_caps & MMC_MODE_HS_52MHz) 1209 mmc->tran_speed = 52000000; 1210 else 1211 mmc->tran_speed = 26000000; 1212 } 1213 } 1214 1215 mmc_set_clock(mmc, mmc->tran_speed); 1216 1217 /* Fix the block length for DDR mode */ 1218 if (mmc->ddr_mode) { 1219 mmc->read_bl_len = MMC_MAX_BLOCK_LEN; 1220 mmc->write_bl_len = MMC_MAX_BLOCK_LEN; 1221 } 1222 1223 /* fill in device description */ 1224 mmc->block_dev.lun = 0; 1225 mmc->block_dev.type = 0; 1226 mmc->block_dev.blksz = mmc->read_bl_len; 1227 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz); 1228 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); 1229 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1230 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x", 1231 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), 1232 (mmc->cid[3] >> 16) & 0xffff); 1233 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, 1234 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, 1235 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, 1236 (mmc->cid[2] >> 24) & 0xff); 1237 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, 1238 (mmc->cid[2] >> 16) & 0xf); 1239 #else 1240 mmc->block_dev.vendor[0] = 0; 1241 mmc->block_dev.product[0] = 0; 1242 mmc->block_dev.revision[0] = 0; 1243 #endif 1244 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) 1245 init_part(&mmc->block_dev); 1246 #endif 1247 1248 return 0; 1249 } 1250 1251 static int mmc_send_if_cond(struct mmc *mmc) 1252 { 1253 struct mmc_cmd cmd; 1254 int err; 1255 1256 cmd.cmdidx = SD_CMD_SEND_IF_COND; 1257 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ 1258 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; 1259 cmd.resp_type = MMC_RSP_R7; 1260 1261 err = mmc_send_cmd(mmc, &cmd, NULL); 1262 1263 if (err) 1264 return err; 1265 1266 if ((cmd.response[0] & 0xff) != 0xaa) 1267 return UNUSABLE_ERR; 1268 else 1269 mmc->version = SD_VERSION_2; 1270 1271 return 0; 1272 } 1273 1274 /* not used any more */ 1275 int __deprecated mmc_register(struct mmc *mmc) 1276 { 1277 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1278 printf("%s is deprecated! use mmc_create() instead.\n", __func__); 1279 #endif 1280 return -1; 1281 } 1282 1283 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) 1284 { 1285 struct mmc *mmc; 1286 1287 /* quick validation */ 1288 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL || 1289 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0) 1290 return NULL; 1291 1292 mmc = calloc(1, sizeof(*mmc)); 1293 if (mmc == NULL) 1294 return NULL; 1295 1296 mmc->cfg = cfg; 1297 mmc->priv = priv; 1298 1299 /* the following chunk was mmc_register() */ 1300 1301 /* Setup dsr related values */ 1302 mmc->dsr_imp = 0; 1303 mmc->dsr = 0xffffffff; 1304 /* Setup the universal parts of the block interface just once */ 1305 mmc->block_dev.if_type = IF_TYPE_MMC; 1306 mmc->block_dev.dev = cur_dev_num++; 1307 mmc->block_dev.removable = 1; 1308 mmc->block_dev.block_read = mmc_bread; 1309 mmc->block_dev.block_write = mmc_bwrite; 1310 mmc->block_dev.block_erase = mmc_berase; 1311 1312 /* setup initial part type */ 1313 mmc->block_dev.part_type = mmc->cfg->part_type; 1314 1315 INIT_LIST_HEAD(&mmc->link); 1316 1317 list_add_tail(&mmc->link, &mmc_devices); 1318 1319 return mmc; 1320 } 1321 1322 void mmc_destroy(struct mmc *mmc) 1323 { 1324 /* only freeing memory for now */ 1325 free(mmc); 1326 } 1327 1328 #ifdef CONFIG_PARTITIONS 1329 block_dev_desc_t *mmc_get_dev(int dev) 1330 { 1331 struct mmc *mmc = find_mmc_device(dev); 1332 if (!mmc || mmc_init(mmc)) 1333 return NULL; 1334 1335 return &mmc->block_dev; 1336 } 1337 #endif 1338 1339 /* board-specific MMC power initializations. */ 1340 __weak void board_mmc_power_init(void) 1341 { 1342 } 1343 1344 int mmc_start_init(struct mmc *mmc) 1345 { 1346 int err; 1347 1348 /* we pretend there's no card when init is NULL */ 1349 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) { 1350 mmc->has_init = 0; 1351 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1352 printf("MMC: no card present\n"); 1353 #endif 1354 return NO_CARD_ERR; 1355 } 1356 1357 if (mmc->has_init) 1358 return 0; 1359 1360 board_mmc_power_init(); 1361 1362 /* made sure it's not NULL earlier */ 1363 err = mmc->cfg->ops->init(mmc); 1364 1365 if (err) 1366 return err; 1367 1368 mmc->ddr_mode = 0; 1369 mmc_set_bus_width(mmc, 1); 1370 mmc_set_clock(mmc, 1); 1371 1372 /* Reset the Card */ 1373 err = mmc_go_idle(mmc); 1374 1375 if (err) 1376 return err; 1377 1378 /* The internal partition reset to user partition(0) at every CMD0*/ 1379 mmc->part_num = 0; 1380 1381 /* Test for SD version 2 */ 1382 err = mmc_send_if_cond(mmc); 1383 1384 /* Now try to get the SD card's operating condition */ 1385 err = sd_send_op_cond(mmc); 1386 1387 /* If the command timed out, we check for an MMC card */ 1388 if (err == TIMEOUT) { 1389 err = mmc_send_op_cond(mmc); 1390 1391 if (err && err != IN_PROGRESS) { 1392 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1393 printf("Card did not respond to voltage select!\n"); 1394 #endif 1395 return UNUSABLE_ERR; 1396 } 1397 } 1398 1399 if (err == IN_PROGRESS) 1400 mmc->init_in_progress = 1; 1401 1402 return err; 1403 } 1404 1405 static int mmc_complete_init(struct mmc *mmc) 1406 { 1407 int err = 0; 1408 1409 if (mmc->op_cond_pending) 1410 err = mmc_complete_op_cond(mmc); 1411 1412 if (!err) 1413 err = mmc_startup(mmc); 1414 if (err) 1415 mmc->has_init = 0; 1416 else 1417 mmc->has_init = 1; 1418 mmc->init_in_progress = 0; 1419 return err; 1420 } 1421 1422 int mmc_init(struct mmc *mmc) 1423 { 1424 int err = IN_PROGRESS; 1425 unsigned start; 1426 1427 if (mmc->has_init) 1428 return 0; 1429 1430 start = get_timer(0); 1431 1432 if (!mmc->init_in_progress) 1433 err = mmc_start_init(mmc); 1434 1435 if (!err || err == IN_PROGRESS) 1436 err = mmc_complete_init(mmc); 1437 debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); 1438 return err; 1439 } 1440 1441 int mmc_set_dsr(struct mmc *mmc, u16 val) 1442 { 1443 mmc->dsr = val; 1444 return 0; 1445 } 1446 1447 /* CPU-specific MMC initializations */ 1448 __weak int cpu_mmc_init(bd_t *bis) 1449 { 1450 return -1; 1451 } 1452 1453 /* board-specific MMC initializations. */ 1454 __weak int board_mmc_init(bd_t *bis) 1455 { 1456 return -1; 1457 } 1458 1459 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 1460 1461 void print_mmc_devices(char separator) 1462 { 1463 struct mmc *m; 1464 struct list_head *entry; 1465 1466 list_for_each(entry, &mmc_devices) { 1467 m = list_entry(entry, struct mmc, link); 1468 1469 printf("%s: %d", m->cfg->name, m->block_dev.dev); 1470 1471 if (entry->next != &mmc_devices) { 1472 printf("%c", separator); 1473 if (separator != '\n') 1474 puts (" "); 1475 } 1476 } 1477 1478 printf("\n"); 1479 } 1480 1481 #else 1482 void print_mmc_devices(char separator) { } 1483 #endif 1484 1485 int get_mmc_num(void) 1486 { 1487 return cur_dev_num; 1488 } 1489 1490 void mmc_set_preinit(struct mmc *mmc, int preinit) 1491 { 1492 mmc->preinit = preinit; 1493 } 1494 1495 static void do_preinit(void) 1496 { 1497 struct mmc *m; 1498 struct list_head *entry; 1499 1500 list_for_each(entry, &mmc_devices) { 1501 m = list_entry(entry, struct mmc, link); 1502 1503 if (m->preinit) 1504 mmc_start_init(m); 1505 } 1506 } 1507 1508 1509 int mmc_initialize(bd_t *bis) 1510 { 1511 INIT_LIST_HEAD (&mmc_devices); 1512 cur_dev_num = 0; 1513 1514 if (board_mmc_init(bis) < 0) 1515 cpu_mmc_init(bis); 1516 1517 #ifndef CONFIG_SPL_BUILD 1518 print_mmc_devices(','); 1519 #endif 1520 1521 do_preinit(); 1522 return 0; 1523 } 1524 1525 #ifdef CONFIG_SUPPORT_EMMC_BOOT 1526 /* 1527 * This function changes the size of boot partition and the size of rpmb 1528 * partition present on EMMC devices. 1529 * 1530 * Input Parameters: 1531 * struct *mmc: pointer for the mmc device strcuture 1532 * bootsize: size of boot partition 1533 * rpmbsize: size of rpmb partition 1534 * 1535 * Returns 0 on success. 1536 */ 1537 1538 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, 1539 unsigned long rpmbsize) 1540 { 1541 int err; 1542 struct mmc_cmd cmd; 1543 1544 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */ 1545 cmd.cmdidx = MMC_CMD_RES_MAN; 1546 cmd.resp_type = MMC_RSP_R1b; 1547 cmd.cmdarg = MMC_CMD62_ARG1; 1548 1549 err = mmc_send_cmd(mmc, &cmd, NULL); 1550 if (err) { 1551 debug("mmc_boot_partition_size_change: Error1 = %d\n", err); 1552 return err; 1553 } 1554 1555 /* Boot partition changing mode */ 1556 cmd.cmdidx = MMC_CMD_RES_MAN; 1557 cmd.resp_type = MMC_RSP_R1b; 1558 cmd.cmdarg = MMC_CMD62_ARG2; 1559 1560 err = mmc_send_cmd(mmc, &cmd, NULL); 1561 if (err) { 1562 debug("mmc_boot_partition_size_change: Error2 = %d\n", err); 1563 return err; 1564 } 1565 /* boot partition size is multiple of 128KB */ 1566 bootsize = (bootsize * 1024) / 128; 1567 1568 /* Arg: boot partition size */ 1569 cmd.cmdidx = MMC_CMD_RES_MAN; 1570 cmd.resp_type = MMC_RSP_R1b; 1571 cmd.cmdarg = bootsize; 1572 1573 err = mmc_send_cmd(mmc, &cmd, NULL); 1574 if (err) { 1575 debug("mmc_boot_partition_size_change: Error3 = %d\n", err); 1576 return err; 1577 } 1578 /* RPMB partition size is multiple of 128KB */ 1579 rpmbsize = (rpmbsize * 1024) / 128; 1580 /* Arg: RPMB partition size */ 1581 cmd.cmdidx = MMC_CMD_RES_MAN; 1582 cmd.resp_type = MMC_RSP_R1b; 1583 cmd.cmdarg = rpmbsize; 1584 1585 err = mmc_send_cmd(mmc, &cmd, NULL); 1586 if (err) { 1587 debug("mmc_boot_partition_size_change: Error4 = %d\n", err); 1588 return err; 1589 } 1590 return 0; 1591 } 1592 1593 /* 1594 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH 1595 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH 1596 * and BOOT_MODE. 1597 * 1598 * Returns 0 on success. 1599 */ 1600 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) 1601 { 1602 int err; 1603 1604 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, 1605 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | 1606 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | 1607 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); 1608 1609 if (err) 1610 return err; 1611 return 0; 1612 } 1613 1614 /* 1615 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG) 1616 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and 1617 * PARTITION_ACCESS. 1618 * 1619 * Returns 0 on success. 1620 */ 1621 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access) 1622 { 1623 int err; 1624 1625 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, 1626 EXT_CSD_BOOT_ACK(ack) | 1627 EXT_CSD_BOOT_PART_NUM(part_num) | 1628 EXT_CSD_PARTITION_ACCESS(access)); 1629 1630 if (err) 1631 return err; 1632 return 0; 1633 } 1634 1635 /* 1636 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value 1637 * for enable. Note that this is a write-once field for non-zero values. 1638 * 1639 * Returns 0 on success. 1640 */ 1641 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable) 1642 { 1643 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION, 1644 enable); 1645 } 1646 #endif 1647