1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd 4 */ 5 #include <common.h> 6 #include <asm/io.h> 7 #include <dm.h> 8 #include <linux/bitops.h> 9 #include <misc.h> 10 #include <irq-generic.h> 11 12 DECLARE_GLOBAL_DATA_PTR; 13 14 #define DECOM_CTRL 0x0 15 #define DECOM_ENR 0x4 16 #define DECOM_RADDR 0x8 17 #define DECOM_WADDR 0xc 18 #define DECOM_UDDSL 0x10 19 #define DECOM_UDDSH 0x14 20 #define DECOM_TXTHR 0x18 21 #define DECOM_RXTHR 0x1c 22 #define DECOM_SLEN 0x20 23 #define DECOM_STAT 0x24 24 #define DECOM_ISR 0x28 25 #define DECOM_IEN 0x2c 26 #define DECOM_AXI_STAT 0x30 27 #define DECOM_TSIZEL 0x34 28 #define DECOM_TSIZEH 0x38 29 #define DECOM_MGNUM 0x3c 30 #define DECOM_FRAME 0x40 31 #define DECOM_DICTID 0x44 32 #define DECOM_CSL 0x48 33 #define DECOM_CSH 0x4c 34 #define DECOM_LMTSL 0x50 35 #define DECOM_LMTSH 0x54 36 37 #define LZ4_HEAD_CSUM_CHECK_EN BIT(1) 38 #define LZ4_BLOCK_CSUM_CHECK_EN BIT(2) 39 #define LZ4_CONT_CSUM_CHECK_EN BIT(3) 40 41 #define DSOLIEN BIT(19) 42 #define ZDICTEIEN BIT(18) 43 #define GCMEIEN BIT(17) 44 #define GIDEIEN BIT(16) 45 #define CCCEIEN BIT(15) 46 #define BCCEIEN BIT(14) 47 #define HCCEIEN BIT(13) 48 #define CSEIEN BIT(12) 49 #define DICTEIEN BIT(11) 50 #define VNEIEN BIT(10) 51 #define WNEIEN BIT(9) 52 #define RDCEIEN BIT(8) 53 #define WRCEIEN BIT(7) 54 #define DISEIEN BIT(6) 55 #define LENEIEN BIT(5) 56 #define LITEIEN BIT(4) 57 #define SQMEIEN BIT(3) 58 #define SLCIEN BIT(2) 59 #define HDEIEN BIT(1) 60 #define DSIEN BIT(0) 61 62 #define DECOM_STOP BIT(0) 63 #define DECOM_COMPLETE BIT(0) 64 #define DECOM_GZIP_MODE BIT(4) 65 #define DECOM_ZLIB_MODE BIT(5) 66 #define DECOM_DEFLATE_MODE BIT(0) 67 #define DECOM_AXI_IDLE BIT(4) 68 #define DECOM_LZ4_MODE 0 69 70 #define DECOM_ENABLE 0x1 71 #define DECOM_DISABLE 0x0 72 73 #define DECOM_IRQ 0xffff /* fixme */ 74 75 #define DECOM_INT_MASK \ 76 (DSOLIEN | ZDICTEIEN | GCMEIEN | GIDEIEN | \ 77 CCCEIEN | BCCEIEN | HCCEIEN | CSEIEN | \ 78 DICTEIEN | VNEIEN | WNEIEN | RDCEIEN | WRCEIEN | \ 79 DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \ 80 HDEIEN | DSIEN) 81 82 struct rockchip_decom_priv { 83 void __iomem *base; 84 unsigned long soft_reset_base; 85 bool idle_check_once; 86 bool done; 87 }; 88 89 static int rockchip_decom_start(struct udevice *dev, void *buf) 90 { 91 struct rockchip_decom_priv *priv = dev_get_priv(dev); 92 struct decom_param *param = (struct decom_param *)buf; 93 unsigned int limit_lo = param->size & 0xffffffff; 94 unsigned int limit_hi = param->size >> 32; 95 96 priv->done = false; 97 98 writel(0x00800080, priv->soft_reset_base); 99 writel(0x00800000, priv->soft_reset_base); 100 101 if (param->mode == DECOM_LZ4) 102 writel(LZ4_CONT_CSUM_CHECK_EN | 103 LZ4_HEAD_CSUM_CHECK_EN | 104 LZ4_BLOCK_CSUM_CHECK_EN | 105 DECOM_LZ4_MODE, priv->base + DECOM_CTRL); 106 107 if (param->mode == DECOM_GZIP) 108 writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE, 109 priv->base + DECOM_CTRL); 110 111 if (param->mode == DECOM_ZLIB) 112 writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE, 113 priv->base + DECOM_CTRL); 114 115 writel(param->addr_src, priv->base + DECOM_RADDR); 116 writel(param->addr_dst, priv->base + DECOM_WADDR); 117 118 writel(limit_lo, priv->base + DECOM_LMTSL); 119 writel(limit_hi, priv->base + DECOM_LMTSH); 120 121 writel(DECOM_INT_MASK, priv->base + DECOM_IEN); 122 writel(DECOM_ENABLE, priv->base + DECOM_ENR); 123 priv->idle_check_once = true; 124 125 return 0; 126 } 127 128 static int rockchip_decom_stop(struct udevice *dev) 129 { 130 struct rockchip_decom_priv *priv = dev_get_priv(dev); 131 int irq_status; 132 133 irq_status = readl(priv->base + DECOM_ISR); 134 /* clear interrupts */ 135 if (irq_status) 136 writel(irq_status, priv->base + DECOM_ISR); 137 138 writel(DECOM_DISABLE, priv->base + DECOM_ENR); 139 140 return 0; 141 } 142 143 /* Caller must call this function to check if decompress done */ 144 static int rockchip_decom_done_poll(struct udevice *dev) 145 { 146 struct rockchip_decom_priv *priv = dev_get_priv(dev); 147 148 /* 149 * Test the decom is idle first time. 150 */ 151 if (!priv->idle_check_once) 152 return !(readl(priv->base + DECOM_AXI_STAT) & DECOM_AXI_IDLE); 153 154 return !(readl(priv->base + DECOM_STAT) & DECOM_COMPLETE); 155 } 156 157 static int rockchip_decom_capability(u32 *buf) 158 { 159 *buf = DECOM_GZIP; 160 161 return 0; 162 } 163 164 /* Caller must fill in param @buf which represent struct decom_param */ 165 static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request, 166 void *buf) 167 { 168 int ret = -EINVAL; 169 170 switch (request) { 171 case IOCTL_REQ_START: 172 ret = rockchip_decom_start(dev, buf); 173 break; 174 case IOCTL_REQ_POLL: 175 ret = rockchip_decom_done_poll(dev); 176 break; 177 case IOCTL_REQ_STOP: 178 ret = rockchip_decom_stop(dev); 179 break; 180 case IOCTL_REQ_CAPABILITY: 181 ret = rockchip_decom_capability(buf); 182 break; 183 } 184 185 return ret; 186 } 187 188 static const struct misc_ops rockchip_decom_ops = { 189 .ioctl = rockchip_decom_ioctl, 190 }; 191 192 static int rockchip_decom_ofdata_to_platdata(struct udevice *dev) 193 { 194 struct rockchip_decom_priv *priv = dev_get_priv(dev); 195 196 priv->base = dev_read_addr_ptr(dev); 197 if (!priv->base) 198 return -ENOENT; 199 200 priv->soft_reset_base = dev_read_u32_default(dev, "soft-reset-addr", 0) 201 & 0xffffffff; 202 203 return 0; 204 } 205 206 #ifndef CONFIG_SPL_BUILD 207 static void rockchip_decom_irqhandler(int irq, void *data) 208 { 209 struct udevice *dev = data; 210 struct rockchip_decom_priv *priv = dev_get_priv(dev); 211 int irq_status; 212 int decom_status; 213 214 irq_status = readl(priv->base + DECOM_ISR); 215 /* clear interrupts */ 216 writel(irq_status, priv->base + DECOM_ISR); 217 if (irq_status & DECOM_STOP) { 218 decom_status = readl(priv->base + DECOM_STAT); 219 if (decom_status & DECOM_COMPLETE) { 220 priv->done = true; 221 /* 222 * TODO: 223 * Inform someone that decompress completed 224 */ 225 printf("decom completed\n"); 226 } else { 227 printf("decom failed, irq_status = 0x%x, decom_status = 0x%x\n", 228 irq_status, decom_status); 229 } 230 } 231 } 232 #endif 233 234 static int rockchip_decom_probe(struct udevice *dev) 235 { 236 #ifndef CONFIG_SPL_BUILD 237 irq_install_handler(DECOM_IRQ, rockchip_decom_irqhandler, dev); 238 irq_handler_enable(DECOM_IRQ); 239 #endif 240 return 0; 241 } 242 243 static const struct udevice_id rockchip_decom_ids[] = { 244 { .compatible = "rockchip,hw-decompress" }, 245 {} 246 }; 247 248 U_BOOT_DRIVER(rockchip_hw_decompress) = { 249 .name = "rockchip_hw_decompress", 250 .id = UCLASS_MISC, 251 .of_match = rockchip_decom_ids, 252 .probe = rockchip_decom_probe, 253 .ofdata_to_platdata = rockchip_decom_ofdata_to_platdata, 254 .priv_auto_alloc_size = sizeof(struct rockchip_decom_priv), 255 .ops = &rockchip_decom_ops, 256 }; 257