1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd 4 */ 5 #include <common.h> 6 #include <asm/io.h> 7 #include <dm.h> 8 #include <linux/bitops.h> 9 #include <misc.h> 10 #include <irq-generic.h> 11 12 DECLARE_GLOBAL_DATA_PTR; 13 14 #define DECOM_CTRL 0x0 15 #define DECOM_ENR 0x4 16 #define DECOM_RADDR 0x8 17 #define DECOM_WADDR 0xc 18 #define DECOM_UDDSL 0x10 19 #define DECOM_UDDSH 0x14 20 #define DECOM_TXTHR 0x18 21 #define DECOM_RXTHR 0x1c 22 #define DECOM_SLEN 0x20 23 #define DECOM_STAT 0x24 24 #define DECOM_ISR 0x28 25 #define DECOM_IEN 0x2c 26 #define DECOM_AXI_STAT 0x30 27 #define DECOM_TSIZEL 0x34 28 #define DECOM_TSIZEH 0x38 29 #define DECOM_MGNUM 0x3c 30 #define DECOM_FRAME 0x40 31 #define DECOM_DICTID 0x44 32 #define DECOM_CSL 0x48 33 #define DECOM_CSH 0x4c 34 #define DECOM_LMTSL 0x50 35 #define DECOM_LMTSH 0x54 36 37 #define LZ4_HEAD_CSUM_CHECK_EN BIT(1) 38 #define LZ4_BLOCK_CSUM_CHECK_EN BIT(2) 39 #define LZ4_CONT_CSUM_CHECK_EN BIT(3) 40 41 #define DSOLIEN BIT(19) 42 #define ZDICTEIEN BIT(18) 43 #define GCMEIEN BIT(17) 44 #define GIDEIEN BIT(16) 45 #define CCCEIEN BIT(15) 46 #define BCCEIEN BIT(14) 47 #define HCCEIEN BIT(13) 48 #define CSEIEN BIT(12) 49 #define DICTEIEN BIT(11) 50 #define VNEIEN BIT(10) 51 #define WNEIEN BIT(9) 52 #define RDCEIEN BIT(8) 53 #define WRCEIEN BIT(7) 54 #define DISEIEN BIT(6) 55 #define LENEIEN BIT(5) 56 #define LITEIEN BIT(4) 57 #define SQMEIEN BIT(3) 58 #define SLCIEN BIT(2) 59 #define HDEIEN BIT(1) 60 #define DSIEN BIT(0) 61 62 #define DECOM_STOP BIT(0) 63 #define DECOM_COMPLETE BIT(0) 64 #define DECOM_GZIP_MODE BIT(4) 65 #define DECOM_ZLIB_MODE BIT(5) 66 #define DECOM_DEFLATE_MODE BIT(0) 67 #define DECOM_LZ4_MODE 0 68 69 #define DECOM_ENABLE 0x1 70 #define DECOM_DISABLE 0x0 71 72 #define DECOM_IRQ 0xffff /* fixme */ 73 74 #define DECOM_INT_MASK \ 75 (DSOLIEN | ZDICTEIEN | GCMEIEN | GIDEIEN | \ 76 CCCEIEN | BCCEIEN | HCCEIEN | CSEIEN | \ 77 DICTEIEN | VNEIEN | WNEIEN | RDCEIEN | WRCEIEN | \ 78 DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \ 79 HDEIEN | DSIEN) 80 81 struct rockchip_decom_priv { 82 void __iomem *base; 83 unsigned long soft_reset_base; 84 bool done; 85 }; 86 87 static int rockchip_decom_start(struct udevice *dev, void *buf) 88 { 89 struct rockchip_decom_priv *priv = dev_get_priv(dev); 90 struct decom_param *param = (struct decom_param *)buf; 91 unsigned long limit_lo = param->size & 0xffffffff; 92 unsigned long limit_hi = param->size >> 32; 93 94 priv->done = false; 95 96 writel(0x00800080, priv->soft_reset_base); 97 writel(0x00800000, priv->soft_reset_base); 98 99 if (param->mode == DECOM_LZ4) 100 writel(LZ4_CONT_CSUM_CHECK_EN | 101 LZ4_HEAD_CSUM_CHECK_EN | 102 LZ4_BLOCK_CSUM_CHECK_EN | 103 DECOM_LZ4_MODE, priv->base + DECOM_CTRL); 104 105 if (param->mode == DECOM_GZIP) 106 writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE, 107 priv->base + DECOM_CTRL); 108 109 if (param->mode == DECOM_ZLIB) 110 writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE, 111 priv->base + DECOM_CTRL); 112 113 writel(param->addr_src, priv->base + DECOM_RADDR); 114 writel(param->addr_dst, priv->base + DECOM_WADDR); 115 116 writel(limit_lo, priv->base + DECOM_LMTSL); 117 writel(limit_hi, priv->base + DECOM_LMTSH); 118 119 writel(DECOM_INT_MASK, priv->base + DECOM_IEN); 120 writel(DECOM_ENABLE, priv->base + DECOM_ENR); 121 122 return 0; 123 } 124 125 static int rockchip_decom_stop(struct udevice *dev) 126 { 127 struct rockchip_decom_priv *priv = dev_get_priv(dev); 128 int irq_status; 129 130 irq_status = readl(priv->base + DECOM_ISR); 131 /* clear interrupts */ 132 if (irq_status) 133 writel(irq_status, priv->base + DECOM_ISR); 134 135 writel(DECOM_DISABLE, priv->base + DECOM_ENR); 136 137 return 0; 138 } 139 140 /* Caller must call this function to check if decompress done */ 141 static int rockchip_decom_done_poll(struct udevice *dev) 142 { 143 struct rockchip_decom_priv *priv = dev_get_priv(dev); 144 int decom_status; 145 146 decom_status = readl(priv->base + DECOM_STAT); 147 if (decom_status & DECOM_COMPLETE) 148 return 0; 149 150 return -EINVAL; 151 } 152 153 static int rockchip_decom_capability(u32 *buf) 154 { 155 *buf = DECOM_GZIP; 156 157 return 0; 158 } 159 160 /* Caller must fill in param @buf which represent struct decom_param */ 161 static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request, 162 void *buf) 163 { 164 int ret = -EINVAL; 165 166 switch (request) { 167 case IOCTL_REQ_START: 168 ret = rockchip_decom_start(dev, buf); 169 break; 170 case IOCTL_REQ_POLL: 171 ret = rockchip_decom_done_poll(dev); 172 break; 173 case IOCTL_REQ_STOP: 174 ret = rockchip_decom_stop(dev); 175 break; 176 case IOCTL_REQ_CAPABILITY: 177 ret = rockchip_decom_capability(buf); 178 } 179 180 return ret; 181 } 182 183 static const struct misc_ops rockchip_decom_ops = { 184 .ioctl = rockchip_decom_ioctl, 185 }; 186 187 static int rockchip_decom_ofdata_to_platdata(struct udevice *dev) 188 { 189 struct rockchip_decom_priv *priv = dev_get_priv(dev); 190 191 priv->base = dev_read_addr_ptr(dev); 192 if (!priv->base) 193 return -ENOENT; 194 195 priv->soft_reset_base = dev_read_u32_default(dev, "soft-reset-addr", 0) 196 & 0xffffffff; 197 198 return 0; 199 } 200 201 #ifndef CONFIG_SPL_BUILD 202 static void rockchip_decom_irqhandler(int irq, void *data) 203 { 204 struct udevice *dev = data; 205 struct rockchip_decom_priv *priv = dev_get_priv(dev); 206 int irq_status; 207 int decom_status; 208 209 irq_status = readl(priv->base + DECOM_ISR); 210 /* clear interrupts */ 211 writel(irq_status, priv->base + DECOM_ISR); 212 if (irq_status & DECOM_STOP) { 213 decom_status = readl(priv->base + DECOM_STAT); 214 if (decom_status & DECOM_COMPLETE) { 215 priv->done = true; 216 /* 217 * TODO: 218 * Inform someone that decompress completed 219 */ 220 printf("decom completed\n"); 221 } else { 222 printf("decom failed, irq_status = 0x%x, decom_status = 0x%x\n", 223 irq_status, decom_status); 224 } 225 } 226 } 227 #endif 228 229 static int rockchip_decom_probe(struct udevice *dev) 230 { 231 #ifndef CONFIG_SPL_BUILD 232 irq_install_handler(DECOM_IRQ, rockchip_decom_irqhandler, dev); 233 irq_handler_enable(DECOM_IRQ); 234 #endif 235 return 0; 236 } 237 238 static const struct udevice_id rockchip_decom_ids[] = { 239 { .compatible = "rockchip,hw-decompress" }, 240 {} 241 }; 242 243 U_BOOT_DRIVER(rockchip_hw_decompress) = { 244 .name = "rockchip_hw_decompress", 245 .id = UCLASS_MISC, 246 .of_match = rockchip_decom_ids, 247 .probe = rockchip_decom_probe, 248 .ofdata_to_platdata = rockchip_decom_ofdata_to_platdata, 249 .priv_auto_alloc_size = sizeof(struct rockchip_decom_priv), 250 .ops = &rockchip_decom_ops, 251 }; 252