1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd 4 */ 5 #include <common.h> 6 #include <asm/io.h> 7 #include <dm.h> 8 #include <linux/bitops.h> 9 #include <misc.h> 10 #include <irq-generic.h> 11 12 DECLARE_GLOBAL_DATA_PTR; 13 14 #define DECOM_CTRL 0x0 15 #define DECOM_ENR 0x4 16 #define DECOM_RADDR 0x8 17 #define DECOM_WADDR 0xc 18 #define DECOM_UDDSL 0x10 19 #define DECOM_UDDSH 0x14 20 #define DECOM_TXTHR 0x18 21 #define DECOM_RXTHR 0x1c 22 #define DECOM_SLEN 0x20 23 #define DECOM_STAT 0x24 24 #define DECOM_ISR 0x28 25 #define DECOM_IEN 0x2c 26 #define DECOM_AXI_STAT 0x30 27 #define DECOM_TSIZEL 0x34 28 #define DECOM_TSIZEH 0x38 29 #define DECOM_MGNUM 0x3c 30 #define DECOM_FRAME 0x40 31 #define DECOM_DICTID 0x44 32 #define DECOM_CSL 0x48 33 #define DECOM_CSH 0x4c 34 #define DECOM_LMTSL 0x50 35 #define DECOM_LMTSH 0x54 36 37 #define LZ4_HEAD_CSUM_CHECK_EN BIT(1) 38 #define LZ4_BLOCK_CSUM_CHECK_EN BIT(2) 39 #define LZ4_CONT_CSUM_CHECK_EN BIT(3) 40 41 #define DSOLIEN BIT(19) 42 #define ZDICTEIEN BIT(18) 43 #define GCMEIEN BIT(17) 44 #define GIDEIEN BIT(16) 45 #define CCCEIEN BIT(15) 46 #define BCCEIEN BIT(14) 47 #define HCCEIEN BIT(13) 48 #define CSEIEN BIT(12) 49 #define DICTEIEN BIT(11) 50 #define VNEIEN BIT(10) 51 #define WNEIEN BIT(9) 52 #define RDCEIEN BIT(8) 53 #define WRCEIEN BIT(7) 54 #define DISEIEN BIT(6) 55 #define LENEIEN BIT(5) 56 #define LITEIEN BIT(4) 57 #define SQMEIEN BIT(3) 58 #define SLCIEN BIT(2) 59 #define HDEIEN BIT(1) 60 #define DSIEN BIT(0) 61 62 #define DECOM_STOP BIT(0) 63 #define DECOM_COMPLETE BIT(0) 64 #define DECOM_GZIP_MODE BIT(4) 65 #define DECOM_ZLIB_MODE BIT(5) 66 #define DECOM_DEFLATE_MODE BIT(0) 67 #define DECOM_AXI_IDLE BIT(4) 68 #define DECOM_LZ4_MODE 0 69 70 #define DECOM_ENABLE 0x1 71 #define DECOM_DISABLE 0x0 72 73 #define DECOM_IRQ 0xffff /* fixme */ 74 75 #define DECOM_INT_MASK \ 76 (DSOLIEN | ZDICTEIEN | GCMEIEN | GIDEIEN | \ 77 CCCEIEN | BCCEIEN | HCCEIEN | CSEIEN | \ 78 DICTEIEN | VNEIEN | WNEIEN | RDCEIEN | WRCEIEN | \ 79 DISEIEN | LENEIEN | LITEIEN | SQMEIEN | SLCIEN | \ 80 HDEIEN | DSIEN) 81 82 struct rockchip_decom_priv { 83 void __iomem *base; 84 unsigned long soft_reset_base; 85 bool idle_check_once; 86 bool done; 87 int cached; /* 1: access the data through dcache; 0: no dcache */ 88 }; 89 90 static int rockchip_decom_start(struct udevice *dev, void *buf) 91 { 92 struct rockchip_decom_priv *priv = dev_get_priv(dev); 93 struct decom_param *param = (struct decom_param *)buf; 94 unsigned int limit_lo = param->size_src & 0xffffffff; 95 unsigned int limit_hi = param->size_src >> 32; 96 ulong align_input, align_len; 97 98 if (!priv->cached) { 99 /* src: make sure we get the real compressed data from ddr */ 100 align_input = 101 round_down(param->addr_src, CONFIG_SYS_CACHELINE_SIZE); 102 align_len = 103 round_up(param->size_src + (param->addr_src - align_input), 104 CONFIG_SYS_CACHELINE_SIZE); 105 flush_cache(align_input, align_len); 106 107 /* 108 * dst: actually we prefer to invalidate dcache after decompress 109 * done, but it seems there is not cache invalidate API for us. 110 * so let's flush this area. 111 */ 112 align_input = 113 round_down(param->addr_dst, CONFIG_SYS_CACHELINE_SIZE); 114 align_len = 115 round_up(param->size_src + (param->addr_dst - align_input), 116 CONFIG_SYS_CACHELINE_SIZE); 117 flush_cache(align_input, align_len); 118 } 119 120 priv->done = false; 121 122 writel(0x00800080, priv->soft_reset_base); 123 writel(0x00800000, priv->soft_reset_base); 124 125 if (param->mode == DECOM_LZ4) 126 writel(LZ4_CONT_CSUM_CHECK_EN | 127 LZ4_HEAD_CSUM_CHECK_EN | 128 LZ4_BLOCK_CSUM_CHECK_EN | 129 DECOM_LZ4_MODE, 130 priv->base + DECOM_CTRL); 131 else if (param->mode == DECOM_GZIP) 132 writel(DECOM_DEFLATE_MODE | DECOM_GZIP_MODE, 133 priv->base + DECOM_CTRL); 134 else if (param->mode == DECOM_ZLIB) 135 writel(DECOM_DEFLATE_MODE | DECOM_ZLIB_MODE, 136 priv->base + DECOM_CTRL); 137 138 writel(param->addr_src, priv->base + DECOM_RADDR); 139 writel(param->addr_dst, priv->base + DECOM_WADDR); 140 141 writel(limit_lo, priv->base + DECOM_LMTSL); 142 writel(limit_hi, priv->base + DECOM_LMTSH); 143 writel(DECOM_ENABLE, priv->base + DECOM_ENR); 144 145 priv->idle_check_once = true; 146 147 return 0; 148 } 149 150 static int rockchip_decom_stop(struct udevice *dev) 151 { 152 struct rockchip_decom_priv *priv = dev_get_priv(dev); 153 154 writel(DECOM_DISABLE, priv->base + DECOM_ENR); 155 156 return 0; 157 } 158 159 /* Caller must call this function to check if decompress done */ 160 static int rockchip_decom_done_poll(struct udevice *dev) 161 { 162 struct rockchip_decom_priv *priv = dev_get_priv(dev); 163 164 /* 165 * Test the decom is idle first time. 166 */ 167 if (!priv->idle_check_once) 168 return !(readl(priv->base + DECOM_AXI_STAT) & DECOM_AXI_IDLE); 169 170 return !(readl(priv->base + DECOM_STAT) & DECOM_COMPLETE); 171 } 172 173 static int rockchip_decom_capability(u32 *buf) 174 { 175 *buf = DECOM_GZIP; 176 177 return 0; 178 } 179 180 static int rockchip_decom_data_size(struct udevice *dev, u64 *buf) 181 { 182 struct rockchip_decom_priv *priv = dev_get_priv(dev); 183 struct decom_param *param = (struct decom_param *)buf; 184 u32 sizel, sizeh; 185 186 sizel = readl(priv->base + DECOM_TSIZEL); 187 sizeh = readl(priv->base + DECOM_TSIZEH); 188 param->size_dst = sizel | ((u64)sizeh << 32); 189 190 return 0; 191 } 192 193 /* Caller must fill in param @buf which represent struct decom_param */ 194 static int rockchip_decom_ioctl(struct udevice *dev, unsigned long request, 195 void *buf) 196 { 197 int ret = -EINVAL; 198 199 switch (request) { 200 case IOCTL_REQ_START: 201 ret = rockchip_decom_start(dev, buf); 202 break; 203 case IOCTL_REQ_POLL: 204 ret = rockchip_decom_done_poll(dev); 205 break; 206 case IOCTL_REQ_STOP: 207 ret = rockchip_decom_stop(dev); 208 break; 209 case IOCTL_REQ_CAPABILITY: 210 ret = rockchip_decom_capability(buf); 211 break; 212 case IOCTL_REQ_DATA_SIZE: 213 ret = rockchip_decom_data_size(dev, buf); 214 break; 215 default: 216 printf("Unsupported ioctl: %ld\n", (ulong)request); 217 break; 218 } 219 220 return ret; 221 } 222 223 static const struct misc_ops rockchip_decom_ops = { 224 .ioctl = rockchip_decom_ioctl, 225 }; 226 227 static int rockchip_decom_ofdata_to_platdata(struct udevice *dev) 228 { 229 struct rockchip_decom_priv *priv = dev_get_priv(dev); 230 231 priv->base = dev_read_addr_ptr(dev); 232 if (!priv->base) 233 return -ENOENT; 234 235 priv->cached = dev_read_u32_default(dev, "data-cached", 0); 236 priv->soft_reset_base = dev_read_u32_default(dev, "soft-reset-addr", 0) 237 & 0xffffffff; 238 239 return 0; 240 } 241 242 static int rockchip_decom_probe(struct udevice *dev) 243 { 244 return 0; 245 } 246 247 static const struct udevice_id rockchip_decom_ids[] = { 248 { .compatible = "rockchip,hw-decompress" }, 249 {} 250 }; 251 252 U_BOOT_DRIVER(rockchip_hw_decompress) = { 253 .name = "rockchip_hw_decompress", 254 .id = UCLASS_MISC, 255 .of_match = rockchip_decom_ids, 256 .probe = rockchip_decom_probe, 257 .ofdata_to_platdata = rockchip_decom_ofdata_to_platdata, 258 .priv_auto_alloc_size = sizeof(struct rockchip_decom_priv), 259 .ops = &rockchip_decom_ops, 260 }; 261