xref: /rk3399_rockchip-uboot/drivers/misc/ds4510.c (revision 8dd026bffd0953d38bb4ed509590fcff7a083e37)
1 /*
2  * Copyright 2008 Extreme Engineering Solutions, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0
5  */
6 
7 /*
8  * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
9  * and 4 programmable non-volatile GPIO pins.
10  */
11 
12 #include <common.h>
13 #include <i2c.h>
14 #include <command.h>
15 #include <ds4510.h>
16 
17 /* Default to an address that hopefully won't corrupt other i2c devices */
18 #ifndef CONFIG_SYS_I2C_DS4510_ADDR
19 #define CONFIG_SYS_I2C_DS4510_ADDR	(~0)
20 #endif
21 
22 enum {
23 	DS4510_CMD_INFO,
24 	DS4510_CMD_DEVICE,
25 	DS4510_CMD_NV,
26 	DS4510_CMD_RSTDELAY,
27 	DS4510_CMD_OUTPUT,
28 	DS4510_CMD_INPUT,
29 	DS4510_CMD_PULLUP,
30 	DS4510_CMD_EEPROM,
31 	DS4510_CMD_SEEPROM,
32 	DS4510_CMD_SRAM,
33 };
34 
35 /*
36  * Write to DS4510, taking page boundaries into account
37  */
38 int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
39 {
40 	int wrlen;
41 	int i = 0;
42 
43 	do {
44 		wrlen = DS4510_EEPROM_PAGE_SIZE -
45 			DS4510_EEPROM_PAGE_OFFSET(offset);
46 		if (count < wrlen)
47 			wrlen = count;
48 		if (i2c_write(chip, offset, 1, &buf[i], wrlen))
49 			return -1;
50 
51 		/*
52 		 * This delay isn't needed for SRAM writes but shouldn't delay
53 		 * things too much, so do it unconditionally for simplicity
54 		 */
55 		udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
56 		count -= wrlen;
57 		offset += wrlen;
58 		i += wrlen;
59 	} while (count > 0);
60 
61 	return 0;
62 }
63 
64 /*
65  * General read from DS4510
66  */
67 int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
68 {
69 	return i2c_read(chip, offset, 1, buf, count);
70 }
71 
72 /*
73  * Write SEE bit in config register.
74  * nv = 0 - Writes to SEEPROM registers behave like EEPROM
75  * nv = 1 - Writes to SEEPROM registers behave like SRAM
76  */
77 int ds4510_see_write(uint8_t chip, uint8_t nv)
78 {
79 	uint8_t data;
80 
81 	if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
82 		return -1;
83 
84 	if (nv)	/* Treat SEEPROM bits as EEPROM */
85 		data &= ~DS4510_CFG_SEE;
86 	else	/* Treat SEEPROM bits as SRAM */
87 		data |= DS4510_CFG_SEE;
88 
89 	return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
90 }
91 
92 /*
93  * Write de-assertion of reset signal delay
94  */
95 int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
96 {
97 	uint8_t data;
98 
99 	if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
100 		return -1;
101 
102 	data &= ~DS4510_RSTDELAY_MASK;
103 	data |= delay & DS4510_RSTDELAY_MASK;
104 
105 	return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
106 }
107 
108 /*
109  * Write pullup characteristics of IO pins
110  */
111 int ds4510_pullup_write(uint8_t chip, uint8_t val)
112 {
113 	val &= DS4510_IO_MASK;
114 
115 	return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1);
116 }
117 
118 /*
119  * Read pullup characteristics of IO pins
120  */
121 int ds4510_pullup_read(uint8_t chip)
122 {
123 	uint8_t val;
124 
125 	if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1))
126 		return -1;
127 
128 	return val & DS4510_IO_MASK;
129 }
130 
131 /*
132  * Write drive level of IO pins
133  */
134 int ds4510_gpio_write(uint8_t chip, uint8_t val)
135 {
136 	uint8_t data;
137 	int i;
138 
139 	for (i = 0; i < DS4510_NUM_IO; i++) {
140 		if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
141 			return -1;
142 
143 		if (val & (0x1 << i))
144 			data |= 0x1;
145 		else
146 			data &= ~0x1;
147 
148 		if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1))
149 			return -1;
150 	}
151 
152 	return 0;
153 }
154 
155 /*
156  * Read drive level of IO pins
157  */
158 int ds4510_gpio_read(uint8_t chip)
159 {
160 	uint8_t data;
161 	int val = 0;
162 	int i;
163 
164 	for (i = 0; i < DS4510_NUM_IO; i++) {
165 		if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
166 			return -1;
167 
168 		if (data & 1)
169 			val |= (1 << i);
170 	}
171 
172 	return val;
173 }
174 
175 /*
176  * Read physical level of IO pins
177  */
178 int ds4510_gpio_read_val(uint8_t chip)
179 {
180 	uint8_t val;
181 
182 	if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1))
183 		return -1;
184 
185 	return val & DS4510_IO_MASK;
186 }
187 
188 #ifdef CONFIG_CMD_DS4510
189 /*
190  * Display DS4510 information
191  */
192 static int ds4510_info(uint8_t chip)
193 {
194 	int i;
195 	int tmp;
196 	uint8_t data;
197 
198 	printf("DS4510 @ 0x%x:\n\n", chip);
199 
200 	if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
201 		return -1;
202 	printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK);
203 
204 	if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
205 		return -1;
206 	printf("config   = 0x%x\n", data);
207 	printf(" /ready  = %d\n", data & DS4510_CFG_READY ? 1 : 0);
208 	printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0);
209 	printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0);
210 	printf(" /see    = %d\n", data & DS4510_CFG_SEE ? 1 : 0);
211 	printf(" swrst   = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0);
212 
213 	printf("gpio pins: 3210\n");
214 	printf("---------------\n");
215 	printf("pullup     ");
216 
217 	tmp = ds4510_pullup_read(chip);
218 	if (tmp == -1)
219 		return tmp;
220 	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
221 		printf("%d", (tmp & (1 << i)) ? 1 : 0);
222 	printf("\n");
223 
224 	printf("driven     ");
225 	tmp = ds4510_gpio_read(chip);
226 	if (tmp == -1)
227 		return -1;
228 	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
229 		printf("%d", (tmp & (1 << i)) ? 1 : 0);
230 	printf("\n");
231 
232 	printf("read       ");
233 	tmp = ds4510_gpio_read_val(chip);
234 	if (tmp == -1)
235 		return -1;
236 	for (i = DS4510_NUM_IO - 1; i >= 0; i--)
237 		printf("%d", (tmp & (1 << i)) ? 1 : 0);
238 	printf("\n");
239 
240 	return 0;
241 }
242 
243 cmd_tbl_t cmd_ds4510[] = {
244 	U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
245 	U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
246 	U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
247 	U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""),
248 	U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""),
249 	U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""),
250 	U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""),
251 	U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""),
252 	U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""),
253 	U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
254 };
255 
256 int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
257 {
258 	static uint8_t chip = CONFIG_SYS_I2C_DS4510_ADDR;
259 	cmd_tbl_t *c;
260 	ulong ul_arg2 = 0;
261 	ulong ul_arg3 = 0;
262 	int tmp;
263 	ulong addr;
264 	ulong off;
265 	ulong cnt;
266 	int end;
267 	int (*rw_func)(uint8_t, int, uint8_t *, int);
268 
269 	c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510));
270 
271 	/* All commands but "device" require 'maxargs' arguments */
272 	if (!c || !((argc == (c->maxargs)) ||
273 		(((int)c->cmd == DS4510_CMD_DEVICE) &&
274 		 (argc == (c->maxargs - 1))))) {
275 		return cmd_usage(cmdtp);
276 	}
277 
278 	/* arg2 used as chip addr and pin number */
279 	if (argc > 2)
280 		ul_arg2 = simple_strtoul(argv[2], NULL, 16);
281 
282 	/* arg3 used as output/pullup value */
283 	if (argc > 3)
284 		ul_arg3 = simple_strtoul(argv[3], NULL, 16);
285 
286 	switch ((int)c->cmd) {
287 	case DS4510_CMD_DEVICE:
288 		if (argc == 3)
289 			chip = ul_arg2;
290 		printf("Current device address: 0x%x\n", chip);
291 		return 0;
292 	case DS4510_CMD_NV:
293 		return ds4510_see_write(chip, ul_arg2);
294 	case DS4510_CMD_OUTPUT:
295 		tmp = ds4510_gpio_read(chip);
296 		if (tmp == -1)
297 			return -1;
298 		if (ul_arg3)
299 			tmp |= (1 << ul_arg2);
300 		else
301 			tmp &= ~(1 << ul_arg2);
302 		return ds4510_gpio_write(chip, tmp);
303 	case DS4510_CMD_INPUT:
304 		tmp = ds4510_gpio_read_val(chip);
305 		if (tmp == -1)
306 			return -1;
307 		return (tmp & (1 << ul_arg2)) != 0;
308 	case DS4510_CMD_PULLUP:
309 		tmp = ds4510_pullup_read(chip);
310 		if (tmp == -1)
311 			return -1;
312 		if (ul_arg3)
313 			tmp |= (1 << ul_arg2);
314 		else
315 			tmp &= ~(1 << ul_arg2);
316 		return ds4510_pullup_write(chip, tmp);
317 	case DS4510_CMD_INFO:
318 		return ds4510_info(chip);
319 	case DS4510_CMD_RSTDELAY:
320 		return ds4510_rstdelay_write(chip, ul_arg2);
321 	case DS4510_CMD_EEPROM:
322 		end = DS4510_EEPROM + DS4510_EEPROM_SIZE;
323 		off = DS4510_EEPROM;
324 		break;
325 	case DS4510_CMD_SEEPROM:
326 		end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE;
327 		off = DS4510_SEEPROM;
328 		break;
329 	case DS4510_CMD_SRAM:
330 		end = DS4510_SRAM + DS4510_SRAM_SIZE;
331 		off = DS4510_SRAM;
332 		break;
333 	default:
334 		/* We should never get here... */
335 		return 1;
336 	}
337 
338 	/* Only eeprom, seeprom, and sram commands should make it here */
339 	if (strcmp(argv[2], "read") == 0)
340 		rw_func = ds4510_mem_read;
341 	else if (strcmp(argv[2], "write") == 0)
342 		rw_func = ds4510_mem_write;
343 	else
344 		return cmd_usage(cmdtp);
345 
346 	addr = simple_strtoul(argv[3], NULL, 16);
347 	off += simple_strtoul(argv[4], NULL, 16);
348 	cnt = simple_strtoul(argv[5], NULL, 16);
349 
350 	if ((off + cnt) > end) {
351 		printf("ERROR: invalid len\n");
352 		return -1;
353 	}
354 
355 	return rw_func(chip, off, (uint8_t *)addr, cnt);
356 }
357 
358 U_BOOT_CMD(
359 	ds4510,	6,	1,	do_ds4510,
360 	"ds4510 eeprom/seeprom/sram/gpio access",
361 	"device [dev]\n"
362 	"	- show or set current device address\n"
363 	"ds4510 info\n"
364 	"	- display ds4510 info\n"
365 	"ds4510 output pin 0|1\n"
366 	"	- set pin low or high-Z\n"
367 	"ds4510 input pin\n"
368 	"	- read value of pin\n"
369 	"ds4510 pullup pin 0|1\n"
370 	"	- disable/enable pullup on specified pin\n"
371 	"ds4510 nv 0|1\n"
372 	"	- make gpio and seeprom writes volatile/non-volatile"
373 	"\n"
374 	"ds4510 rstdelay 0-3\n"
375 	"	- set reset output delay"
376 	"\n"
377 	"ds4510 eeprom read addr off cnt\n"
378 	"ds4510 eeprom write addr off cnt\n"
379 	"	- read/write 'cnt' bytes at EEPROM offset 'off'\n"
380 	"ds4510 seeprom read addr off cnt\n"
381 	"ds4510 seeprom write addr off cnt\n"
382 	"	- read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
383 	"ds4510 sram read addr off cnt\n"
384 	"ds4510 sram write addr off cnt\n"
385 	"	- read/write 'cnt' bytes at SRAM offset 'off'"
386 );
387 #endif /* CONFIG_CMD_DS4510 */
388