1 /* 2 * (C) Copyright 2004 Tundra Semiconductor Corp. 3 * Author: Alex Bounine 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 * 23 */ 24 25 #include <config.h> 26 #include <common.h> 27 28 #include <tsi108.h> 29 30 #if defined(CONFIG_CMD_I2C) 31 32 #define I2C_DELAY 100000 33 #undef DEBUG_I2C 34 35 #ifdef DEBUG_I2C 36 #define DPRINT(x) printf (x) 37 #else 38 #define DPRINT(x) 39 #endif 40 41 /* All functions assume that Tsi108 I2C block is the only master on the bus */ 42 /* I2C read helper function */ 43 44 static int i2c_read_byte ( 45 uint i2c_chan, /* I2C channel number: 0 - main, 1 - SDC SPD */ 46 uchar chip_addr,/* I2C device address on the bus */ 47 uint byte_addr, /* Byte address within I2C device */ 48 uchar * buffer /* pointer to data buffer */ 49 ) 50 { 51 u32 temp; 52 u32 to_count = I2C_DELAY; 53 u32 op_status = TSI108_I2C_TIMEOUT_ERR; 54 u32 chan_offset = TSI108_I2C_OFFSET; 55 56 DPRINT (("I2C read_byte() %d 0x%02x 0x%02x\n", 57 i2c_chan, chip_addr, byte_addr)); 58 59 if (0 != i2c_chan) 60 chan_offset = TSI108_I2C_SDRAM_OFFSET; 61 62 /* Check if I2C operation is in progress */ 63 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); 64 65 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | 66 I2C_CNTRL2_START))) { 67 /* Set device address and operation (read = 0) */ 68 temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) | 69 ((chip_addr >> 3) & 0x0F); 70 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = 71 temp; 72 73 /* Issue the read command 74 * (at this moment all other parameters are 0 75 * (size = 1 byte, lane = 0) 76 */ 77 78 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = 79 (I2C_CNTRL2_START); 80 81 /* Wait until operation completed */ 82 do { 83 /* Read I2C operation status */ 84 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); 85 86 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) { 87 if (0 == (temp & 88 (I2C_CNTRL2_I2C_CFGERR | 89 I2C_CNTRL2_I2C_TO_ERR)) 90 ) { 91 op_status = TSI108_I2C_SUCCESS; 92 93 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + 94 chan_offset + 95 I2C_RD_DATA); 96 97 *buffer = (u8) (temp & 0xFF); 98 } else { 99 /* report HW error */ 100 op_status = TSI108_I2C_IF_ERROR; 101 102 DPRINT (("I2C HW error reported: 0x%02x\n", temp)); 103 } 104 105 break; 106 } 107 } while (to_count--); 108 } else { 109 op_status = TSI108_I2C_IF_BUSY; 110 111 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp)); 112 } 113 114 DPRINT (("I2C read_byte() status: 0x%02x\n", op_status)); 115 return op_status; 116 } 117 118 /* 119 * I2C Read interface as defined in "include/i2c.h" : 120 * chip_addr: I2C chip address, range 0..127 121 * (to read from SPD channel EEPROM use (0xD0 ... 0xD7) 122 * NOTE: The bit 7 in the chip_addr serves as a channel select. 123 * This hack is for enabling "isdram" command on Tsi108 boards 124 * without changes to common code. Used for I2C reads only. 125 * byte_addr: Memory or register address within the chip 126 * alen: Number of bytes to use for addr (typically 1, 2 for larger 127 * memories, 0 for register type devices with only one 128 * register) 129 * buffer: Pointer to destination buffer for data to be read 130 * len: How many bytes to read 131 * 132 * Returns: 0 on success, not 0 on failure 133 */ 134 135 int i2c_read (uchar chip_addr, uint byte_addr, int alen, 136 uchar * buffer, int len) 137 { 138 u32 op_status = TSI108_I2C_PARAM_ERR; 139 u32 i2c_if = 0; 140 141 /* Hack to support second (SPD) I2C controller (SPD EEPROM read only).*/ 142 if (0xD0 == (chip_addr & ~0x07)) { 143 i2c_if = 1; 144 chip_addr &= 0x7F; 145 } 146 /* Check for valid I2C address */ 147 if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) { 148 while (len--) { 149 op_status = i2c_read_byte(i2c_if, chip_addr, byte_addr++, buffer++); 150 151 if (TSI108_I2C_SUCCESS != op_status) { 152 DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len)); 153 154 break; 155 } 156 } 157 } 158 159 DPRINT (("I2C read() status: 0x%02x\n", op_status)); 160 return op_status; 161 } 162 163 /* I2C write helper function */ 164 165 static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ 166 uint byte_addr, /* Byte address within I2C device */ 167 uchar * buffer /* pointer to data buffer */ 168 ) 169 { 170 u32 temp; 171 u32 to_count = I2C_DELAY; 172 u32 op_status = TSI108_I2C_TIMEOUT_ERR; 173 174 /* Check if I2C operation is in progress */ 175 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); 176 177 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { 178 /* Place data into the I2C Tx Register */ 179 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + 180 I2C_TX_DATA) = (u32) * buffer; 181 182 /* Set device address and operation */ 183 temp = 184 I2C_CNTRL1_I2CWRITE | (byte_addr << 16) | 185 ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); 186 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + 187 I2C_CNTRL1) = temp; 188 189 /* Issue the write command (at this moment all other parameters 190 * are 0 (size = 1 byte, lane = 0) 191 */ 192 193 *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + 194 I2C_CNTRL2) = (I2C_CNTRL2_START); 195 196 op_status = TSI108_I2C_TIMEOUT_ERR; 197 198 /* Wait until operation completed */ 199 do { 200 /* Read I2C operation status */ 201 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); 202 203 if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { 204 if (0 == (temp & 205 (I2C_CNTRL2_I2C_CFGERR | 206 I2C_CNTRL2_I2C_TO_ERR))) { 207 op_status = TSI108_I2C_SUCCESS; 208 } else { 209 /* report detected HW error */ 210 op_status = TSI108_I2C_IF_ERROR; 211 212 DPRINT (("I2C HW error reported: 0x%02x\n", temp)); 213 } 214 215 break; 216 } 217 218 } while (to_count--); 219 } else { 220 op_status = TSI108_I2C_IF_BUSY; 221 222 DPRINT (("I2C Transaction start failed: 0x%02x\n", temp)); 223 } 224 225 return op_status; 226 } 227 228 /* 229 * I2C Write interface as defined in "include/i2c.h" : 230 * chip_addr: I2C chip address, range 0..127 231 * byte_addr: Memory or register address within the chip 232 * alen: Number of bytes to use for addr (typically 1, 2 for larger 233 * memories, 0 for register type devices with only one 234 * register) 235 * buffer: Pointer to data to be written 236 * len: How many bytes to write 237 * 238 * Returns: 0 on success, not 0 on failure 239 */ 240 241 int i2c_write (uchar chip_addr, uint byte_addr, int alen, uchar * buffer, 242 int len) 243 { 244 u32 op_status = TSI108_I2C_PARAM_ERR; 245 246 /* Check for valid I2C address */ 247 if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) { 248 while (len--) { 249 op_status = 250 i2c_write_byte (chip_addr, byte_addr++, buffer++); 251 252 if (TSI108_I2C_SUCCESS != op_status) { 253 DPRINT (("I2C write_byte() failed: 0x%02x (%d left)\n", op_status, len)); 254 255 break; 256 } 257 } 258 } 259 260 return op_status; 261 } 262 263 /* 264 * I2C interface function as defined in "include/i2c.h". 265 * Probe the given I2C chip address by reading single byte from offset 0. 266 * Returns 0 if a chip responded, not 0 on failure. 267 */ 268 269 int i2c_probe (uchar chip) 270 { 271 u32 tmp; 272 273 /* 274 * Try to read the first location of the chip. 275 * The Tsi108 HW doesn't support sending just the chip address 276 * and checkong for an <ACK> back. 277 */ 278 return i2c_read (chip, 0, 1, (uchar *)&tmp, 1); 279 } 280 281 #endif 282