1 /* 2 * i2c driver for Freescale mx31 3 * 4 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <asm/io.h> 27 28 #if defined(CONFIG_HARD_I2C) 29 30 #if defined(CONFIG_MX31) 31 #include <asm/arch/mx31.h> 32 #include <asm/arch/mx31-regs.h> 33 #else 34 #include <asm/arch/imx-regs.h> 35 #include <asm/arch/clock.h> 36 #endif 37 38 #define IADR 0x00 39 #define IFDR 0x04 40 #define I2CR 0x08 41 #define I2SR 0x0c 42 #define I2DR 0x10 43 44 #define I2CR_IEN (1 << 7) 45 #define I2CR_IIEN (1 << 6) 46 #define I2CR_MSTA (1 << 5) 47 #define I2CR_MTX (1 << 4) 48 #define I2CR_TX_NO_AK (1 << 3) 49 #define I2CR_RSTA (1 << 2) 50 51 #define I2SR_ICF (1 << 7) 52 #define I2SR_IBB (1 << 5) 53 #define I2SR_IIF (1 << 1) 54 #define I2SR_RX_NO_AK (1 << 0) 55 56 #if defined(CONFIG_SYS_I2C_MX31_PORT1) 57 #define I2C_BASE 0x43f80000 58 #define I2C_CLK_OFFSET 26 59 #elif defined (CONFIG_SYS_I2C_MX31_PORT2) 60 #define I2C_BASE 0x43f98000 61 #define I2C_CLK_OFFSET 28 62 #elif defined (CONFIG_SYS_I2C_MX31_PORT3) 63 #define I2C_BASE 0x43f84000 64 #define I2C_CLK_OFFSET 30 65 #elif defined(CONFIG_SYS_I2C_MX53_PORT1) 66 #define I2C_BASE I2C1_BASE_ADDR 67 #elif defined(CONFIG_SYS_I2C_MX53_PORT2) 68 #define I2C_BASE I2C2_BASE_ADDR 69 #elif defined(CONFIG_SYS_I2C_MX35_PORT1) 70 #define I2C_BASE I2C_BASE_ADDR 71 #else 72 #error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver" 73 #endif 74 75 #ifdef DEBUG 76 #define DPRINTF(args...) printf(args) 77 #else 78 #define DPRINTF(args...) 79 #endif 80 81 static u16 div[] = { 30, 32, 36, 42, 48, 52, 60, 72, 80, 88, 104, 128, 144, 82 160, 192, 240, 288, 320, 384, 480, 576, 640, 768, 960, 83 1152, 1280, 1536, 1920, 2304, 2560, 3072, 3840}; 84 85 static inline void i2c_reset(void) 86 { 87 writew(0, I2C_BASE + I2CR); /* Reset module */ 88 writew(0, I2C_BASE + I2SR); 89 writew(I2CR_IEN, I2C_BASE + I2CR); 90 } 91 92 void i2c_init(int speed, int unused) 93 { 94 int freq; 95 int i; 96 97 #if defined(CONFIG_MX31) 98 struct clock_control_regs *sc_regs = 99 (struct clock_control_regs *)CCM_BASE; 100 101 freq = mx31_get_ipg_clk(); 102 /* start the required I2C clock */ 103 writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET), 104 &sc_regs->cgr0); 105 #else 106 freq = mxc_get_clock(MXC_IPG_PERCLK); 107 #endif 108 109 for (i = 0; i < 0x1f; i++) 110 if (freq / div[i] <= speed) 111 break; 112 113 debug("%s: speed: %d\n", __func__, speed); 114 115 writew(i, I2C_BASE + IFDR); 116 i2c_reset(); 117 } 118 119 static int wait_busy(void) 120 { 121 int timeout = 10000; 122 123 while (!(readw(I2C_BASE + I2SR) & I2SR_IIF) && --timeout) 124 udelay(1); 125 writew(0, I2C_BASE + I2SR); /* clear interrupt */ 126 127 return timeout; 128 } 129 130 static int tx_byte(u8 byte) 131 { 132 writew(byte, I2C_BASE + I2DR); 133 134 if (!wait_busy() || readw(I2C_BASE + I2SR) & I2SR_RX_NO_AK) 135 return -1; 136 return 0; 137 } 138 139 static int rx_byte(void) 140 { 141 if (!wait_busy()) 142 return -1; 143 144 return readw(I2C_BASE + I2DR); 145 } 146 147 int i2c_probe(uchar chip) 148 { 149 int ret; 150 151 writew(0, I2C_BASE + I2CR); /* Reset module */ 152 writew(I2CR_IEN, I2C_BASE + I2CR); 153 154 writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR); 155 ret = tx_byte(chip << 1); 156 writew(I2CR_IEN | I2CR_MTX, I2C_BASE + I2CR); 157 158 return ret; 159 } 160 161 static int i2c_addr(uchar chip, uint addr, int alen) 162 { 163 writew(0, I2C_BASE + I2SR); 164 writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX, I2C_BASE + I2CR); 165 166 if (tx_byte(chip << 1)) 167 return -1; 168 169 while (alen--) 170 if (tx_byte((addr >> (alen * 8)) & 0xff)) 171 return -1; 172 return 0; 173 } 174 175 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len) 176 { 177 int timeout = 10000; 178 int ret; 179 180 debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n", 181 __func__, chip, addr, alen, len); 182 183 if (i2c_addr(chip, addr, alen)) { 184 printf("i2c_addr failed\n"); 185 return -1; 186 } 187 188 writew(I2CR_IEN | I2CR_MSTA | I2CR_MTX | I2CR_RSTA, I2C_BASE + I2CR); 189 190 if (tx_byte(chip << 1 | 1)) 191 return -1; 192 193 writew(I2CR_IEN | I2CR_MSTA | 194 ((len == 1) ? I2CR_TX_NO_AK : 0), 195 I2C_BASE + I2CR); 196 197 ret = readw(I2C_BASE + I2DR); 198 199 while (len--) { 200 if ((ret = rx_byte()) < 0) 201 return -1; 202 *buf++ = ret; 203 if (len <= 1) 204 writew(I2CR_IEN | I2CR_MSTA | 205 I2CR_TX_NO_AK, 206 I2C_BASE + I2CR); 207 } 208 209 wait_busy(); 210 211 writew(I2CR_IEN, I2C_BASE + I2CR); 212 213 while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout) 214 udelay(1); 215 216 return 0; 217 } 218 219 int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len) 220 { 221 int timeout = I2C_MAX_TIMEOUT; 222 debug("%s chip: 0x%02x addr: 0x%04x alen: %d len: %d\n", 223 __func__, chip, addr, alen, len); 224 225 if (i2c_addr(chip, addr, alen)) 226 return -1; 227 228 while (len--) 229 if (tx_byte(*buf++)) 230 return -1; 231 232 writew(I2CR_IEN, I2C_BASE + I2CR); 233 234 while (readw(I2C_BASE + I2SR) & I2SR_IBB && --timeout) 235 udelay(1); 236 237 return 0; 238 } 239 240 #endif /* CONFIG_HARD_I2C */ 241