1 /* 2 * (C) Copyright 2000 3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it 4 * 5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com> 6 * Marius Groeger <mgroeger@sysgo.de> 7 * 8 * (C) Copyright 2003 Pengutronix e.K. 9 * Robert Schwebel <r.schwebel@pengutronix.de> 10 * 11 * (C) Copyright 2011 Marvell Inc. 12 * Lei Wen <leiwen@marvell.com> 13 * 14 * SPDX-License-Identifier: GPL-2.0+ 15 * 16 * Back ported to the 8xx platform (from the 8260 platform) by 17 * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 18 */ 19 20 #include <common.h> 21 #include <i2c.h> 22 #include <asm/io.h> 23 #include "mv_i2c.h" 24 25 /* All transfers are described by this data structure */ 26 struct mv_i2c_msg { 27 u8 condition; 28 u8 acknack; 29 u8 direction; 30 u8 data; 31 }; 32 33 struct mv_i2c { 34 u32 ibmr; 35 u32 pad0; 36 u32 idbr; 37 u32 pad1; 38 u32 icr; 39 u32 pad2; 40 u32 isr; 41 u32 pad3; 42 u32 isar; 43 }; 44 45 /* 46 * i2c_reset: - reset the host controller 47 * 48 */ 49 static void i2c_reset(struct mv_i2c *base) 50 { 51 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 52 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */ 53 udelay(100); 54 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 55 56 i2c_clk_enable(); 57 58 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */ 59 writel(I2C_ICR_INIT, &base->icr); /* set control reg values */ 60 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */ 61 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ 62 udelay(100); 63 } 64 65 /* 66 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register 67 * are set and cleared 68 * 69 * @return: 1 in case of success, 0 means timeout (no match within 10 ms). 70 */ 71 static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask, 72 unsigned long cleared_mask) 73 { 74 int timeout = 1000, isr; 75 76 do { 77 isr = readl(&base->isr); 78 udelay(10); 79 if (timeout-- < 0) 80 return 0; 81 } while (((isr & set_mask) != set_mask) 82 || ((isr & cleared_mask) != 0)); 83 84 return 1; 85 } 86 87 /* 88 * i2c_transfer: - Transfer one byte over the i2c bus 89 * 90 * This function can tranfer a byte over the i2c bus in both directions. 91 * It is used by the public API functions. 92 * 93 * @return: 0: transfer successful 94 * -1: message is empty 95 * -2: transmit timeout 96 * -3: ACK missing 97 * -4: receive timeout 98 * -5: illegal parameters 99 * -6: bus is busy and couldn't be aquired 100 */ 101 static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg) 102 { 103 int ret; 104 105 if (!msg) 106 goto transfer_error_msg_empty; 107 108 switch (msg->direction) { 109 case I2C_WRITE: 110 /* check if bus is not busy */ 111 if (!i2c_isr_set_cleared(base, 0, ISR_IBB)) 112 goto transfer_error_bus_busy; 113 114 /* start transmission */ 115 writel(readl(&base->icr) & ~ICR_START, &base->icr); 116 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 117 writel(msg->data, &base->idbr); 118 if (msg->condition == I2C_COND_START) 119 writel(readl(&base->icr) | ICR_START, &base->icr); 120 if (msg->condition == I2C_COND_STOP) 121 writel(readl(&base->icr) | ICR_STOP, &base->icr); 122 if (msg->acknack == I2C_ACKNAK_SENDNAK) 123 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 124 if (msg->acknack == I2C_ACKNAK_SENDACK) 125 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 126 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 127 writel(readl(&base->icr) | ICR_TB, &base->icr); 128 129 /* transmit register empty? */ 130 if (!i2c_isr_set_cleared(base, ISR_ITE, 0)) 131 goto transfer_error_transmit_timeout; 132 133 /* clear 'transmit empty' state */ 134 writel(readl(&base->isr) | ISR_ITE, &base->isr); 135 136 /* wait for ACK from slave */ 137 if (msg->acknack == I2C_ACKNAK_WAITACK) 138 if (!i2c_isr_set_cleared(base, 0, ISR_ACKNAK)) 139 goto transfer_error_ack_missing; 140 break; 141 142 case I2C_READ: 143 144 /* check if bus is not busy */ 145 if (!i2c_isr_set_cleared(base, 0, ISR_IBB)) 146 goto transfer_error_bus_busy; 147 148 /* start receive */ 149 writel(readl(&base->icr) & ~ICR_START, &base->icr); 150 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 151 if (msg->condition == I2C_COND_START) 152 writel(readl(&base->icr) | ICR_START, &base->icr); 153 if (msg->condition == I2C_COND_STOP) 154 writel(readl(&base->icr) | ICR_STOP, &base->icr); 155 if (msg->acknack == I2C_ACKNAK_SENDNAK) 156 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 157 if (msg->acknack == I2C_ACKNAK_SENDACK) 158 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 159 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 160 writel(readl(&base->icr) | ICR_TB, &base->icr); 161 162 /* receive register full? */ 163 if (!i2c_isr_set_cleared(base, ISR_IRF, 0)) 164 goto transfer_error_receive_timeout; 165 166 msg->data = readl(&base->idbr); 167 168 /* clear 'receive empty' state */ 169 writel(readl(&base->isr) | ISR_IRF, &base->isr); 170 break; 171 default: 172 goto transfer_error_illegal_param; 173 } 174 175 return 0; 176 177 transfer_error_msg_empty: 178 debug("i2c_transfer: error: 'msg' is empty\n"); 179 ret = -1; 180 goto i2c_transfer_finish; 181 182 transfer_error_transmit_timeout: 183 debug("i2c_transfer: error: transmit timeout\n"); 184 ret = -2; 185 goto i2c_transfer_finish; 186 187 transfer_error_ack_missing: 188 debug("i2c_transfer: error: ACK missing\n"); 189 ret = -3; 190 goto i2c_transfer_finish; 191 192 transfer_error_receive_timeout: 193 debug("i2c_transfer: error: receive timeout\n"); 194 ret = -4; 195 goto i2c_transfer_finish; 196 197 transfer_error_illegal_param: 198 debug("i2c_transfer: error: illegal parameters\n"); 199 ret = -5; 200 goto i2c_transfer_finish; 201 202 transfer_error_bus_busy: 203 debug("i2c_transfer: error: bus is busy\n"); 204 ret = -6; 205 goto i2c_transfer_finish; 206 207 i2c_transfer_finish: 208 debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr)); 209 i2c_reset(base); 210 return ret; 211 } 212 213 static int __i2c_probe_chip(struct mv_i2c *base, uchar chip) 214 { 215 struct mv_i2c_msg msg; 216 217 i2c_reset(base); 218 219 msg.condition = I2C_COND_START; 220 msg.acknack = I2C_ACKNAK_WAITACK; 221 msg.direction = I2C_WRITE; 222 msg.data = (chip << 1) + 1; 223 if (i2c_transfer(base, &msg)) 224 return -1; 225 226 msg.condition = I2C_COND_STOP; 227 msg.acknack = I2C_ACKNAK_SENDNAK; 228 msg.direction = I2C_READ; 229 msg.data = 0x00; 230 if (i2c_transfer(base, &msg)) 231 return -1; 232 233 return 0; 234 } 235 236 static int __i2c_read(struct mv_i2c *base, uchar chip, uint addr, int alen, 237 uchar *buffer, int len) 238 { 239 struct mv_i2c_msg msg; 240 u8 addr_bytes[3]; /* lowest...highest byte of data address */ 241 242 debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 243 "len=0x%02x)\n", chip, addr, alen, len); 244 245 i2c_reset(base); 246 247 /* dummy chip address write */ 248 debug("i2c_read: dummy chip address write\n"); 249 msg.condition = I2C_COND_START; 250 msg.acknack = I2C_ACKNAK_WAITACK; 251 msg.direction = I2C_WRITE; 252 msg.data = (chip << 1); 253 msg.data &= 0xFE; 254 if (i2c_transfer(base, &msg)) 255 return -1; 256 257 /* 258 * send memory address bytes; 259 * alen defines how much bytes we have to send. 260 */ 261 /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */ 262 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 263 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 264 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 265 266 while (--alen >= 0) { 267 debug("i2c_read: send memory word address byte %1d\n", alen); 268 msg.condition = I2C_COND_NORMAL; 269 msg.acknack = I2C_ACKNAK_WAITACK; 270 msg.direction = I2C_WRITE; 271 msg.data = addr_bytes[alen]; 272 if (i2c_transfer(base, &msg)) 273 return -1; 274 } 275 276 /* start read sequence */ 277 debug("i2c_read: start read sequence\n"); 278 msg.condition = I2C_COND_START; 279 msg.acknack = I2C_ACKNAK_WAITACK; 280 msg.direction = I2C_WRITE; 281 msg.data = (chip << 1); 282 msg.data |= 0x01; 283 if (i2c_transfer(base, &msg)) 284 return -1; 285 286 /* read bytes; send NACK at last byte */ 287 while (len--) { 288 if (len == 0) { 289 msg.condition = I2C_COND_STOP; 290 msg.acknack = I2C_ACKNAK_SENDNAK; 291 } else { 292 msg.condition = I2C_COND_NORMAL; 293 msg.acknack = I2C_ACKNAK_SENDACK; 294 } 295 296 msg.direction = I2C_READ; 297 msg.data = 0x00; 298 if (i2c_transfer(base, &msg)) 299 return -1; 300 301 *buffer = msg.data; 302 debug("i2c_read: reading byte (0x%08x)=0x%02x\n", 303 (unsigned int)buffer, *buffer); 304 buffer++; 305 } 306 307 i2c_reset(base); 308 309 return 0; 310 } 311 312 static int __i2c_write(struct mv_i2c *base, uchar chip, uint addr, int alen, 313 uchar *buffer, int len) 314 { 315 struct mv_i2c_msg msg; 316 u8 addr_bytes[3]; /* lowest...highest byte of data address */ 317 318 debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 319 "len=0x%02x)\n", chip, addr, alen, len); 320 321 i2c_reset(base); 322 323 /* chip address write */ 324 debug("i2c_write: chip address write\n"); 325 msg.condition = I2C_COND_START; 326 msg.acknack = I2C_ACKNAK_WAITACK; 327 msg.direction = I2C_WRITE; 328 msg.data = (chip << 1); 329 msg.data &= 0xFE; 330 if (i2c_transfer(base, &msg)) 331 return -1; 332 333 /* 334 * send memory address bytes; 335 * alen defines how much bytes we have to send. 336 */ 337 addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 338 addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 339 addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 340 341 while (--alen >= 0) { 342 debug("i2c_write: send memory word address\n"); 343 msg.condition = I2C_COND_NORMAL; 344 msg.acknack = I2C_ACKNAK_WAITACK; 345 msg.direction = I2C_WRITE; 346 msg.data = addr_bytes[alen]; 347 if (i2c_transfer(base, &msg)) 348 return -1; 349 } 350 351 /* write bytes; send NACK at last byte */ 352 while (len--) { 353 debug("i2c_write: writing byte (0x%08x)=0x%02x\n", 354 (unsigned int)buffer, *buffer); 355 356 if (len == 0) 357 msg.condition = I2C_COND_STOP; 358 else 359 msg.condition = I2C_COND_NORMAL; 360 361 msg.acknack = I2C_ACKNAK_WAITACK; 362 msg.direction = I2C_WRITE; 363 msg.data = *(buffer++); 364 365 if (i2c_transfer(base, &msg)) 366 return -1; 367 } 368 369 i2c_reset(base); 370 371 return 0; 372 } 373 374 static struct mv_i2c *base_glob; 375 376 static void i2c_board_init(struct mv_i2c *base) 377 { 378 #ifdef CONFIG_SYS_I2C_INIT_BOARD 379 u32 icr; 380 /* 381 * call board specific i2c bus reset routine before accessing the 382 * environment, which might be in a chip on that bus. For details 383 * about this problem see doc/I2C_Edge_Conditions. 384 * 385 * disable I2C controller first, otherwhise it thinks we want to 386 * talk to the slave port... 387 */ 388 icr = readl(&base->icr); 389 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); 390 391 i2c_init_board(); 392 393 writel(icr, &base->icr); 394 #endif 395 } 396 397 #ifdef CONFIG_I2C_MULTI_BUS 398 static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG; 399 static unsigned int bus_initialized[CONFIG_MV_I2C_NUM]; 400 static unsigned int current_bus; 401 402 int i2c_set_bus_num(unsigned int bus) 403 { 404 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) { 405 printf("Bad bus: %d\n", bus); 406 return -1; 407 } 408 409 base_glob = (struct mv_i2c *)i2c_regs[bus]; 410 current_bus = bus; 411 412 if (!bus_initialized[current_bus]) { 413 i2c_board_init(base_glob); 414 bus_initialized[current_bus] = 1; 415 } 416 417 return 0; 418 } 419 420 unsigned int i2c_get_bus_num(void) 421 { 422 return current_bus; 423 } 424 #endif 425 426 /* API Functions */ 427 void i2c_init(int speed, int slaveaddr) 428 { 429 #ifdef CONFIG_I2C_MULTI_BUS 430 current_bus = 0; 431 base_glob = (struct mv_i2c *)i2c_regs[current_bus]; 432 #else 433 base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG; 434 #endif 435 436 i2c_board_init(base_glob); 437 } 438 439 /* 440 * i2c_probe: - Test if a chip answers for a given i2c address 441 * 442 * @chip: address of the chip which is searched for 443 * @return: 0 if a chip was found, -1 otherwhise 444 */ 445 int i2c_probe(uchar chip) 446 { 447 return __i2c_probe_chip(base_glob, chip); 448 } 449 450 /* 451 * i2c_read: - Read multiple bytes from an i2c device 452 * 453 * The higher level routines take into account that this function is only 454 * called with len < page length of the device (see configuration file) 455 * 456 * @chip: address of the chip which is to be read 457 * @addr: i2c data address within the chip 458 * @alen: length of the i2c data address (1..2 bytes) 459 * @buffer: where to write the data 460 * @len: how much byte do we want to read 461 * @return: 0 in case of success 462 */ 463 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 464 { 465 return __i2c_read(base_glob, chip, addr, alen, buffer, len); 466 } 467 468 /* 469 * i2c_write: - Write multiple bytes to an i2c device 470 * 471 * The higher level routines take into account that this function is only 472 * called with len < page length of the device (see configuration file) 473 * 474 * @chip: address of the chip which is to be written 475 * @addr: i2c data address within the chip 476 * @alen: length of the i2c data address (1..2 bytes) 477 * @buffer: where to find the data to be written 478 * @len: how much byte do we want to read 479 * @return: 0 in case of success 480 */ 481 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 482 { 483 return __i2c_write(base_glob, chip, addr, alen, buffer, len); 484 } 485