xref: /rk3399_rockchip-uboot/drivers/i2c/mv_i2c.c (revision 340fcd66ccd90b78763b76555eb0576be86fe1d1)
1 /*
2  * (C) Copyright 2000
3  * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
4  *
5  * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6  * Marius Groeger <mgroeger@sysgo.de>
7  *
8  * (C) Copyright 2003 Pengutronix e.K.
9  * Robert Schwebel <r.schwebel@pengutronix.de>
10  *
11  * (C) Copyright 2011 Marvell Inc.
12  * Lei Wen <leiwen@marvell.com>
13  *
14  * SPDX-License-Identifier:	GPL-2.0+
15  *
16  * Back ported to the 8xx platform (from the 8260 platform) by
17  * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
18  */
19 
20 #include <common.h>
21 #include <asm/io.h>
22 
23 #include <i2c.h>
24 #include "mv_i2c.h"
25 
26 /* All transfers are described by this data structure */
27 struct mv_i2c_msg {
28 	u8 condition;
29 	u8 acknack;
30 	u8 direction;
31 	u8 data;
32 };
33 
34 struct mv_i2c {
35 	u32 ibmr;
36 	u32 pad0;
37 	u32 idbr;
38 	u32 pad1;
39 	u32 icr;
40 	u32 pad2;
41 	u32 isr;
42 	u32 pad3;
43 	u32 isar;
44 };
45 
46 static struct mv_i2c *base;
47 static void i2c_board_init(struct mv_i2c *base)
48 {
49 #ifdef CONFIG_SYS_I2C_INIT_BOARD
50 	u32 icr;
51 	/*
52 	 * call board specific i2c bus reset routine before accessing the
53 	 * environment, which might be in a chip on that bus. For details
54 	 * about this problem see doc/I2C_Edge_Conditions.
55 	 *
56 	 * disable I2C controller first, otherwhise it thinks we want to
57 	 * talk to the slave port...
58 	 */
59 	icr = readl(&base->icr);
60 	writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
61 
62 	i2c_init_board();
63 
64 	writel(icr, &base->icr);
65 #endif
66 }
67 
68 #ifdef CONFIG_I2C_MULTI_BUS
69 static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
70 static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
71 static unsigned int current_bus;
72 
73 int i2c_set_bus_num(unsigned int bus)
74 {
75 	if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
76 		printf("Bad bus: %d\n", bus);
77 		return -1;
78 	}
79 
80 	base = (struct mv_i2c *)i2c_regs[bus];
81 	current_bus = bus;
82 
83 	if (!bus_initialized[current_bus]) {
84 		i2c_board_init(base);
85 		bus_initialized[current_bus] = 1;
86 	}
87 
88 	return 0;
89 }
90 
91 unsigned int i2c_get_bus_num(void)
92 {
93 	return current_bus;
94 }
95 #endif
96 
97 /*
98  * i2c_reset: - reset the host controller
99  *
100  */
101 static void i2c_reset(void)
102 {
103 	writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
104 	writel(readl(&base->icr) | ICR_UR, &base->icr);	  /* reset the unit */
105 	udelay(100);
106 	writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
107 
108 	i2c_clk_enable();
109 
110 	writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
111 	writel(I2C_ICR_INIT, &base->icr); /* set control reg values */
112 	writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
113 	writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
114 	udelay(100);
115 }
116 
117 /*
118  * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
119  *	                  are set and cleared
120  *
121  * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
122  */
123 static int i2c_isr_set_cleared(unsigned long set_mask,
124 			       unsigned long cleared_mask)
125 {
126 	int timeout = 1000, isr;
127 
128 	do {
129 		isr = readl(&base->isr);
130 		udelay(10);
131 		if (timeout-- < 0)
132 			return 0;
133 	} while (((isr & set_mask) != set_mask)
134 		|| ((isr & cleared_mask) != 0));
135 
136 	return 1;
137 }
138 
139 /*
140  * i2c_transfer: - Transfer one byte over the i2c bus
141  *
142  * This function can tranfer a byte over the i2c bus in both directions.
143  * It is used by the public API functions.
144  *
145  * @return:  0: transfer successful
146  *          -1: message is empty
147  *          -2: transmit timeout
148  *          -3: ACK missing
149  *          -4: receive timeout
150  *          -5: illegal parameters
151  *          -6: bus is busy and couldn't be aquired
152  */
153 int i2c_transfer(struct mv_i2c_msg *msg)
154 {
155 	int ret;
156 
157 	if (!msg)
158 		goto transfer_error_msg_empty;
159 
160 	switch (msg->direction) {
161 	case I2C_WRITE:
162 		/* check if bus is not busy */
163 		if (!i2c_isr_set_cleared(0, ISR_IBB))
164 			goto transfer_error_bus_busy;
165 
166 		/* start transmission */
167 		writel(readl(&base->icr) & ~ICR_START, &base->icr);
168 		writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
169 		writel(msg->data, &base->idbr);
170 		if (msg->condition == I2C_COND_START)
171 			writel(readl(&base->icr) | ICR_START, &base->icr);
172 		if (msg->condition == I2C_COND_STOP)
173 			writel(readl(&base->icr) | ICR_STOP, &base->icr);
174 		if (msg->acknack == I2C_ACKNAK_SENDNAK)
175 			writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
176 		if (msg->acknack == I2C_ACKNAK_SENDACK)
177 			writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
178 		writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
179 		writel(readl(&base->icr) | ICR_TB, &base->icr);
180 
181 		/* transmit register empty? */
182 		if (!i2c_isr_set_cleared(ISR_ITE, 0))
183 			goto transfer_error_transmit_timeout;
184 
185 		/* clear 'transmit empty' state */
186 		writel(readl(&base->isr) | ISR_ITE, &base->isr);
187 
188 		/* wait for ACK from slave */
189 		if (msg->acknack == I2C_ACKNAK_WAITACK)
190 			if (!i2c_isr_set_cleared(0, ISR_ACKNAK))
191 				goto transfer_error_ack_missing;
192 		break;
193 
194 	case I2C_READ:
195 
196 		/* check if bus is not busy */
197 		if (!i2c_isr_set_cleared(0, ISR_IBB))
198 			goto transfer_error_bus_busy;
199 
200 		/* start receive */
201 		writel(readl(&base->icr) & ~ICR_START, &base->icr);
202 		writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
203 		if (msg->condition == I2C_COND_START)
204 			writel(readl(&base->icr) | ICR_START, &base->icr);
205 		if (msg->condition == I2C_COND_STOP)
206 			writel(readl(&base->icr) | ICR_STOP, &base->icr);
207 		if (msg->acknack == I2C_ACKNAK_SENDNAK)
208 			writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
209 		if (msg->acknack == I2C_ACKNAK_SENDACK)
210 			writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
211 		writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
212 		writel(readl(&base->icr) | ICR_TB, &base->icr);
213 
214 		/* receive register full? */
215 		if (!i2c_isr_set_cleared(ISR_IRF, 0))
216 			goto transfer_error_receive_timeout;
217 
218 		msg->data = readl(&base->idbr);
219 
220 		/* clear 'receive empty' state */
221 		writel(readl(&base->isr) | ISR_IRF, &base->isr);
222 		break;
223 	default:
224 		goto transfer_error_illegal_param;
225 	}
226 
227 	return 0;
228 
229 transfer_error_msg_empty:
230 	debug("i2c_transfer: error: 'msg' is empty\n");
231 	ret = -1;
232 	goto i2c_transfer_finish;
233 
234 transfer_error_transmit_timeout:
235 	debug("i2c_transfer: error: transmit timeout\n");
236 	ret = -2;
237 	goto i2c_transfer_finish;
238 
239 transfer_error_ack_missing:
240 	debug("i2c_transfer: error: ACK missing\n");
241 	ret = -3;
242 	goto i2c_transfer_finish;
243 
244 transfer_error_receive_timeout:
245 	debug("i2c_transfer: error: receive timeout\n");
246 	ret = -4;
247 	goto i2c_transfer_finish;
248 
249 transfer_error_illegal_param:
250 	debug("i2c_transfer: error: illegal parameters\n");
251 	ret = -5;
252 	goto i2c_transfer_finish;
253 
254 transfer_error_bus_busy:
255 	debug("i2c_transfer: error: bus is busy\n");
256 	ret = -6;
257 	goto i2c_transfer_finish;
258 
259 i2c_transfer_finish:
260 	debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr));
261 	i2c_reset();
262 	return ret;
263 }
264 
265 /* ------------------------------------------------------------------------ */
266 /* API Functions                                                            */
267 /* ------------------------------------------------------------------------ */
268 void i2c_init(int speed, int slaveaddr)
269 {
270 #ifdef CONFIG_I2C_MULTI_BUS
271 	current_bus = 0;
272 	base = (struct mv_i2c *)i2c_regs[current_bus];
273 #else
274 	base = (struct mv_i2c *)CONFIG_MV_I2C_REG;
275 #endif
276 
277 	i2c_board_init(base);
278 }
279 
280 /*
281  * i2c_probe: - Test if a chip answers for a given i2c address
282  *
283  * @chip:	address of the chip which is searched for
284  * @return:	0 if a chip was found, -1 otherwhise
285  */
286 int i2c_probe(uchar chip)
287 {
288 	struct mv_i2c_msg msg;
289 
290 	i2c_reset();
291 
292 	msg.condition = I2C_COND_START;
293 	msg.acknack   = I2C_ACKNAK_WAITACK;
294 	msg.direction = I2C_WRITE;
295 	msg.data      = (chip << 1) + 1;
296 	if (i2c_transfer(&msg))
297 		return -1;
298 
299 	msg.condition = I2C_COND_STOP;
300 	msg.acknack   = I2C_ACKNAK_SENDNAK;
301 	msg.direction = I2C_READ;
302 	msg.data      = 0x00;
303 	if (i2c_transfer(&msg))
304 		return -1;
305 
306 	return 0;
307 }
308 
309 /*
310  * i2c_read: - Read multiple bytes from an i2c device
311  *
312  * The higher level routines take into account that this function is only
313  * called with len < page length of the device (see configuration file)
314  *
315  * @chip:	address of the chip which is to be read
316  * @addr:	i2c data address within the chip
317  * @alen:	length of the i2c data address (1..2 bytes)
318  * @buffer:	where to write the data
319  * @len:	how much byte do we want to read
320  * @return:	0 in case of success
321  */
322 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
323 {
324 	struct mv_i2c_msg msg;
325 	u8 addr_bytes[3]; /* lowest...highest byte of data address */
326 
327 	debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
328 	      "len=0x%02x)\n", chip, addr, alen, len);
329 
330 	i2c_reset();
331 
332 	/* dummy chip address write */
333 	debug("i2c_read: dummy chip address write\n");
334 	msg.condition = I2C_COND_START;
335 	msg.acknack   = I2C_ACKNAK_WAITACK;
336 	msg.direction = I2C_WRITE;
337 	msg.data = (chip << 1);
338 	msg.data &= 0xFE;
339 	if (i2c_transfer(&msg))
340 		return -1;
341 
342 	/*
343 	 * send memory address bytes;
344 	 * alen defines how much bytes we have to send.
345 	 */
346 	/*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */
347 	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
348 	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
349 	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
350 
351 	while (--alen >= 0) {
352 		debug("i2c_read: send memory word address byte %1d\n", alen);
353 		msg.condition = I2C_COND_NORMAL;
354 		msg.acknack   = I2C_ACKNAK_WAITACK;
355 		msg.direction = I2C_WRITE;
356 		msg.data      = addr_bytes[alen];
357 		if (i2c_transfer(&msg))
358 			return -1;
359 	}
360 
361 	/* start read sequence */
362 	debug("i2c_read: start read sequence\n");
363 	msg.condition = I2C_COND_START;
364 	msg.acknack   = I2C_ACKNAK_WAITACK;
365 	msg.direction = I2C_WRITE;
366 	msg.data      = (chip << 1);
367 	msg.data     |= 0x01;
368 	if (i2c_transfer(&msg))
369 		return -1;
370 
371 	/* read bytes; send NACK at last byte */
372 	while (len--) {
373 		if (len == 0) {
374 			msg.condition = I2C_COND_STOP;
375 			msg.acknack   = I2C_ACKNAK_SENDNAK;
376 		} else {
377 			msg.condition = I2C_COND_NORMAL;
378 			msg.acknack   = I2C_ACKNAK_SENDACK;
379 		}
380 
381 		msg.direction = I2C_READ;
382 		msg.data      = 0x00;
383 		if (i2c_transfer(&msg))
384 			return -1;
385 
386 		*buffer = msg.data;
387 		debug("i2c_read: reading byte (0x%08x)=0x%02x\n",
388 		      (unsigned int)buffer, *buffer);
389 		buffer++;
390 	}
391 
392 	i2c_reset();
393 
394 	return 0;
395 }
396 
397 /*
398  * i2c_write: -  Write multiple bytes to an i2c device
399  *
400  * The higher level routines take into account that this function is only
401  * called with len < page length of the device (see configuration file)
402  *
403  * @chip:	address of the chip which is to be written
404  * @addr:	i2c data address within the chip
405  * @alen:	length of the i2c data address (1..2 bytes)
406  * @buffer:	where to find the data to be written
407  * @len:	how much byte do we want to read
408  * @return:	0 in case of success
409  */
410 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
411 {
412 	struct mv_i2c_msg msg;
413 	u8 addr_bytes[3]; /* lowest...highest byte of data address */
414 
415 	debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
416 	      "len=0x%02x)\n", chip, addr, alen, len);
417 
418 	i2c_reset();
419 
420 	/* chip address write */
421 	debug("i2c_write: chip address write\n");
422 	msg.condition = I2C_COND_START;
423 	msg.acknack   = I2C_ACKNAK_WAITACK;
424 	msg.direction = I2C_WRITE;
425 	msg.data = (chip << 1);
426 	msg.data &= 0xFE;
427 	if (i2c_transfer(&msg))
428 		return -1;
429 
430 	/*
431 	 * send memory address bytes;
432 	 * alen defines how much bytes we have to send.
433 	 */
434 	addr_bytes[0] = (u8)((addr >>  0) & 0x000000FF);
435 	addr_bytes[1] = (u8)((addr >>  8) & 0x000000FF);
436 	addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF);
437 
438 	while (--alen >= 0) {
439 		debug("i2c_write: send memory word address\n");
440 		msg.condition = I2C_COND_NORMAL;
441 		msg.acknack   = I2C_ACKNAK_WAITACK;
442 		msg.direction = I2C_WRITE;
443 		msg.data      = addr_bytes[alen];
444 		if (i2c_transfer(&msg))
445 			return -1;
446 	}
447 
448 	/* write bytes; send NACK at last byte */
449 	while (len--) {
450 		debug("i2c_write: writing byte (0x%08x)=0x%02x\n",
451 		      (unsigned int)buffer, *buffer);
452 
453 		if (len == 0)
454 			msg.condition = I2C_COND_STOP;
455 		else
456 			msg.condition = I2C_COND_NORMAL;
457 
458 		msg.acknack   = I2C_ACKNAK_WAITACK;
459 		msg.direction = I2C_WRITE;
460 		msg.data      = *(buffer++);
461 
462 		if (i2c_transfer(&msg))
463 			return -1;
464 	}
465 
466 	i2c_reset();
467 
468 	return 0;
469 }
470