168432c27SLei Wen /* 268432c27SLei Wen * (C) Copyright 2000 368432c27SLei Wen * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it 468432c27SLei Wen * 568432c27SLei Wen * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com> 668432c27SLei Wen * Marius Groeger <mgroeger@sysgo.de> 768432c27SLei Wen * 868432c27SLei Wen * (C) Copyright 2003 Pengutronix e.K. 968432c27SLei Wen * Robert Schwebel <r.schwebel@pengutronix.de> 1068432c27SLei Wen * 11*3df619ecSLei Wen * (C) Copyright 2011 Marvell Inc. 12*3df619ecSLei Wen * Lei Wen <leiwen@marvell.com> 13*3df619ecSLei Wen * 1468432c27SLei Wen * See file CREDITS for list of people who contributed to this 1568432c27SLei Wen * project. 1668432c27SLei Wen * 1768432c27SLei Wen * This program is free software; you can redistribute it and/or 1868432c27SLei Wen * modify it under the terms of the GNU General Public License as 1968432c27SLei Wen * published by the Free Software Foundation; either version 2 of 2068432c27SLei Wen * the License, or (at your option) any later version. 2168432c27SLei Wen * 2268432c27SLei Wen * This program is distributed in the hope that it will be useful, 2368432c27SLei Wen * but WITHOUT ANY WARRANTY; without even the implied warranty of 2468432c27SLei Wen * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2568432c27SLei Wen * GNU General Public License for more details. 2668432c27SLei Wen * 2768432c27SLei Wen * You should have received a copy of the GNU General Public License 2868432c27SLei Wen * along with this program; if not, write to the Free Software 2968432c27SLei Wen * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 3068432c27SLei Wen * MA 02111-1307 USA 3168432c27SLei Wen * 3268432c27SLei Wen * Back ported to the 8xx platform (from the 8260 platform) by 3368432c27SLei Wen * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 3468432c27SLei Wen */ 3568432c27SLei Wen 3668432c27SLei Wen #include <common.h> 3768432c27SLei Wen #include <asm/io.h> 3868432c27SLei Wen 3968432c27SLei Wen #ifdef CONFIG_HARD_I2C 4068432c27SLei Wen #include <i2c.h> 41*3df619ecSLei Wen #include "mv_i2c.h" 4268432c27SLei Wen 4368432c27SLei Wen #ifdef DEBUG_I2C 4468432c27SLei Wen #define PRINTD(x) printf x 4568432c27SLei Wen #else 4668432c27SLei Wen #define PRINTD(x) 4768432c27SLei Wen #endif 4868432c27SLei Wen 4968432c27SLei Wen /* All transfers are described by this data structure */ 5068432c27SLei Wen struct i2c_msg { 5168432c27SLei Wen u8 condition; 5268432c27SLei Wen u8 acknack; 5368432c27SLei Wen u8 direction; 5468432c27SLei Wen u8 data; 5568432c27SLei Wen }; 5668432c27SLei Wen 57*3df619ecSLei Wen struct mv_i2c { 58*3df619ecSLei Wen u32 ibmr; 59*3df619ecSLei Wen u32 pad0; 60*3df619ecSLei Wen u32 idbr; 61*3df619ecSLei Wen u32 pad1; 62*3df619ecSLei Wen u32 icr; 63*3df619ecSLei Wen u32 pad2; 64*3df619ecSLei Wen u32 isr; 65*3df619ecSLei Wen u32 pad3; 66*3df619ecSLei Wen u32 isar; 67*3df619ecSLei Wen }; 68*3df619ecSLei Wen 69*3df619ecSLei Wen static struct mv_i2c *base = (struct mv_i2c *)CONFIG_MV_I2C_REG; 70*3df619ecSLei Wen 7168432c27SLei Wen /* 72*3df619ecSLei Wen * i2c_reset: - reset the host controller 7368432c27SLei Wen * 7468432c27SLei Wen */ 7568432c27SLei Wen static void i2c_reset(void) 7668432c27SLei Wen { 77*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 78*3df619ecSLei Wen writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */ 7968432c27SLei Wen udelay(100); 80*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ 81*3df619ecSLei Wen 82*3df619ecSLei Wen i2c_clk_enable(); 83*3df619ecSLei Wen 84*3df619ecSLei Wen writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */ 85*3df619ecSLei Wen writel(I2C_ICR_INIT, &base->icr); /* set control reg values */ 86*3df619ecSLei Wen writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */ 87*3df619ecSLei Wen writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ 8868432c27SLei Wen udelay(100); 8968432c27SLei Wen } 9068432c27SLei Wen 9168432c27SLei Wen /* 9268432c27SLei Wen * i2c_isr_set_cleared: - wait until certain bits of the I2C status register 9368432c27SLei Wen * are set and cleared 9468432c27SLei Wen * 9568432c27SLei Wen * @return: 1 in case of success, 0 means timeout (no match within 10 ms). 9668432c27SLei Wen */ 9768432c27SLei Wen static int i2c_isr_set_cleared(unsigned long set_mask, 9868432c27SLei Wen unsigned long cleared_mask) 9968432c27SLei Wen { 100*3df619ecSLei Wen int timeout = 1000, isr; 10168432c27SLei Wen 102*3df619ecSLei Wen do { 103*3df619ecSLei Wen isr = readl(&base->isr); 10468432c27SLei Wen udelay(10); 10568432c27SLei Wen if (timeout-- < 0) 10668432c27SLei Wen return 0; 107*3df619ecSLei Wen } while (((isr & set_mask) != set_mask) 108*3df619ecSLei Wen || ((isr & cleared_mask) != 0)); 10968432c27SLei Wen 11068432c27SLei Wen return 1; 11168432c27SLei Wen } 11268432c27SLei Wen 11368432c27SLei Wen /* 11468432c27SLei Wen * i2c_transfer: - Transfer one byte over the i2c bus 11568432c27SLei Wen * 11668432c27SLei Wen * This function can tranfer a byte over the i2c bus in both directions. 11768432c27SLei Wen * It is used by the public API functions. 11868432c27SLei Wen * 11968432c27SLei Wen * @return: 0: transfer successful 12068432c27SLei Wen * -1: message is empty 12168432c27SLei Wen * -2: transmit timeout 12268432c27SLei Wen * -3: ACK missing 12368432c27SLei Wen * -4: receive timeout 12468432c27SLei Wen * -5: illegal parameters 12568432c27SLei Wen * -6: bus is busy and couldn't be aquired 12668432c27SLei Wen */ 12768432c27SLei Wen int i2c_transfer(struct i2c_msg *msg) 12868432c27SLei Wen { 12968432c27SLei Wen int ret; 13068432c27SLei Wen 13168432c27SLei Wen if (!msg) 13268432c27SLei Wen goto transfer_error_msg_empty; 13368432c27SLei Wen 13468432c27SLei Wen switch (msg->direction) { 13568432c27SLei Wen case I2C_WRITE: 13668432c27SLei Wen /* check if bus is not busy */ 13768432c27SLei Wen if (!i2c_isr_set_cleared(0, ISR_IBB)) 13868432c27SLei Wen goto transfer_error_bus_busy; 13968432c27SLei Wen 14068432c27SLei Wen /* start transmission */ 141*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_START, &base->icr); 142*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 143*3df619ecSLei Wen writel(msg->data, &base->idbr); 14468432c27SLei Wen if (msg->condition == I2C_COND_START) 145*3df619ecSLei Wen writel(readl(&base->icr) | ICR_START, &base->icr); 14668432c27SLei Wen if (msg->condition == I2C_COND_STOP) 147*3df619ecSLei Wen writel(readl(&base->icr) | ICR_STOP, &base->icr); 14868432c27SLei Wen if (msg->acknack == I2C_ACKNAK_SENDNAK) 149*3df619ecSLei Wen writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 15068432c27SLei Wen if (msg->acknack == I2C_ACKNAK_SENDACK) 151*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 152*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 153*3df619ecSLei Wen writel(readl(&base->icr) | ICR_TB, &base->icr); 15468432c27SLei Wen 15568432c27SLei Wen /* transmit register empty? */ 15668432c27SLei Wen if (!i2c_isr_set_cleared(ISR_ITE, 0)) 15768432c27SLei Wen goto transfer_error_transmit_timeout; 15868432c27SLei Wen 15968432c27SLei Wen /* clear 'transmit empty' state */ 160*3df619ecSLei Wen writel(readl(&base->isr) | ISR_ITE, &base->isr); 16168432c27SLei Wen 16268432c27SLei Wen /* wait for ACK from slave */ 16368432c27SLei Wen if (msg->acknack == I2C_ACKNAK_WAITACK) 16468432c27SLei Wen if (!i2c_isr_set_cleared(0, ISR_ACKNAK)) 16568432c27SLei Wen goto transfer_error_ack_missing; 16668432c27SLei Wen break; 16768432c27SLei Wen 16868432c27SLei Wen case I2C_READ: 16968432c27SLei Wen 17068432c27SLei Wen /* check if bus is not busy */ 17168432c27SLei Wen if (!i2c_isr_set_cleared(0, ISR_IBB)) 17268432c27SLei Wen goto transfer_error_bus_busy; 17368432c27SLei Wen 17468432c27SLei Wen /* start receive */ 175*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_START, &base->icr); 176*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_STOP, &base->icr); 17768432c27SLei Wen if (msg->condition == I2C_COND_START) 178*3df619ecSLei Wen writel(readl(&base->icr) | ICR_START, &base->icr); 17968432c27SLei Wen if (msg->condition == I2C_COND_STOP) 180*3df619ecSLei Wen writel(readl(&base->icr) | ICR_STOP, &base->icr); 18168432c27SLei Wen if (msg->acknack == I2C_ACKNAK_SENDNAK) 182*3df619ecSLei Wen writel(readl(&base->icr) | ICR_ACKNAK, &base->icr); 18368432c27SLei Wen if (msg->acknack == I2C_ACKNAK_SENDACK) 184*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr); 185*3df619ecSLei Wen writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr); 186*3df619ecSLei Wen writel(readl(&base->icr) | ICR_TB, &base->icr); 18768432c27SLei Wen 18868432c27SLei Wen /* receive register full? */ 18968432c27SLei Wen if (!i2c_isr_set_cleared(ISR_IRF, 0)) 19068432c27SLei Wen goto transfer_error_receive_timeout; 19168432c27SLei Wen 192*3df619ecSLei Wen msg->data = readl(&base->idbr); 19368432c27SLei Wen 19468432c27SLei Wen /* clear 'receive empty' state */ 195*3df619ecSLei Wen writel(readl(&base->isr) | ISR_IRF, &base->isr); 19668432c27SLei Wen break; 19768432c27SLei Wen default: 19868432c27SLei Wen goto transfer_error_illegal_param; 19968432c27SLei Wen } 20068432c27SLei Wen 20168432c27SLei Wen return 0; 20268432c27SLei Wen 20368432c27SLei Wen transfer_error_msg_empty: 20468432c27SLei Wen PRINTD(("i2c_transfer: error: 'msg' is empty\n")); 20568432c27SLei Wen ret = -1; goto i2c_transfer_finish; 20668432c27SLei Wen 20768432c27SLei Wen transfer_error_transmit_timeout: 20868432c27SLei Wen PRINTD(("i2c_transfer: error: transmit timeout\n")); 20968432c27SLei Wen ret = -2; goto i2c_transfer_finish; 21068432c27SLei Wen 21168432c27SLei Wen transfer_error_ack_missing: 21268432c27SLei Wen PRINTD(("i2c_transfer: error: ACK missing\n")); 21368432c27SLei Wen ret = -3; goto i2c_transfer_finish; 21468432c27SLei Wen 21568432c27SLei Wen transfer_error_receive_timeout: 21668432c27SLei Wen PRINTD(("i2c_transfer: error: receive timeout\n")); 21768432c27SLei Wen ret = -4; goto i2c_transfer_finish; 21868432c27SLei Wen 21968432c27SLei Wen transfer_error_illegal_param: 22068432c27SLei Wen PRINTD(("i2c_transfer: error: illegal parameters\n")); 22168432c27SLei Wen ret = -5; goto i2c_transfer_finish; 22268432c27SLei Wen 22368432c27SLei Wen transfer_error_bus_busy: 22468432c27SLei Wen PRINTD(("i2c_transfer: error: bus is busy\n")); 22568432c27SLei Wen ret = -6; goto i2c_transfer_finish; 22668432c27SLei Wen 22768432c27SLei Wen i2c_transfer_finish: 22868432c27SLei Wen PRINTD(("i2c_transfer: ISR: 0x%04x\n", ISR)); 22968432c27SLei Wen i2c_reset(); 23068432c27SLei Wen return ret; 23168432c27SLei Wen } 23268432c27SLei Wen 23368432c27SLei Wen /* ------------------------------------------------------------------------ */ 23468432c27SLei Wen /* API Functions */ 23568432c27SLei Wen /* ------------------------------------------------------------------------ */ 23668432c27SLei Wen void i2c_init(int speed, int slaveaddr) 23768432c27SLei Wen { 23868432c27SLei Wen #ifdef CONFIG_SYS_I2C_INIT_BOARD 239*3df619ecSLei Wen u32 icr; 240*3df619ecSLei Wen /* 241*3df619ecSLei Wen * call board specific i2c bus reset routine before accessing the 242*3df619ecSLei Wen * environment, which might be in a chip on that bus. For details 243*3df619ecSLei Wen * about this problem see doc/I2C_Edge_Conditions. 244*3df619ecSLei Wen * 245*3df619ecSLei Wen * disable I2C controller first, otherwhise it thinks we want to 246*3df619ecSLei Wen * talk to the slave port... 247*3df619ecSLei Wen */ 248*3df619ecSLei Wen icr = readl(&base->icr); 249*3df619ecSLei Wen writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr); 250*3df619ecSLei Wen 25168432c27SLei Wen i2c_init_board(); 252*3df619ecSLei Wen 253*3df619ecSLei Wen writel(icr, &base->icr); 25468432c27SLei Wen #endif 25568432c27SLei Wen } 25668432c27SLei Wen 25768432c27SLei Wen /* 25868432c27SLei Wen * i2c_probe: - Test if a chip answers for a given i2c address 25968432c27SLei Wen * 26068432c27SLei Wen * @chip: address of the chip which is searched for 26168432c27SLei Wen * @return: 0 if a chip was found, -1 otherwhise 26268432c27SLei Wen */ 26368432c27SLei Wen int i2c_probe(uchar chip) 26468432c27SLei Wen { 26568432c27SLei Wen struct i2c_msg msg; 26668432c27SLei Wen 26768432c27SLei Wen i2c_reset(); 26868432c27SLei Wen 26968432c27SLei Wen msg.condition = I2C_COND_START; 27068432c27SLei Wen msg.acknack = I2C_ACKNAK_WAITACK; 27168432c27SLei Wen msg.direction = I2C_WRITE; 27268432c27SLei Wen msg.data = (chip << 1) + 1; 27368432c27SLei Wen if (i2c_transfer(&msg)) 27468432c27SLei Wen return -1; 27568432c27SLei Wen 27668432c27SLei Wen msg.condition = I2C_COND_STOP; 27768432c27SLei Wen msg.acknack = I2C_ACKNAK_SENDNAK; 27868432c27SLei Wen msg.direction = I2C_READ; 27968432c27SLei Wen msg.data = 0x00; 28068432c27SLei Wen if (i2c_transfer(&msg)) 28168432c27SLei Wen return -1; 28268432c27SLei Wen 28368432c27SLei Wen return 0; 28468432c27SLei Wen } 28568432c27SLei Wen 28668432c27SLei Wen /* 28768432c27SLei Wen * i2c_read: - Read multiple bytes from an i2c device 28868432c27SLei Wen * 28968432c27SLei Wen * The higher level routines take into account that this function is only 29068432c27SLei Wen * called with len < page length of the device (see configuration file) 29168432c27SLei Wen * 29268432c27SLei Wen * @chip: address of the chip which is to be read 29368432c27SLei Wen * @addr: i2c data address within the chip 29468432c27SLei Wen * @alen: length of the i2c data address (1..2 bytes) 29568432c27SLei Wen * @buffer: where to write the data 29668432c27SLei Wen * @len: how much byte do we want to read 29768432c27SLei Wen * @return: 0 in case of success 29868432c27SLei Wen */ 29968432c27SLei Wen int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) 30068432c27SLei Wen { 30168432c27SLei Wen struct i2c_msg msg; 30268432c27SLei Wen u8 addr_bytes[3]; /* lowest...highest byte of data address */ 30368432c27SLei Wen 30468432c27SLei Wen PRINTD(("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 30568432c27SLei Wen "len=0x%02x)\n", chip, addr, alen, len)); 30668432c27SLei Wen 30768432c27SLei Wen i2c_reset(); 30868432c27SLei Wen 30968432c27SLei Wen /* dummy chip address write */ 31068432c27SLei Wen PRINTD(("i2c_read: dummy chip address write\n")); 31168432c27SLei Wen msg.condition = I2C_COND_START; 31268432c27SLei Wen msg.acknack = I2C_ACKNAK_WAITACK; 31368432c27SLei Wen msg.direction = I2C_WRITE; 31468432c27SLei Wen msg.data = (chip << 1); 31568432c27SLei Wen msg.data &= 0xFE; 31668432c27SLei Wen if (i2c_transfer(&msg)) 31768432c27SLei Wen return -1; 31868432c27SLei Wen 31968432c27SLei Wen /* 32068432c27SLei Wen * send memory address bytes; 32168432c27SLei Wen * alen defines how much bytes we have to send. 32268432c27SLei Wen */ 32368432c27SLei Wen /*addr &= ((1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)-1); */ 32468432c27SLei Wen addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 32568432c27SLei Wen addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 32668432c27SLei Wen addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 32768432c27SLei Wen 32868432c27SLei Wen while (--alen >= 0) { 32968432c27SLei Wen PRINTD(("i2c_read: send memory word address byte %1d\n", alen)); 33068432c27SLei Wen msg.condition = I2C_COND_NORMAL; 33168432c27SLei Wen msg.acknack = I2C_ACKNAK_WAITACK; 33268432c27SLei Wen msg.direction = I2C_WRITE; 33368432c27SLei Wen msg.data = addr_bytes[alen]; 33468432c27SLei Wen if (i2c_transfer(&msg)) 33568432c27SLei Wen return -1; 33668432c27SLei Wen } 33768432c27SLei Wen 33868432c27SLei Wen /* start read sequence */ 33968432c27SLei Wen PRINTD(("i2c_read: start read sequence\n")); 34068432c27SLei Wen msg.condition = I2C_COND_START; 34168432c27SLei Wen msg.acknack = I2C_ACKNAK_WAITACK; 34268432c27SLei Wen msg.direction = I2C_WRITE; 34368432c27SLei Wen msg.data = (chip << 1); 34468432c27SLei Wen msg.data |= 0x01; 34568432c27SLei Wen if (i2c_transfer(&msg)) 34668432c27SLei Wen return -1; 34768432c27SLei Wen 34868432c27SLei Wen /* read bytes; send NACK at last byte */ 34968432c27SLei Wen while (len--) { 35068432c27SLei Wen if (len == 0) { 35168432c27SLei Wen msg.condition = I2C_COND_STOP; 35268432c27SLei Wen msg.acknack = I2C_ACKNAK_SENDNAK; 35368432c27SLei Wen } else { 35468432c27SLei Wen msg.condition = I2C_COND_NORMAL; 35568432c27SLei Wen msg.acknack = I2C_ACKNAK_SENDACK; 35668432c27SLei Wen } 35768432c27SLei Wen 35868432c27SLei Wen msg.direction = I2C_READ; 35968432c27SLei Wen msg.data = 0x00; 36068432c27SLei Wen if (i2c_transfer(&msg)) 36168432c27SLei Wen return -1; 36268432c27SLei Wen 36368432c27SLei Wen *buffer = msg.data; 36468432c27SLei Wen PRINTD(("i2c_read: reading byte (0x%08x)=0x%02x\n", 36568432c27SLei Wen (unsigned int)buffer, *buffer)); 36668432c27SLei Wen buffer++; 36768432c27SLei Wen } 36868432c27SLei Wen 36968432c27SLei Wen i2c_reset(); 37068432c27SLei Wen 37168432c27SLei Wen return 0; 37268432c27SLei Wen } 37368432c27SLei Wen 37468432c27SLei Wen /* 37568432c27SLei Wen * i2c_write: - Write multiple bytes to an i2c device 37668432c27SLei Wen * 37768432c27SLei Wen * The higher level routines take into account that this function is only 37868432c27SLei Wen * called with len < page length of the device (see configuration file) 37968432c27SLei Wen * 38068432c27SLei Wen * @chip: address of the chip which is to be written 38168432c27SLei Wen * @addr: i2c data address within the chip 38268432c27SLei Wen * @alen: length of the i2c data address (1..2 bytes) 38368432c27SLei Wen * @buffer: where to find the data to be written 38468432c27SLei Wen * @len: how much byte do we want to read 38568432c27SLei Wen * @return: 0 in case of success 38668432c27SLei Wen */ 38768432c27SLei Wen int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) 38868432c27SLei Wen { 38968432c27SLei Wen struct i2c_msg msg; 39068432c27SLei Wen u8 addr_bytes[3]; /* lowest...highest byte of data address */ 39168432c27SLei Wen 39268432c27SLei Wen PRINTD(("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, " 39368432c27SLei Wen "len=0x%02x)\n", chip, addr, alen, len)); 39468432c27SLei Wen 39568432c27SLei Wen i2c_reset(); 39668432c27SLei Wen 39768432c27SLei Wen /* chip address write */ 39868432c27SLei Wen PRINTD(("i2c_write: chip address write\n")); 39968432c27SLei Wen msg.condition = I2C_COND_START; 40068432c27SLei Wen msg.acknack = I2C_ACKNAK_WAITACK; 40168432c27SLei Wen msg.direction = I2C_WRITE; 40268432c27SLei Wen msg.data = (chip << 1); 40368432c27SLei Wen msg.data &= 0xFE; 40468432c27SLei Wen if (i2c_transfer(&msg)) 40568432c27SLei Wen return -1; 40668432c27SLei Wen 40768432c27SLei Wen /* 40868432c27SLei Wen * send memory address bytes; 40968432c27SLei Wen * alen defines how much bytes we have to send. 41068432c27SLei Wen */ 41168432c27SLei Wen addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); 41268432c27SLei Wen addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); 41368432c27SLei Wen addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); 41468432c27SLei Wen 41568432c27SLei Wen while (--alen >= 0) { 41668432c27SLei Wen PRINTD(("i2c_write: send memory word address\n")); 41768432c27SLei Wen msg.condition = I2C_COND_NORMAL; 41868432c27SLei Wen msg.acknack = I2C_ACKNAK_WAITACK; 41968432c27SLei Wen msg.direction = I2C_WRITE; 42068432c27SLei Wen msg.data = addr_bytes[alen]; 42168432c27SLei Wen if (i2c_transfer(&msg)) 42268432c27SLei Wen return -1; 42368432c27SLei Wen } 42468432c27SLei Wen 42568432c27SLei Wen /* write bytes; send NACK at last byte */ 42668432c27SLei Wen while (len--) { 42768432c27SLei Wen PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n", 42868432c27SLei Wen (unsigned int)buffer, *buffer)); 42968432c27SLei Wen 43068432c27SLei Wen if (len == 0) 43168432c27SLei Wen msg.condition = I2C_COND_STOP; 43268432c27SLei Wen else 43368432c27SLei Wen msg.condition = I2C_COND_NORMAL; 43468432c27SLei Wen 43568432c27SLei Wen msg.acknack = I2C_ACKNAK_WAITACK; 43668432c27SLei Wen msg.direction = I2C_WRITE; 43768432c27SLei Wen msg.data = *(buffer++); 43868432c27SLei Wen 43968432c27SLei Wen if (i2c_transfer(&msg)) 44068432c27SLei Wen return -1; 44168432c27SLei Wen } 44268432c27SLei Wen 44368432c27SLei Wen i2c_reset(); 44468432c27SLei Wen 44568432c27SLei Wen return 0; 44668432c27SLei Wen } 44768432c27SLei Wen #endif /* CONFIG_HARD_I2C */ 448