1 /* 2 * Faraday I2C Controller 3 * 4 * (C) Copyright 2010 Faraday Technology 5 * Dante Su <dantesu@faraday-tech.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #include <common.h> 11 #include <asm/io.h> 12 #include <i2c.h> 13 14 #include "fti2c010.h" 15 16 #ifndef CONFIG_SYS_I2C_SPEED 17 #define CONFIG_SYS_I2C_SPEED 5000 18 #endif 19 20 #ifndef CONFIG_SYS_I2C_SLAVE 21 #define CONFIG_SYS_I2C_SLAVE 0 22 #endif 23 24 #ifndef CONFIG_FTI2C010_CLOCK 25 #define CONFIG_FTI2C010_CLOCK clk_get_rate("I2C") 26 #endif 27 28 #ifndef CONFIG_FTI2C010_TIMEOUT 29 #define CONFIG_FTI2C010_TIMEOUT 10 /* ms */ 30 #endif 31 32 /* 7-bit dev address + 1-bit read/write */ 33 #define I2C_RD(dev) ((((dev) << 1) & 0xfe) | 1) 34 #define I2C_WR(dev) (((dev) << 1) & 0xfe) 35 36 struct fti2c010_chip { 37 struct fti2c010_regs *regs; 38 }; 39 40 static struct fti2c010_chip chip_list[] = { 41 { 42 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE, 43 }, 44 #ifdef CONFIG_FTI2C010_BASE1 45 { 46 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE1, 47 }, 48 #endif 49 #ifdef CONFIG_FTI2C010_BASE2 50 { 51 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE2, 52 }, 53 #endif 54 #ifdef CONFIG_FTI2C010_BASE3 55 { 56 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE3, 57 }, 58 #endif 59 }; 60 61 static int fti2c010_reset(struct fti2c010_chip *chip) 62 { 63 ulong ts; 64 int ret = -1; 65 struct fti2c010_regs *regs = chip->regs; 66 67 writel(CR_I2CRST, ®s->cr); 68 for (ts = get_timer(0); get_timer(ts) < CONFIG_FTI2C010_TIMEOUT; ) { 69 if (!(readl(®s->cr) & CR_I2CRST)) { 70 ret = 0; 71 break; 72 } 73 } 74 75 if (ret) 76 printf("fti2c010: reset timeout\n"); 77 78 return ret; 79 } 80 81 static int fti2c010_wait(struct fti2c010_chip *chip, uint32_t mask) 82 { 83 int ret = -1; 84 uint32_t stat, ts; 85 struct fti2c010_regs *regs = chip->regs; 86 87 for (ts = get_timer(0); get_timer(ts) < CONFIG_FTI2C010_TIMEOUT; ) { 88 stat = readl(®s->sr); 89 if ((stat & mask) == mask) { 90 ret = 0; 91 break; 92 } 93 } 94 95 return ret; 96 } 97 98 static unsigned int set_i2c_bus_speed(struct fti2c010_chip *chip, 99 unsigned int speed) 100 { 101 struct fti2c010_regs *regs = chip->regs; 102 unsigned int clk = CONFIG_FTI2C010_CLOCK; 103 unsigned int gsr = 0; 104 unsigned int tsr = 32; 105 unsigned int div, rate; 106 107 for (div = 0; div < 0x3ffff; ++div) { 108 /* SCLout = PCLK/(2*(COUNT + 2) + GSR) */ 109 rate = clk / (2 * (div + 2) + gsr); 110 if (rate <= speed) 111 break; 112 } 113 114 writel(TGSR_GSR(gsr) | TGSR_TSR(tsr), ®s->tgsr); 115 writel(CDR_DIV(div), ®s->cdr); 116 117 return rate; 118 } 119 120 /* 121 * Initialization, must be called once on start up, may be called 122 * repeatedly to change the speed and slave addresses. 123 */ 124 static void fti2c010_init(struct i2c_adapter *adap, int speed, int slaveaddr) 125 { 126 struct fti2c010_chip *chip = chip_list + adap->hwadapnr; 127 128 if (adap->init_done) 129 return; 130 131 #ifdef CONFIG_SYS_I2C_INIT_BOARD 132 /* Call board specific i2c bus reset routine before accessing the 133 * environment, which might be in a chip on that bus. For details 134 * about this problem see doc/I2C_Edge_Conditions. 135 */ 136 i2c_init_board(); 137 #endif 138 139 /* master init */ 140 141 fti2c010_reset(chip); 142 143 set_i2c_bus_speed(chip, speed); 144 145 /* slave init, don't care */ 146 147 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT 148 /* Call board specific i2c bus reset routine AFTER the bus has been 149 * initialized. Use either this callpoint or i2c_init_board; 150 * which is called before fti2c010_init operations. 151 * For details about this problem see doc/I2C_Edge_Conditions. 152 */ 153 i2c_board_late_init(); 154 #endif 155 } 156 157 /* 158 * Probe the given I2C chip address. Returns 0 if a chip responded, 159 * not 0 on failure. 160 */ 161 static int fti2c010_probe(struct i2c_adapter *adap, u8 dev) 162 { 163 struct fti2c010_chip *chip = chip_list + adap->hwadapnr; 164 struct fti2c010_regs *regs = chip->regs; 165 int ret; 166 167 /* 1. Select slave device (7bits Address + 1bit R/W) */ 168 writel(I2C_WR(dev), ®s->dr); 169 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr); 170 ret = fti2c010_wait(chip, SR_DT); 171 if (ret) 172 return ret; 173 174 /* 2. Select device register */ 175 writel(0, ®s->dr); 176 writel(CR_ENABLE | CR_TBEN, ®s->cr); 177 ret = fti2c010_wait(chip, SR_DT); 178 179 return ret; 180 } 181 182 static int fti2c010_read(struct i2c_adapter *adap, 183 u8 dev, uint addr, int alen, uchar *buf, int len) 184 { 185 struct fti2c010_chip *chip = chip_list + adap->hwadapnr; 186 struct fti2c010_regs *regs = chip->regs; 187 int ret, pos; 188 uchar paddr[4]; 189 190 paddr[0] = (addr >> 0) & 0xFF; 191 paddr[1] = (addr >> 8) & 0xFF; 192 paddr[2] = (addr >> 16) & 0xFF; 193 paddr[3] = (addr >> 24) & 0xFF; 194 195 /* 196 * Phase A. Set register address 197 */ 198 199 /* A.1 Select slave device (7bits Address + 1bit R/W) */ 200 writel(I2C_WR(dev), ®s->dr); 201 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr); 202 ret = fti2c010_wait(chip, SR_DT); 203 if (ret) 204 return ret; 205 206 /* A.2 Select device register */ 207 for (pos = 0; pos < alen; ++pos) { 208 uint32_t ctrl = CR_ENABLE | CR_TBEN; 209 210 writel(paddr[pos], ®s->dr); 211 writel(ctrl, ®s->cr); 212 ret = fti2c010_wait(chip, SR_DT); 213 if (ret) 214 return ret; 215 } 216 217 /* 218 * Phase B. Get register data 219 */ 220 221 /* B.1 Select slave device (7bits Address + 1bit R/W) */ 222 writel(I2C_RD(dev), ®s->dr); 223 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr); 224 ret = fti2c010_wait(chip, SR_DT); 225 if (ret) 226 return ret; 227 228 /* B.2 Get register data */ 229 for (pos = 0; pos < len; ++pos) { 230 uint32_t ctrl = CR_ENABLE | CR_TBEN; 231 uint32_t stat = SR_DR; 232 233 if (pos == len - 1) { 234 ctrl |= CR_NAK | CR_STOP; 235 stat |= SR_ACK; 236 } 237 writel(ctrl, ®s->cr); 238 ret = fti2c010_wait(chip, stat); 239 if (ret) 240 break; 241 buf[pos] = (uchar)(readl(®s->dr) & 0xFF); 242 } 243 244 return ret; 245 } 246 247 static int fti2c010_write(struct i2c_adapter *adap, 248 u8 dev, uint addr, int alen, u8 *buf, int len) 249 { 250 struct fti2c010_chip *chip = chip_list + adap->hwadapnr; 251 struct fti2c010_regs *regs = chip->regs; 252 int ret, pos; 253 uchar paddr[4]; 254 255 paddr[0] = (addr >> 0) & 0xFF; 256 paddr[1] = (addr >> 8) & 0xFF; 257 paddr[2] = (addr >> 16) & 0xFF; 258 paddr[3] = (addr >> 24) & 0xFF; 259 260 /* 261 * Phase A. Set register address 262 * 263 * A.1 Select slave device (7bits Address + 1bit R/W) 264 */ 265 writel(I2C_WR(dev), ®s->dr); 266 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr); 267 ret = fti2c010_wait(chip, SR_DT); 268 if (ret) 269 return ret; 270 271 /* A.2 Select device register */ 272 for (pos = 0; pos < alen; ++pos) { 273 uint32_t ctrl = CR_ENABLE | CR_TBEN; 274 275 writel(paddr[pos], ®s->dr); 276 writel(ctrl, ®s->cr); 277 ret = fti2c010_wait(chip, SR_DT); 278 if (ret) 279 return ret; 280 } 281 282 /* 283 * Phase B. Set register data 284 */ 285 for (pos = 0; pos < len; ++pos) { 286 uint32_t ctrl = CR_ENABLE | CR_TBEN; 287 288 if (pos == len - 1) 289 ctrl |= CR_STOP; 290 writel(buf[pos], ®s->dr); 291 writel(ctrl, ®s->cr); 292 ret = fti2c010_wait(chip, SR_DT); 293 if (ret) 294 break; 295 } 296 297 return ret; 298 } 299 300 static unsigned int fti2c010_set_bus_speed(struct i2c_adapter *adap, 301 unsigned int speed) 302 { 303 struct fti2c010_chip *chip = chip_list + adap->hwadapnr; 304 int ret; 305 306 fti2c010_reset(chip); 307 ret = set_i2c_bus_speed(chip, speed); 308 309 return ret; 310 } 311 312 /* 313 * Register i2c adapters 314 */ 315 U_BOOT_I2C_ADAP_COMPLETE(i2c_0, fti2c010_init, fti2c010_probe, fti2c010_read, 316 fti2c010_write, fti2c010_set_bus_speed, 317 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 318 0) 319 #ifdef CONFIG_FTI2C010_BASE1 320 U_BOOT_I2C_ADAP_COMPLETE(i2c_1, fti2c010_init, fti2c010_probe, fti2c010_read, 321 fti2c010_write, fti2c010_set_bus_speed, 322 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 323 1) 324 #endif 325 #ifdef CONFIG_FTI2C010_BASE2 326 U_BOOT_I2C_ADAP_COMPLETE(i2c_2, fti2c010_init, fti2c010_probe, fti2c010_read, 327 fti2c010_write, fti2c010_set_bus_speed, 328 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 329 2) 330 #endif 331 #ifdef CONFIG_FTI2C010_BASE3 332 U_BOOT_I2C_ADAP_COMPLETE(i2c_3, fti2c010_init, fti2c010_probe, fti2c010_read, 333 fti2c010_write, fti2c010_set_bus_speed, 334 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 335 3) 336 #endif 337