1*4dc038f3Smaxims@google.com /* 2*4dc038f3Smaxims@google.com * Copyright (C) 2012-2020 ASPEED Technology Inc. 3*4dc038f3Smaxims@google.com * Copyright 2016 IBM Corporation 4*4dc038f3Smaxims@google.com * Copyright 2017 Google, Inc. 5*4dc038f3Smaxims@google.com * 6*4dc038f3Smaxims@google.com * SPDX-License-Identifier: GPL-2.0+ 7*4dc038f3Smaxims@google.com */ 8*4dc038f3Smaxims@google.com 9*4dc038f3Smaxims@google.com #include <common.h> 10*4dc038f3Smaxims@google.com #include <clk.h> 11*4dc038f3Smaxims@google.com #include <dm.h> 12*4dc038f3Smaxims@google.com #include <errno.h> 13*4dc038f3Smaxims@google.com #include <fdtdec.h> 14*4dc038f3Smaxims@google.com #include <i2c.h> 15*4dc038f3Smaxims@google.com #include <asm/io.h> 16*4dc038f3Smaxims@google.com #include <asm/arch/scu_ast2500.h> 17*4dc038f3Smaxims@google.com 18*4dc038f3Smaxims@google.com #include "ast_i2c.h" 19*4dc038f3Smaxims@google.com 20*4dc038f3Smaxims@google.com #define I2C_TIMEOUT_US 100000 21*4dc038f3Smaxims@google.com #define I2C_SLEEP_STEP_US 20 22*4dc038f3Smaxims@google.com 23*4dc038f3Smaxims@google.com #define HIGHSPEED_TTIMEOUT 3 24*4dc038f3Smaxims@google.com 25*4dc038f3Smaxims@google.com DECLARE_GLOBAL_DATA_PTR; 26*4dc038f3Smaxims@google.com 27*4dc038f3Smaxims@google.com /* 28*4dc038f3Smaxims@google.com * Device private data 29*4dc038f3Smaxims@google.com */ 30*4dc038f3Smaxims@google.com struct ast_i2c_priv { 31*4dc038f3Smaxims@google.com /* This device's clock */ 32*4dc038f3Smaxims@google.com struct clk clk; 33*4dc038f3Smaxims@google.com /* Device registers */ 34*4dc038f3Smaxims@google.com struct ast_i2c_regs *regs; 35*4dc038f3Smaxims@google.com /* I2C speed in Hz */ 36*4dc038f3Smaxims@google.com int speed; 37*4dc038f3Smaxims@google.com }; 38*4dc038f3Smaxims@google.com 39*4dc038f3Smaxims@google.com /* 40*4dc038f3Smaxims@google.com * Given desired divider ratio, return the value that needs to be set 41*4dc038f3Smaxims@google.com * in Clock and AC Timing Control register 42*4dc038f3Smaxims@google.com */ 43*4dc038f3Smaxims@google.com static u32 get_clk_reg_val(ulong divider_ratio) 44*4dc038f3Smaxims@google.com { 45*4dc038f3Smaxims@google.com ulong inc = 0, div; 46*4dc038f3Smaxims@google.com ulong scl_low, scl_high, data; 47*4dc038f3Smaxims@google.com 48*4dc038f3Smaxims@google.com for (div = 0; divider_ratio >= 16; div++) { 49*4dc038f3Smaxims@google.com inc |= (divider_ratio & 1); 50*4dc038f3Smaxims@google.com divider_ratio >>= 1; 51*4dc038f3Smaxims@google.com } 52*4dc038f3Smaxims@google.com divider_ratio += inc; 53*4dc038f3Smaxims@google.com scl_low = (divider_ratio >> 1) - 1; 54*4dc038f3Smaxims@google.com scl_high = divider_ratio - scl_low - 2; 55*4dc038f3Smaxims@google.com data = I2CD_CACTC_BASE 56*4dc038f3Smaxims@google.com | (scl_high << I2CD_TCKHIGH_SHIFT) 57*4dc038f3Smaxims@google.com | (scl_low << I2CD_TCKLOW_SHIFT) 58*4dc038f3Smaxims@google.com | (div << I2CD_BASE_DIV_SHIFT); 59*4dc038f3Smaxims@google.com 60*4dc038f3Smaxims@google.com return data; 61*4dc038f3Smaxims@google.com } 62*4dc038f3Smaxims@google.com 63*4dc038f3Smaxims@google.com static void ast_i2c_clear_interrupts(struct udevice *dev) 64*4dc038f3Smaxims@google.com { 65*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 66*4dc038f3Smaxims@google.com 67*4dc038f3Smaxims@google.com writel(~0, &priv->regs->isr); 68*4dc038f3Smaxims@google.com } 69*4dc038f3Smaxims@google.com 70*4dc038f3Smaxims@google.com static void ast_i2c_init_bus(struct udevice *dev) 71*4dc038f3Smaxims@google.com { 72*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 73*4dc038f3Smaxims@google.com 74*4dc038f3Smaxims@google.com /* Reset device */ 75*4dc038f3Smaxims@google.com writel(0, &priv->regs->fcr); 76*4dc038f3Smaxims@google.com /* Enable Master Mode. Assuming single-master */ 77*4dc038f3Smaxims@google.com writel(I2CD_MASTER_EN 78*4dc038f3Smaxims@google.com | I2CD_M_SDA_LOCK_EN 79*4dc038f3Smaxims@google.com | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN, 80*4dc038f3Smaxims@google.com &priv->regs->fcr); 81*4dc038f3Smaxims@google.com /* Enable Interrupts */ 82*4dc038f3Smaxims@google.com writel(I2CD_INTR_TX_ACK 83*4dc038f3Smaxims@google.com | I2CD_INTR_TX_NAK 84*4dc038f3Smaxims@google.com | I2CD_INTR_RX_DONE 85*4dc038f3Smaxims@google.com | I2CD_INTR_BUS_RECOVER_DONE 86*4dc038f3Smaxims@google.com | I2CD_INTR_NORMAL_STOP 87*4dc038f3Smaxims@google.com | I2CD_INTR_ABNORMAL, &priv->regs->icr); 88*4dc038f3Smaxims@google.com } 89*4dc038f3Smaxims@google.com 90*4dc038f3Smaxims@google.com static int ast_i2c_ofdata_to_platdata(struct udevice *dev) 91*4dc038f3Smaxims@google.com { 92*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 93*4dc038f3Smaxims@google.com int ret; 94*4dc038f3Smaxims@google.com 95*4dc038f3Smaxims@google.com priv->regs = dev_get_addr_ptr(dev); 96*4dc038f3Smaxims@google.com if (IS_ERR(priv->regs)) 97*4dc038f3Smaxims@google.com return PTR_ERR(priv->regs); 98*4dc038f3Smaxims@google.com 99*4dc038f3Smaxims@google.com ret = clk_get_by_index(dev, 0, &priv->clk); 100*4dc038f3Smaxims@google.com if (ret < 0) { 101*4dc038f3Smaxims@google.com debug("%s: Can't get clock for %s: %d\n", __func__, dev->name, 102*4dc038f3Smaxims@google.com ret); 103*4dc038f3Smaxims@google.com return ret; 104*4dc038f3Smaxims@google.com } 105*4dc038f3Smaxims@google.com 106*4dc038f3Smaxims@google.com return 0; 107*4dc038f3Smaxims@google.com } 108*4dc038f3Smaxims@google.com 109*4dc038f3Smaxims@google.com static int ast_i2c_probe(struct udevice *dev) 110*4dc038f3Smaxims@google.com { 111*4dc038f3Smaxims@google.com struct ast2500_scu *scu; 112*4dc038f3Smaxims@google.com 113*4dc038f3Smaxims@google.com debug("Enabling I2C%u\n", dev->seq); 114*4dc038f3Smaxims@google.com 115*4dc038f3Smaxims@google.com /* 116*4dc038f3Smaxims@google.com * Get all I2C devices out of Reset. 117*4dc038f3Smaxims@google.com * Only needs to be done once, but doing it for every 118*4dc038f3Smaxims@google.com * device does not hurt. 119*4dc038f3Smaxims@google.com */ 120*4dc038f3Smaxims@google.com scu = ast_get_scu(); 121*4dc038f3Smaxims@google.com ast_scu_unlock(scu); 122*4dc038f3Smaxims@google.com clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C); 123*4dc038f3Smaxims@google.com ast_scu_lock(scu); 124*4dc038f3Smaxims@google.com 125*4dc038f3Smaxims@google.com ast_i2c_init_bus(dev); 126*4dc038f3Smaxims@google.com 127*4dc038f3Smaxims@google.com return 0; 128*4dc038f3Smaxims@google.com } 129*4dc038f3Smaxims@google.com 130*4dc038f3Smaxims@google.com static int ast_i2c_wait_isr(struct udevice *dev, u32 flag) 131*4dc038f3Smaxims@google.com { 132*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 133*4dc038f3Smaxims@google.com int timeout = I2C_TIMEOUT_US; 134*4dc038f3Smaxims@google.com 135*4dc038f3Smaxims@google.com while (!(readl(&priv->regs->isr) & flag) && timeout > 0) { 136*4dc038f3Smaxims@google.com udelay(I2C_SLEEP_STEP_US); 137*4dc038f3Smaxims@google.com timeout -= I2C_SLEEP_STEP_US; 138*4dc038f3Smaxims@google.com } 139*4dc038f3Smaxims@google.com 140*4dc038f3Smaxims@google.com ast_i2c_clear_interrupts(dev); 141*4dc038f3Smaxims@google.com if (timeout <= 0) 142*4dc038f3Smaxims@google.com return -ETIMEDOUT; 143*4dc038f3Smaxims@google.com 144*4dc038f3Smaxims@google.com return 0; 145*4dc038f3Smaxims@google.com } 146*4dc038f3Smaxims@google.com 147*4dc038f3Smaxims@google.com static int ast_i2c_send_stop(struct udevice *dev) 148*4dc038f3Smaxims@google.com { 149*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 150*4dc038f3Smaxims@google.com 151*4dc038f3Smaxims@google.com writel(I2CD_M_STOP_CMD, &priv->regs->csr); 152*4dc038f3Smaxims@google.com 153*4dc038f3Smaxims@google.com return ast_i2c_wait_isr(dev, I2CD_INTR_NORMAL_STOP); 154*4dc038f3Smaxims@google.com } 155*4dc038f3Smaxims@google.com 156*4dc038f3Smaxims@google.com static int ast_i2c_wait_tx(struct udevice *dev) 157*4dc038f3Smaxims@google.com { 158*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 159*4dc038f3Smaxims@google.com int timeout = I2C_TIMEOUT_US; 160*4dc038f3Smaxims@google.com u32 flag = I2CD_INTR_TX_ACK | I2CD_INTR_TX_NAK; 161*4dc038f3Smaxims@google.com u32 status = readl(&priv->regs->isr) & flag; 162*4dc038f3Smaxims@google.com int ret = 0; 163*4dc038f3Smaxims@google.com 164*4dc038f3Smaxims@google.com while (!status && timeout > 0) { 165*4dc038f3Smaxims@google.com status = readl(&priv->regs->isr) & flag; 166*4dc038f3Smaxims@google.com udelay(I2C_SLEEP_STEP_US); 167*4dc038f3Smaxims@google.com timeout -= I2C_SLEEP_STEP_US; 168*4dc038f3Smaxims@google.com } 169*4dc038f3Smaxims@google.com 170*4dc038f3Smaxims@google.com if (status == I2CD_INTR_TX_NAK) 171*4dc038f3Smaxims@google.com ret = -EREMOTEIO; 172*4dc038f3Smaxims@google.com 173*4dc038f3Smaxims@google.com if (timeout <= 0) 174*4dc038f3Smaxims@google.com ret = -ETIMEDOUT; 175*4dc038f3Smaxims@google.com 176*4dc038f3Smaxims@google.com ast_i2c_clear_interrupts(dev); 177*4dc038f3Smaxims@google.com 178*4dc038f3Smaxims@google.com return ret; 179*4dc038f3Smaxims@google.com } 180*4dc038f3Smaxims@google.com 181*4dc038f3Smaxims@google.com static int ast_i2c_start_txn(struct udevice *dev, uint devaddr) 182*4dc038f3Smaxims@google.com { 183*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 184*4dc038f3Smaxims@google.com 185*4dc038f3Smaxims@google.com /* Start and Send Device Address */ 186*4dc038f3Smaxims@google.com writel(devaddr, &priv->regs->trbbr); 187*4dc038f3Smaxims@google.com writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr); 188*4dc038f3Smaxims@google.com 189*4dc038f3Smaxims@google.com return ast_i2c_wait_tx(dev); 190*4dc038f3Smaxims@google.com } 191*4dc038f3Smaxims@google.com 192*4dc038f3Smaxims@google.com static int ast_i2c_read_data(struct udevice *dev, u8 chip_addr, u8 *buffer, 193*4dc038f3Smaxims@google.com size_t len, bool send_stop) 194*4dc038f3Smaxims@google.com { 195*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 196*4dc038f3Smaxims@google.com u32 i2c_cmd = I2CD_M_RX_CMD; 197*4dc038f3Smaxims@google.com int ret; 198*4dc038f3Smaxims@google.com 199*4dc038f3Smaxims@google.com ret = ast_i2c_start_txn(dev, (chip_addr << 1) | I2C_M_RD); 200*4dc038f3Smaxims@google.com if (ret < 0) 201*4dc038f3Smaxims@google.com return ret; 202*4dc038f3Smaxims@google.com 203*4dc038f3Smaxims@google.com for (; len > 0; len--, buffer++) { 204*4dc038f3Smaxims@google.com if (len == 1) 205*4dc038f3Smaxims@google.com i2c_cmd |= I2CD_M_S_RX_CMD_LAST; 206*4dc038f3Smaxims@google.com writel(i2c_cmd, &priv->regs->csr); 207*4dc038f3Smaxims@google.com ret = ast_i2c_wait_isr(dev, I2CD_INTR_RX_DONE); 208*4dc038f3Smaxims@google.com if (ret < 0) 209*4dc038f3Smaxims@google.com return ret; 210*4dc038f3Smaxims@google.com *buffer = (readl(&priv->regs->trbbr) & I2CD_RX_DATA_MASK) 211*4dc038f3Smaxims@google.com >> I2CD_RX_DATA_SHIFT; 212*4dc038f3Smaxims@google.com } 213*4dc038f3Smaxims@google.com ast_i2c_clear_interrupts(dev); 214*4dc038f3Smaxims@google.com 215*4dc038f3Smaxims@google.com if (send_stop) 216*4dc038f3Smaxims@google.com return ast_i2c_send_stop(dev); 217*4dc038f3Smaxims@google.com 218*4dc038f3Smaxims@google.com return 0; 219*4dc038f3Smaxims@google.com } 220*4dc038f3Smaxims@google.com 221*4dc038f3Smaxims@google.com static int ast_i2c_write_data(struct udevice *dev, u8 chip_addr, u8 222*4dc038f3Smaxims@google.com *buffer, size_t len, bool send_stop) 223*4dc038f3Smaxims@google.com { 224*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 225*4dc038f3Smaxims@google.com int ret; 226*4dc038f3Smaxims@google.com 227*4dc038f3Smaxims@google.com ret = ast_i2c_start_txn(dev, (chip_addr << 1)); 228*4dc038f3Smaxims@google.com if (ret < 0) 229*4dc038f3Smaxims@google.com return ret; 230*4dc038f3Smaxims@google.com 231*4dc038f3Smaxims@google.com for (; len > 0; len--, buffer++) { 232*4dc038f3Smaxims@google.com writel(*buffer, &priv->regs->trbbr); 233*4dc038f3Smaxims@google.com writel(I2CD_M_TX_CMD, &priv->regs->csr); 234*4dc038f3Smaxims@google.com ret = ast_i2c_wait_tx(dev); 235*4dc038f3Smaxims@google.com if (ret < 0) 236*4dc038f3Smaxims@google.com return ret; 237*4dc038f3Smaxims@google.com } 238*4dc038f3Smaxims@google.com 239*4dc038f3Smaxims@google.com if (send_stop) 240*4dc038f3Smaxims@google.com return ast_i2c_send_stop(dev); 241*4dc038f3Smaxims@google.com 242*4dc038f3Smaxims@google.com return 0; 243*4dc038f3Smaxims@google.com } 244*4dc038f3Smaxims@google.com 245*4dc038f3Smaxims@google.com static int ast_i2c_deblock(struct udevice *dev) 246*4dc038f3Smaxims@google.com { 247*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 248*4dc038f3Smaxims@google.com struct ast_i2c_regs *regs = priv->regs; 249*4dc038f3Smaxims@google.com u32 csr = readl(®s->csr); 250*4dc038f3Smaxims@google.com bool sda_high = csr & I2CD_SDA_LINE_STS; 251*4dc038f3Smaxims@google.com bool scl_high = csr & I2CD_SCL_LINE_STS; 252*4dc038f3Smaxims@google.com int ret = 0; 253*4dc038f3Smaxims@google.com 254*4dc038f3Smaxims@google.com if (sda_high && scl_high) { 255*4dc038f3Smaxims@google.com /* Bus is idle, no deblocking needed. */ 256*4dc038f3Smaxims@google.com return 0; 257*4dc038f3Smaxims@google.com } else if (sda_high) { 258*4dc038f3Smaxims@google.com /* Send stop command */ 259*4dc038f3Smaxims@google.com debug("Unterminated TXN in (%x), sending stop\n", csr); 260*4dc038f3Smaxims@google.com ret = ast_i2c_send_stop(dev); 261*4dc038f3Smaxims@google.com } else if (scl_high) { 262*4dc038f3Smaxims@google.com /* Possibly stuck slave */ 263*4dc038f3Smaxims@google.com debug("Bus stuck (%x), attempting recovery\n", csr); 264*4dc038f3Smaxims@google.com writel(I2CD_BUS_RECOVER_CMD, ®s->csr); 265*4dc038f3Smaxims@google.com ret = ast_i2c_wait_isr(dev, I2CD_INTR_BUS_RECOVER_DONE); 266*4dc038f3Smaxims@google.com } else { 267*4dc038f3Smaxims@google.com /* Just try to reinit the device. */ 268*4dc038f3Smaxims@google.com ast_i2c_init_bus(dev); 269*4dc038f3Smaxims@google.com } 270*4dc038f3Smaxims@google.com 271*4dc038f3Smaxims@google.com return ret; 272*4dc038f3Smaxims@google.com } 273*4dc038f3Smaxims@google.com 274*4dc038f3Smaxims@google.com static int ast_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) 275*4dc038f3Smaxims@google.com { 276*4dc038f3Smaxims@google.com int ret; 277*4dc038f3Smaxims@google.com 278*4dc038f3Smaxims@google.com ret = ast_i2c_deblock(dev); 279*4dc038f3Smaxims@google.com if (ret < 0) 280*4dc038f3Smaxims@google.com return ret; 281*4dc038f3Smaxims@google.com 282*4dc038f3Smaxims@google.com debug("i2c_xfer: %d messages\n", nmsgs); 283*4dc038f3Smaxims@google.com for (; nmsgs > 0; nmsgs--, msg++) { 284*4dc038f3Smaxims@google.com if (msg->flags & I2C_M_RD) { 285*4dc038f3Smaxims@google.com debug("i2c_read: chip=0x%x, len=0x%x, flags=0x%x\n", 286*4dc038f3Smaxims@google.com msg->addr, msg->len, msg->flags); 287*4dc038f3Smaxims@google.com ret = ast_i2c_read_data(dev, msg->addr, msg->buf, 288*4dc038f3Smaxims@google.com msg->len, (nmsgs == 1)); 289*4dc038f3Smaxims@google.com } else { 290*4dc038f3Smaxims@google.com debug("i2c_write: chip=0x%x, len=0x%x, flags=0x%x\n", 291*4dc038f3Smaxims@google.com msg->addr, msg->len, msg->flags); 292*4dc038f3Smaxims@google.com ret = ast_i2c_write_data(dev, msg->addr, msg->buf, 293*4dc038f3Smaxims@google.com msg->len, (nmsgs == 1)); 294*4dc038f3Smaxims@google.com } 295*4dc038f3Smaxims@google.com if (ret) { 296*4dc038f3Smaxims@google.com debug("%s: error (%d)\n", __func__, ret); 297*4dc038f3Smaxims@google.com return -EREMOTEIO; 298*4dc038f3Smaxims@google.com } 299*4dc038f3Smaxims@google.com } 300*4dc038f3Smaxims@google.com 301*4dc038f3Smaxims@google.com return 0; 302*4dc038f3Smaxims@google.com } 303*4dc038f3Smaxims@google.com 304*4dc038f3Smaxims@google.com static int ast_i2c_set_speed(struct udevice *dev, unsigned int speed) 305*4dc038f3Smaxims@google.com { 306*4dc038f3Smaxims@google.com struct ast_i2c_priv *priv = dev_get_priv(dev); 307*4dc038f3Smaxims@google.com struct ast_i2c_regs *regs = priv->regs; 308*4dc038f3Smaxims@google.com ulong i2c_rate, divider; 309*4dc038f3Smaxims@google.com 310*4dc038f3Smaxims@google.com debug("Setting speed for I2C%d to <%u>\n", dev->seq, speed); 311*4dc038f3Smaxims@google.com if (!speed) { 312*4dc038f3Smaxims@google.com debug("No valid speed specified\n"); 313*4dc038f3Smaxims@google.com return -EINVAL; 314*4dc038f3Smaxims@google.com } 315*4dc038f3Smaxims@google.com 316*4dc038f3Smaxims@google.com i2c_rate = clk_get_rate(&priv->clk); 317*4dc038f3Smaxims@google.com divider = i2c_rate / speed; 318*4dc038f3Smaxims@google.com 319*4dc038f3Smaxims@google.com priv->speed = speed; 320*4dc038f3Smaxims@google.com if (speed > I2C_HIGHSPEED_RATE) { 321*4dc038f3Smaxims@google.com debug("Enable High Speed\n"); 322*4dc038f3Smaxims@google.com setbits_le32(®s->fcr, I2CD_M_HIGH_SPEED_EN 323*4dc038f3Smaxims@google.com | I2CD_M_SDA_DRIVE_1T_EN 324*4dc038f3Smaxims@google.com | I2CD_SDA_DRIVE_1T_EN); 325*4dc038f3Smaxims@google.com writel(HIGHSPEED_TTIMEOUT, ®s->cactcr2); 326*4dc038f3Smaxims@google.com } else { 327*4dc038f3Smaxims@google.com debug("Enabling Normal Speed\n"); 328*4dc038f3Smaxims@google.com writel(I2CD_NO_TIMEOUT_CTRL, ®s->cactcr2); 329*4dc038f3Smaxims@google.com } 330*4dc038f3Smaxims@google.com 331*4dc038f3Smaxims@google.com writel(get_clk_reg_val(divider), ®s->cactcr1); 332*4dc038f3Smaxims@google.com ast_i2c_clear_interrupts(dev); 333*4dc038f3Smaxims@google.com 334*4dc038f3Smaxims@google.com return 0; 335*4dc038f3Smaxims@google.com } 336*4dc038f3Smaxims@google.com 337*4dc038f3Smaxims@google.com static const struct dm_i2c_ops ast_i2c_ops = { 338*4dc038f3Smaxims@google.com .xfer = ast_i2c_xfer, 339*4dc038f3Smaxims@google.com .set_bus_speed = ast_i2c_set_speed, 340*4dc038f3Smaxims@google.com .deblock = ast_i2c_deblock, 341*4dc038f3Smaxims@google.com }; 342*4dc038f3Smaxims@google.com 343*4dc038f3Smaxims@google.com static const struct udevice_id ast_i2c_ids[] = { 344*4dc038f3Smaxims@google.com { .compatible = "aspeed,ast2400-i2c-bus" }, 345*4dc038f3Smaxims@google.com { .compatible = "aspeed,ast2500-i2c-bus" }, 346*4dc038f3Smaxims@google.com { }, 347*4dc038f3Smaxims@google.com }; 348*4dc038f3Smaxims@google.com 349*4dc038f3Smaxims@google.com U_BOOT_DRIVER(ast_i2c) = { 350*4dc038f3Smaxims@google.com .name = "ast_i2c", 351*4dc038f3Smaxims@google.com .id = UCLASS_I2C, 352*4dc038f3Smaxims@google.com .of_match = ast_i2c_ids, 353*4dc038f3Smaxims@google.com .probe = ast_i2c_probe, 354*4dc038f3Smaxims@google.com .ofdata_to_platdata = ast_i2c_ofdata_to_platdata, 355*4dc038f3Smaxims@google.com .priv_auto_alloc_size = sizeof(struct ast_i2c_priv), 356*4dc038f3Smaxims@google.com .ops = &ast_i2c_ops, 357*4dc038f3Smaxims@google.com }; 358