1 /* 2 * i2c.c - driver for ADI TWI/I2C 3 * 4 * Copyright (c) 2006-2014 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2 or later. 7 * 8 * NOTE: This driver should be converted to driver model before June 2017. 9 * Please see doc/driver-model/i2c-howto.txt for instructions. 10 */ 11 12 #include <common.h> 13 #include <console.h> 14 #include <i2c.h> 15 16 #include <asm/clock.h> 17 #include <asm/twi.h> 18 #include <asm/io.h> 19 20 static struct twi_regs *i2c_get_base(struct i2c_adapter *adap); 21 22 /* Every register is 32bit aligned, but only 16bits in size */ 23 #define ureg(name) u16 name; u16 __pad_##name; 24 struct twi_regs { 25 ureg(clkdiv); 26 ureg(control); 27 ureg(slave_ctl); 28 ureg(slave_stat); 29 ureg(slave_addr); 30 ureg(master_ctl); 31 ureg(master_stat); 32 ureg(master_addr); 33 ureg(int_stat); 34 ureg(int_mask); 35 ureg(fifo_ctl); 36 ureg(fifo_stat); 37 char __pad[0x50]; 38 ureg(xmt_data8); 39 ureg(xmt_data16); 40 ureg(rcv_data8); 41 ureg(rcv_data16); 42 }; 43 #undef ureg 44 45 #ifdef TWI_CLKDIV 46 #define TWI0_CLKDIV TWI_CLKDIV 47 # ifdef CONFIG_SYS_MAX_I2C_BUS 48 # undef CONFIG_SYS_MAX_I2C_BUS 49 # endif 50 #define CONFIG_SYS_MAX_I2C_BUS 1 51 #endif 52 53 /* 54 * The way speed is changed into duty often results in integer truncation 55 * with 50% duty, so we'll force rounding up to the next duty by adding 1 56 * to the max. In practice this will get us a speed of something like 57 * 385 KHz. The other limit is easy to handle as it is only 8 bits. 58 */ 59 #define I2C_SPEED_MAX 400000 60 #define I2C_SPEED_TO_DUTY(speed) (5000000 / (speed)) 61 #define I2C_DUTY_MAX (I2C_SPEED_TO_DUTY(I2C_SPEED_MAX) + 1) 62 #define I2C_DUTY_MIN 0xff /* 8 bit limited */ 63 #define SYS_I2C_DUTY I2C_SPEED_TO_DUTY(CONFIG_SYS_I2C_SPEED) 64 /* Note: duty is inverse of speed, so the comparisons below are correct */ 65 #if SYS_I2C_DUTY < I2C_DUTY_MAX || SYS_I2C_DUTY > I2C_DUTY_MIN 66 # error "The I2C hardware can only operate 20KHz - 400KHz" 67 #endif 68 69 /* All transfers are described by this data structure */ 70 struct adi_i2c_msg { 71 u8 flags; 72 #define I2C_M_COMBO 0x4 73 #define I2C_M_STOP 0x2 74 #define I2C_M_READ 0x1 75 int len; /* msg length */ 76 u8 *buf; /* pointer to msg data */ 77 int alen; /* addr length */ 78 u8 *abuf; /* addr buffer */ 79 }; 80 81 /* Allow msec timeout per ~byte transfer */ 82 #define I2C_TIMEOUT 10 83 84 /** 85 * wait_for_completion - manage the actual i2c transfer 86 * @msg: the i2c msg 87 */ 88 static int wait_for_completion(struct twi_regs *twi, struct adi_i2c_msg *msg) 89 { 90 u16 int_stat, ctl; 91 ulong timebase = get_timer(0); 92 93 do { 94 int_stat = readw(&twi->int_stat); 95 96 if (int_stat & XMTSERV) { 97 writew(XMTSERV, &twi->int_stat); 98 if (msg->alen) { 99 writew(*(msg->abuf++), &twi->xmt_data8); 100 --msg->alen; 101 } else if (!(msg->flags & I2C_M_COMBO) && msg->len) { 102 writew(*(msg->buf++), &twi->xmt_data8); 103 --msg->len; 104 } else { 105 ctl = readw(&twi->master_ctl); 106 if (msg->flags & I2C_M_COMBO) 107 writew(ctl | RSTART | MDIR, 108 &twi->master_ctl); 109 else 110 writew(ctl | STOP, &twi->master_ctl); 111 } 112 } 113 if (int_stat & RCVSERV) { 114 writew(RCVSERV, &twi->int_stat); 115 if (msg->len) { 116 *(msg->buf++) = readw(&twi->rcv_data8); 117 --msg->len; 118 } else if (msg->flags & I2C_M_STOP) { 119 ctl = readw(&twi->master_ctl); 120 writew(ctl | STOP, &twi->master_ctl); 121 } 122 } 123 if (int_stat & MERR) { 124 writew(MERR, &twi->int_stat); 125 return msg->len; 126 } 127 if (int_stat & MCOMP) { 128 writew(MCOMP, &twi->int_stat); 129 if (msg->flags & I2C_M_COMBO && msg->len) { 130 ctl = readw(&twi->master_ctl); 131 ctl = (ctl & ~RSTART) | 132 (min(msg->len, 0xff) << 6) | MEN | MDIR; 133 writew(ctl, &twi->master_ctl); 134 } else 135 break; 136 } 137 138 /* If we were able to do something, reset timeout */ 139 if (int_stat) 140 timebase = get_timer(0); 141 142 } while (get_timer(timebase) < I2C_TIMEOUT); 143 144 return msg->len; 145 } 146 147 static int i2c_transfer(struct i2c_adapter *adap, uint8_t chip, uint addr, 148 int alen, uint8_t *buffer, int len, uint8_t flags) 149 { 150 struct twi_regs *twi = i2c_get_base(adap); 151 int ret; 152 u16 ctl; 153 uchar addr_buffer[] = { 154 (addr >> 0), 155 (addr >> 8), 156 (addr >> 16), 157 }; 158 struct adi_i2c_msg msg = { 159 .flags = flags | (len >= 0xff ? I2C_M_STOP : 0), 160 .buf = buffer, 161 .len = len, 162 .abuf = addr_buffer, 163 .alen = alen, 164 }; 165 166 /* wait for things to settle */ 167 while (readw(&twi->master_stat) & BUSBUSY) 168 if (ctrlc()) 169 return 1; 170 171 /* Set Transmit device address */ 172 writew(chip, &twi->master_addr); 173 174 /* Clear the FIFO before starting things */ 175 writew(XMTFLUSH | RCVFLUSH, &twi->fifo_ctl); 176 writew(0, &twi->fifo_ctl); 177 178 /* prime the pump */ 179 if (msg.alen) { 180 len = (msg.flags & I2C_M_COMBO) ? msg.alen : msg.alen + len; 181 writew(*(msg.abuf++), &twi->xmt_data8); 182 --msg.alen; 183 } else if (!(msg.flags & I2C_M_READ) && msg.len) { 184 writew(*(msg.buf++), &twi->xmt_data8); 185 --msg.len; 186 } 187 188 /* clear int stat */ 189 writew(-1, &twi->master_stat); 190 writew(-1, &twi->int_stat); 191 writew(0, &twi->int_mask); 192 193 /* Master enable */ 194 ctl = readw(&twi->master_ctl); 195 ctl = (ctl & FAST) | (min(len, 0xff) << 6) | MEN | 196 ((msg.flags & I2C_M_READ) ? MDIR : 0); 197 writew(ctl, &twi->master_ctl); 198 199 /* process the rest */ 200 ret = wait_for_completion(twi, &msg); 201 202 if (ret) { 203 ctl = readw(&twi->master_ctl) & ~MEN; 204 writew(ctl, &twi->master_ctl); 205 ctl = readw(&twi->control) & ~TWI_ENA; 206 writew(ctl, &twi->control); 207 ctl = readw(&twi->control) | TWI_ENA; 208 writew(ctl, &twi->control); 209 } 210 211 return ret; 212 } 213 214 static uint adi_i2c_setspeed(struct i2c_adapter *adap, uint speed) 215 { 216 struct twi_regs *twi = i2c_get_base(adap); 217 u16 clkdiv = I2C_SPEED_TO_DUTY(speed); 218 219 /* Set TWI interface clock */ 220 if (clkdiv < I2C_DUTY_MAX || clkdiv > I2C_DUTY_MIN) 221 return -1; 222 clkdiv = (clkdiv << 8) | (clkdiv & 0xff); 223 writew(clkdiv, &twi->clkdiv); 224 225 /* Don't turn it on */ 226 writew(speed > 100000 ? FAST : 0, &twi->master_ctl); 227 228 return 0; 229 } 230 231 static void adi_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) 232 { 233 struct twi_regs *twi = i2c_get_base(adap); 234 u16 prescale = ((get_i2c_clk() / 1000 / 1000 + 5) / 10) & 0x7F; 235 236 /* Set TWI internal clock as 10MHz */ 237 writew(prescale, &twi->control); 238 239 /* Set TWI interface clock as specified */ 240 i2c_set_bus_speed(speed); 241 242 /* Enable it */ 243 writew(TWI_ENA | prescale, &twi->control); 244 } 245 246 static int adi_i2c_read(struct i2c_adapter *adap, uint8_t chip, 247 uint addr, int alen, uint8_t *buffer, int len) 248 { 249 return i2c_transfer(adap, chip, addr, alen, buffer, 250 len, alen ? I2C_M_COMBO : I2C_M_READ); 251 } 252 253 static int adi_i2c_write(struct i2c_adapter *adap, uint8_t chip, 254 uint addr, int alen, uint8_t *buffer, int len) 255 { 256 return i2c_transfer(adap, chip, addr, alen, buffer, len, 0); 257 } 258 259 static int adi_i2c_probe(struct i2c_adapter *adap, uint8_t chip) 260 { 261 u8 byte; 262 return adi_i2c_read(adap, chip, 0, 0, &byte, 1); 263 } 264 265 static struct twi_regs *i2c_get_base(struct i2c_adapter *adap) 266 { 267 switch (adap->hwadapnr) { 268 #if CONFIG_SYS_MAX_I2C_BUS > 2 269 case 2: 270 return (struct twi_regs *)TWI2_CLKDIV; 271 #endif 272 #if CONFIG_SYS_MAX_I2C_BUS > 1 273 case 1: 274 return (struct twi_regs *)TWI1_CLKDIV; 275 #endif 276 case 0: 277 return (struct twi_regs *)TWI0_CLKDIV; 278 279 default: 280 printf("wrong hwadapnr: %d\n", adap->hwadapnr); 281 } 282 283 return NULL; 284 } 285 286 U_BOOT_I2C_ADAP_COMPLETE(adi_i2c0, adi_i2c_init, adi_i2c_probe, 287 adi_i2c_read, adi_i2c_write, 288 adi_i2c_setspeed, 289 CONFIG_SYS_I2C_SPEED, 290 0, 291 0) 292 293 #if CONFIG_SYS_MAX_I2C_BUS > 1 294 U_BOOT_I2C_ADAP_COMPLETE(adi_i2c1, adi_i2c_init, adi_i2c_probe, 295 adi_i2c_read, adi_i2c_write, 296 adi_i2c_setspeed, 297 CONFIG_SYS_I2C_SPEED, 298 0, 299 1) 300 #endif 301 302 #if CONFIG_SYS_MAX_I2C_BUS > 2 303 U_BOOT_I2C_ADAP_COMPLETE(adi_i2c2, adi_i2c_init, adi_i2c_probe, 304 adi_i2c_read, adi_i2c_write, 305 adi_i2c_setspeed, 306 CONFIG_SYS_I2C_SPEED, 307 0, 308 2) 309 #endif 310