1 /* 2 * (C) Copyright 2012-2013, Xilinx, Michal Simek 3 * 4 * (C) Copyright 2002 5 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 6 * Keith Outwater, keith_outwater@mvis.com 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 * 26 */ 27 28 /* 29 * Xilinx FPGA support 30 */ 31 32 #include <common.h> 33 #include <virtex2.h> 34 #include <spartan2.h> 35 #include <spartan3.h> 36 #include <zynqpl.h> 37 38 #if 0 39 #define FPGA_DEBUG 40 #endif 41 42 /* Define FPGA_DEBUG to get debug printf's */ 43 #ifdef FPGA_DEBUG 44 #define PRINTF(fmt,args...) printf (fmt ,##args) 45 #else 46 #define PRINTF(fmt,args...) 47 #endif 48 49 /* Local Static Functions */ 50 static int xilinx_validate (Xilinx_desc * desc, char *fn); 51 52 /* ------------------------------------------------------------------------- */ 53 54 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size) 55 { 56 unsigned int length; 57 unsigned int swapsize; 58 char buffer[80]; 59 unsigned char *dataptr; 60 unsigned int i; 61 62 dataptr = (unsigned char *)fpgadata; 63 64 /* skip the first bytes of the bitsteam, their meaning is unknown */ 65 length = (*dataptr << 8) + *(dataptr + 1); 66 dataptr += 2; 67 dataptr += length; 68 69 /* get design name (identifier, length, string) */ 70 length = (*dataptr << 8) + *(dataptr + 1); 71 dataptr += 2; 72 if (*dataptr++ != 0x61) { 73 debug("%s: Design name id not recognized in bitstream\n", 74 __func__); 75 return FPGA_FAIL; 76 } 77 78 length = (*dataptr << 8) + *(dataptr + 1); 79 dataptr += 2; 80 for (i = 0; i < length; i++) 81 buffer[i] = *dataptr++; 82 83 printf(" design filename = \"%s\"\n", buffer); 84 85 /* get part number (identifier, length, string) */ 86 if (*dataptr++ != 0x62) { 87 printf("%s: Part number id not recognized in bitstream\n", 88 __func__); 89 return FPGA_FAIL; 90 } 91 92 length = (*dataptr << 8) + *(dataptr + 1); 93 dataptr += 2; 94 for (i = 0; i < length; i++) 95 buffer[i] = *dataptr++; 96 printf(" part number = \"%s\"\n", buffer); 97 98 /* get date (identifier, length, string) */ 99 if (*dataptr++ != 0x63) { 100 printf("%s: Date identifier not recognized in bitstream\n", 101 __func__); 102 return FPGA_FAIL; 103 } 104 105 length = (*dataptr << 8) + *(dataptr+1); 106 dataptr += 2; 107 for (i = 0; i < length; i++) 108 buffer[i] = *dataptr++; 109 printf(" date = \"%s\"\n", buffer); 110 111 /* get time (identifier, length, string) */ 112 if (*dataptr++ != 0x64) { 113 printf("%s: Time identifier not recognized in bitstream\n", 114 __func__); 115 return FPGA_FAIL; 116 } 117 118 length = (*dataptr << 8) + *(dataptr+1); 119 dataptr += 2; 120 for (i = 0; i < length; i++) 121 buffer[i] = *dataptr++; 122 printf(" time = \"%s\"\n", buffer); 123 124 /* get fpga data length (identifier, length) */ 125 if (*dataptr++ != 0x65) { 126 printf("%s: Data length id not recognized in bitstream\n", 127 __func__); 128 return FPGA_FAIL; 129 } 130 swapsize = ((unsigned int) *dataptr << 24) + 131 ((unsigned int) *(dataptr + 1) << 16) + 132 ((unsigned int) *(dataptr + 2) << 8) + 133 ((unsigned int) *(dataptr + 3)); 134 dataptr += 4; 135 printf(" bytes in bitstream = %d\n", swapsize); 136 137 return fpga_load(devnum, dataptr, swapsize); 138 } 139 140 int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) 141 { 142 int ret_val = FPGA_FAIL; /* assume a failure */ 143 144 if (!xilinx_validate (desc, (char *)__FUNCTION__)) { 145 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 146 } else 147 switch (desc->family) { 148 case Xilinx_Spartan2: 149 #if defined(CONFIG_FPGA_SPARTAN2) 150 PRINTF ("%s: Launching the Spartan-II Loader...\n", 151 __FUNCTION__); 152 ret_val = Spartan2_load (desc, buf, bsize); 153 #else 154 printf ("%s: No support for Spartan-II devices.\n", 155 __FUNCTION__); 156 #endif 157 break; 158 case Xilinx_Spartan3: 159 #if defined(CONFIG_FPGA_SPARTAN3) 160 PRINTF ("%s: Launching the Spartan-III Loader...\n", 161 __FUNCTION__); 162 ret_val = Spartan3_load (desc, buf, bsize); 163 #else 164 printf ("%s: No support for Spartan-III devices.\n", 165 __FUNCTION__); 166 #endif 167 break; 168 case Xilinx_Virtex2: 169 #if defined(CONFIG_FPGA_VIRTEX2) 170 PRINTF ("%s: Launching the Virtex-II Loader...\n", 171 __FUNCTION__); 172 ret_val = Virtex2_load (desc, buf, bsize); 173 #else 174 printf ("%s: No support for Virtex-II devices.\n", 175 __FUNCTION__); 176 #endif 177 break; 178 case xilinx_zynq: 179 #if defined(CONFIG_FPGA_ZYNQPL) 180 PRINTF("%s: Launching the Zynq PL Loader...\n", 181 __func__); 182 ret_val = zynq_load(desc, buf, bsize); 183 #else 184 printf("%s: No support for Zynq devices.\n", 185 __func__); 186 #endif 187 break; 188 189 default: 190 printf ("%s: Unsupported family type, %d\n", 191 __FUNCTION__, desc->family); 192 } 193 194 return ret_val; 195 } 196 197 int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) 198 { 199 int ret_val = FPGA_FAIL; /* assume a failure */ 200 201 if (!xilinx_validate (desc, (char *)__FUNCTION__)) { 202 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 203 } else 204 switch (desc->family) { 205 case Xilinx_Spartan2: 206 #if defined(CONFIG_FPGA_SPARTAN2) 207 PRINTF ("%s: Launching the Spartan-II Reader...\n", 208 __FUNCTION__); 209 ret_val = Spartan2_dump (desc, buf, bsize); 210 #else 211 printf ("%s: No support for Spartan-II devices.\n", 212 __FUNCTION__); 213 #endif 214 break; 215 case Xilinx_Spartan3: 216 #if defined(CONFIG_FPGA_SPARTAN3) 217 PRINTF ("%s: Launching the Spartan-III Reader...\n", 218 __FUNCTION__); 219 ret_val = Spartan3_dump (desc, buf, bsize); 220 #else 221 printf ("%s: No support for Spartan-III devices.\n", 222 __FUNCTION__); 223 #endif 224 break; 225 case Xilinx_Virtex2: 226 #if defined( CONFIG_FPGA_VIRTEX2) 227 PRINTF ("%s: Launching the Virtex-II Reader...\n", 228 __FUNCTION__); 229 ret_val = Virtex2_dump (desc, buf, bsize); 230 #else 231 printf ("%s: No support for Virtex-II devices.\n", 232 __FUNCTION__); 233 #endif 234 break; 235 case xilinx_zynq: 236 #if defined(CONFIG_FPGA_ZYNQPL) 237 PRINTF("%s: Launching the Zynq PL Reader...\n", 238 __func__); 239 ret_val = zynq_dump(desc, buf, bsize); 240 #else 241 printf("%s: No support for Zynq devices.\n", 242 __func__); 243 #endif 244 break; 245 246 default: 247 printf ("%s: Unsupported family type, %d\n", 248 __FUNCTION__, desc->family); 249 } 250 251 return ret_val; 252 } 253 254 int xilinx_info (Xilinx_desc * desc) 255 { 256 int ret_val = FPGA_FAIL; 257 258 if (xilinx_validate (desc, (char *)__FUNCTION__)) { 259 printf ("Family: \t"); 260 switch (desc->family) { 261 case Xilinx_Spartan2: 262 printf ("Spartan-II\n"); 263 break; 264 case Xilinx_Spartan3: 265 printf ("Spartan-III\n"); 266 break; 267 case Xilinx_Virtex2: 268 printf ("Virtex-II\n"); 269 break; 270 case xilinx_zynq: 271 printf("Zynq PL\n"); 272 break; 273 /* Add new family types here */ 274 default: 275 printf ("Unknown family type, %d\n", desc->family); 276 } 277 278 printf ("Interface type:\t"); 279 switch (desc->iface) { 280 case slave_serial: 281 printf ("Slave Serial\n"); 282 break; 283 case master_serial: /* Not used */ 284 printf ("Master Serial\n"); 285 break; 286 case slave_parallel: 287 printf ("Slave Parallel\n"); 288 break; 289 case jtag_mode: /* Not used */ 290 printf ("JTAG Mode\n"); 291 break; 292 case slave_selectmap: 293 printf ("Slave SelectMap Mode\n"); 294 break; 295 case master_selectmap: 296 printf ("Master SelectMap Mode\n"); 297 break; 298 case devcfg: 299 printf("Device configuration interface (Zynq)\n"); 300 break; 301 /* Add new interface types here */ 302 default: 303 printf ("Unsupported interface type, %d\n", desc->iface); 304 } 305 306 printf ("Device Size: \t%d bytes\n" 307 "Cookie: \t0x%x (%d)\n", 308 desc->size, desc->cookie, desc->cookie); 309 310 if (desc->iface_fns) { 311 printf ("Device Function Table @ 0x%p\n", desc->iface_fns); 312 switch (desc->family) { 313 case Xilinx_Spartan2: 314 #if defined(CONFIG_FPGA_SPARTAN2) 315 Spartan2_info (desc); 316 #else 317 /* just in case */ 318 printf ("%s: No support for Spartan-II devices.\n", 319 __FUNCTION__); 320 #endif 321 break; 322 case Xilinx_Spartan3: 323 #if defined(CONFIG_FPGA_SPARTAN3) 324 Spartan3_info (desc); 325 #else 326 /* just in case */ 327 printf ("%s: No support for Spartan-III devices.\n", 328 __FUNCTION__); 329 #endif 330 break; 331 case Xilinx_Virtex2: 332 #if defined(CONFIG_FPGA_VIRTEX2) 333 Virtex2_info (desc); 334 #else 335 /* just in case */ 336 printf ("%s: No support for Virtex-II devices.\n", 337 __FUNCTION__); 338 #endif 339 break; 340 case xilinx_zynq: 341 #if defined(CONFIG_FPGA_ZYNQPL) 342 zynq_info(desc); 343 #else 344 /* just in case */ 345 printf("%s: No support for Zynq devices.\n", 346 __func__); 347 #endif 348 /* Add new family types here */ 349 default: 350 /* we don't need a message here - we give one up above */ 351 ; 352 } 353 } else 354 printf ("No Device Function Table.\n"); 355 356 ret_val = FPGA_SUCCESS; 357 } else { 358 printf ("%s: Invalid device descriptor\n", __FUNCTION__); 359 } 360 361 return ret_val; 362 } 363 364 /* ------------------------------------------------------------------------- */ 365 366 static int xilinx_validate (Xilinx_desc * desc, char *fn) 367 { 368 int ret_val = false; 369 370 if (desc) { 371 if ((desc->family > min_xilinx_type) && 372 (desc->family < max_xilinx_type)) { 373 if ((desc->iface > min_xilinx_iface_type) && 374 (desc->iface < max_xilinx_iface_type)) { 375 if (desc->size) { 376 ret_val = true; 377 } else 378 printf ("%s: NULL part size\n", fn); 379 } else 380 printf ("%s: Invalid Interface type, %d\n", 381 fn, desc->iface); 382 } else 383 printf ("%s: Invalid family type, %d\n", fn, desc->family); 384 } else 385 printf ("%s: NULL descriptor!\n", fn); 386 387 return ret_val; 388 } 389