xref: /rk3399_rockchip-uboot/drivers/fpga/xilinx.c (revision e6a857da746d5d7d450e59c0f86664c6b279b1c2)
1c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /*
2c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * (C) Copyright 2002
3c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * Keith Outwater, keith_outwater@mvis.com
5c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
6c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * See file CREDITS for list of people who contributed to this
7c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * project.
8c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
9c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * This program is free software; you can redistribute it and/or
10c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * modify it under the terms of the GNU General Public License as
11c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * published by the Free Software Foundation; either version 2 of
12c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * the License, or (at your option) any later version.
13c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
14c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * This program is distributed in the hope that it will be useful,
15c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * GNU General Public License for more details.
18c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
19c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * You should have received a copy of the GNU General Public License
20c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * along with this program; if not, write to the Free Software
21c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * MA 02111-1307 USA
23c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
24c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
25c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
26c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /*
27c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *  Xilinx FPGA support
28c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
29c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
30c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <common.h>
31c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <virtex2.h>
32c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <spartan2.h>
33c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <spartan3.h>
34c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
35c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if 0
36c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define FPGA_DEBUG
37c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
38c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
39c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Define FPGA_DEBUG to get debug printf's */
40c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #ifdef	FPGA_DEBUG
41c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define	PRINTF(fmt,args...)	printf (fmt ,##args)
42c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
43c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define PRINTF(fmt,args...)
44c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
45c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
46c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Local Static Functions */
47c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int xilinx_validate (Xilinx_desc * desc, char *fn);
48c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
49c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
50c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
51*e6a857daSWolfgang Denk int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
52c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
53c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FPGA_FAIL;	/* assume a failure */
54c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
55c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
56c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
57c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else
58c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		switch (desc->family) {
59c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Spartan2:
60c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN2)
61c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			PRINTF ("%s: Launching the Spartan-II Loader...\n",
62c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
63c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = Spartan2_load (desc, buf, bsize);
64c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
65c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: No support for Spartan-II devices.\n",
66c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
67c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
68c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
69c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Spartan3:
70c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN3)
71c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			PRINTF ("%s: Launching the Spartan-III Loader...\n",
72c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
73c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = Spartan3_load (desc, buf, bsize);
74c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
75c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: No support for Spartan-III devices.\n",
76c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
77c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
78c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
79c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Virtex2:
80c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_VIRTEX2)
81c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			PRINTF ("%s: Launching the Virtex-II Loader...\n",
82c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
83c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = Virtex2_load (desc, buf, bsize);
84c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
85c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: No support for Virtex-II devices.\n",
86c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
87c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
88c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
89c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
90c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		default:
91c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: Unsupported family type, %d\n",
92c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__, desc->family);
93c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
94c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
95c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
96c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
97c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
98*e6a857daSWolfgang Denk int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
99c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
100c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FPGA_FAIL;	/* assume a failure */
101c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
102c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
103c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
104c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else
105c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		switch (desc->family) {
106c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Spartan2:
107c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN2)
108c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			PRINTF ("%s: Launching the Spartan-II Reader...\n",
109c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
110c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = Spartan2_dump (desc, buf, bsize);
111c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
112c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: No support for Spartan-II devices.\n",
113c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
114c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
115c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
116c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Spartan3:
117c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN3)
118c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			PRINTF ("%s: Launching the Spartan-III Reader...\n",
119c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
120c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = Spartan3_dump (desc, buf, bsize);
121c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
122c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: No support for Spartan-III devices.\n",
123c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
124c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
125c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
126c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Virtex2:
127c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined( CONFIG_FPGA_VIRTEX2)
128c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			PRINTF ("%s: Launching the Virtex-II Reader...\n",
129c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
130c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = Virtex2_dump (desc, buf, bsize);
131c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
132c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: No support for Virtex-II devices.\n",
133c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__);
134c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
135c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
136c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
137c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		default:
138c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: Unsupported family type, %d\n",
139c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__, desc->family);
140c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
141c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
142c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
143c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
144c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
145c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int xilinx_info (Xilinx_desc * desc)
146c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
147c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FPGA_FAIL;
148c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
149c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if (xilinx_validate (desc, (char *)__FUNCTION__)) {
150c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf ("Family:        \t");
151c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		switch (desc->family) {
152c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Spartan2:
153c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Spartan-II\n");
154c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
155c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Spartan3:
156c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Spartan-III\n");
157c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
158c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case Xilinx_Virtex2:
159c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Virtex-II\n");
160c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
161c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			/* Add new family types here */
162c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		default:
163c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Unknown family type, %d\n", desc->family);
164c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
165c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
166c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf ("Interface type:\t");
167c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		switch (desc->iface) {
168c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case slave_serial:
169c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Slave Serial\n");
170c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
171c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case master_serial:	/* Not used */
172c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Master Serial\n");
173c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
174c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case slave_parallel:
175c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Slave Parallel\n");
176c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
177c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case jtag_mode:		/* Not used */
178c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("JTAG Mode\n");
179c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
180c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case slave_selectmap:
181c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Slave SelectMap Mode\n");
182c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
183c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case master_selectmap:
184c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Master SelectMap Mode\n");
185c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
186c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			/* Add new interface types here */
187c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		default:
188c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Unsupported interface type, %d\n", desc->iface);
189c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
190c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
191c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf ("Device Size:   \t%d bytes\n"
192c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				"Cookie:        \t0x%x (%d)\n",
193c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				desc->size, desc->cookie, desc->cookie);
194c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
195c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		if (desc->iface_fns) {
196c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
197c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			switch (desc->family) {
198c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			case Xilinx_Spartan2:
199c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN2)
200c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				Spartan2_info (desc);
201c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
202c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				/* just in case */
203c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				printf ("%s: No support for Spartan-II devices.\n",
204c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 						__FUNCTION__);
205c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
206c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				break;
207c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			case Xilinx_Spartan3:
208c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN3)
209c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				Spartan3_info (desc);
210c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
211c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				/* just in case */
212c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				printf ("%s: No support for Spartan-III devices.\n",
213c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 						__FUNCTION__);
214c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
215c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				break;
216c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			case Xilinx_Virtex2:
217c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_VIRTEX2)
218c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				Virtex2_info (desc);
219c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
220c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				/* just in case */
221c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				printf ("%s: No support for Virtex-II devices.\n",
222c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 						__FUNCTION__);
223c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
224c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				break;
225c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				/* Add new family types here */
226c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			default:
227c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				/* we don't need a message here - we give one up above */
228c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				;
229c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			}
230c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		} else
231c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("No Device Function Table.\n");
232c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
233c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		ret_val = FPGA_SUCCESS;
234c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else {
235c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
236c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
237c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
238c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
239c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
240c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
241c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
242c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
243c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int xilinx_validate (Xilinx_desc * desc, char *fn)
244c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
245c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FALSE;
246c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
247c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if (desc) {
248c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		if ((desc->family > min_xilinx_type) &&
249c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			(desc->family < max_xilinx_type)) {
250c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			if ((desc->iface > min_xilinx_iface_type) &&
251c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				(desc->iface < max_xilinx_iface_type)) {
252c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				if (desc->size) {
253c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					ret_val = TRUE;
254c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				} else
255c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					printf ("%s: NULL part size\n", fn);
256c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			} else
257c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				printf ("%s: Invalid Interface type, %d\n",
258c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 						fn, desc->iface);
259c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		} else
260c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf ("%s: Invalid family type, %d\n", fn, desc->family);
261c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else
262c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf ("%s: NULL descriptor!\n", fn);
263c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
264c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
265c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
266