1*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* 2*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2002 3*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 4*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * Keith Outwater, keith_outwater@mvis.com 5*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * 6*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 7*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * project. 8*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * 9*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 10*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 11*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 12*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 13*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * 14*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 15*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 18*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * 19*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 20*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 21*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 23*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * 24*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD */ 25*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 26*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* 27*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * Xilinx FPGA support 28*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD */ 29*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 30*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 31*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <virtex2.h> 32*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <spartan2.h> 33*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <spartan3.h> 34*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 35*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if 0 36*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define FPGA_DEBUG 37*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 38*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 39*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Define FPGA_DEBUG to get debug printf's */ 40*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #ifdef FPGA_DEBUG 41*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define PRINTF(fmt,args...) printf (fmt ,##args) 42*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 43*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define PRINTF(fmt,args...) 44*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 45*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 46*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Local Static Functions */ 47*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int xilinx_validate (Xilinx_desc * desc, char *fn); 48*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 49*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 50*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 51*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize) 52*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 53*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FPGA_FAIL; /* assume a failure */ 54*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 55*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (!xilinx_validate (desc, (char *)__FUNCTION__)) { 56*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Invalid device descriptor\n", __FUNCTION__); 57*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 58*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 59*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan2: 60*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN2) 61*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD PRINTF ("%s: Launching the Spartan-II Loader...\n", 62*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 63*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Spartan2_load (desc, buf, bsize); 64*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 65*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-II devices.\n", 66*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 67*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 68*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 69*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan3: 70*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN3) 71*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD PRINTF ("%s: Launching the Spartan-III Loader...\n", 72*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 73*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Spartan3_load (desc, buf, bsize); 74*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 75*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-III devices.\n", 76*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 77*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 78*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 79*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Virtex2: 80*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_VIRTEX2) 81*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD PRINTF ("%s: Launching the Virtex-II Loader...\n", 82*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 83*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Virtex2_load (desc, buf, bsize); 84*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 85*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Virtex-II devices.\n", 86*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 87*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 88*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 89*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 90*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 91*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Unsupported family type, %d\n", 92*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__, desc->family); 93*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 94*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 95*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 96*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 97*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 98*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize) 99*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 100*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FPGA_FAIL; /* assume a failure */ 101*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 102*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (!xilinx_validate (desc, (char *)__FUNCTION__)) { 103*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Invalid device descriptor\n", __FUNCTION__); 104*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 105*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 106*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan2: 107*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN2) 108*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD PRINTF ("%s: Launching the Spartan-II Reader...\n", 109*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 110*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Spartan2_dump (desc, buf, bsize); 111*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 112*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-II devices.\n", 113*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 114*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 115*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 116*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan3: 117*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN3) 118*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD PRINTF ("%s: Launching the Spartan-III Reader...\n", 119*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 120*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Spartan3_dump (desc, buf, bsize); 121*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 122*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-III devices.\n", 123*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 124*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 125*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 126*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Virtex2: 127*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined( CONFIG_FPGA_VIRTEX2) 128*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD PRINTF ("%s: Launching the Virtex-II Reader...\n", 129*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 130*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Virtex2_dump (desc, buf, bsize); 131*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 132*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Virtex-II devices.\n", 133*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 134*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 135*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 136*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 137*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 138*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Unsupported family type, %d\n", 139*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__, desc->family); 140*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 141*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 142*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 143*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 144*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 145*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int xilinx_info (Xilinx_desc * desc) 146*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 147*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FPGA_FAIL; 148*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 149*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (xilinx_validate (desc, (char *)__FUNCTION__)) { 150*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Family: \t"); 151*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 152*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan2: 153*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Spartan-II\n"); 154*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 155*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan3: 156*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Spartan-III\n"); 157*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 158*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Virtex2: 159*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Virtex-II\n"); 160*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 161*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Add new family types here */ 162*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 163*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Unknown family type, %d\n", desc->family); 164*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 165*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 166*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Interface type:\t"); 167*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->iface) { 168*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case slave_serial: 169*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Slave Serial\n"); 170*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 171*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case master_serial: /* Not used */ 172*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Master Serial\n"); 173*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 174*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case slave_parallel: 175*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Slave Parallel\n"); 176*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 177*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case jtag_mode: /* Not used */ 178*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("JTAG Mode\n"); 179*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 180*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case slave_selectmap: 181*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Slave SelectMap Mode\n"); 182*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 183*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case master_selectmap: 184*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Master SelectMap Mode\n"); 185*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 186*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Add new interface types here */ 187*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 188*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Unsupported interface type, %d\n", desc->iface); 189*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 190*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 191*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Device Size: \t%d bytes\n" 192*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD "Cookie: \t0x%x (%d)\n", 193*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD desc->size, desc->cookie, desc->cookie); 194*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 195*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (desc->iface_fns) { 196*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("Device Function Table @ 0x%p\n", desc->iface_fns); 197*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 198*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan2: 199*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN2) 200*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD Spartan2_info (desc); 201*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 202*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* just in case */ 203*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-II devices.\n", 204*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 205*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 206*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 207*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan3: 208*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN3) 209*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD Spartan3_info (desc); 210*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 211*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* just in case */ 212*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-III devices.\n", 213*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 214*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 215*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 216*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Virtex2: 217*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_VIRTEX2) 218*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD Virtex2_info (desc); 219*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 220*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* just in case */ 221*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Virtex-II devices.\n", 222*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 223*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 224*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 225*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Add new family types here */ 226*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 227*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* we don't need a message here - we give one up above */ 228*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ; 229*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 230*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 231*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("No Device Function Table.\n"); 232*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 233*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = FPGA_SUCCESS; 234*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else { 235*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Invalid device descriptor\n", __FUNCTION__); 236*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 237*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 238*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 239*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 240*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 241*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset) 242*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 243*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FPGA_FAIL; /* assume a failure */ 244*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 245*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (!xilinx_validate (desc, (char *)__FUNCTION__)) { 246*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Invalid device descriptor\n", __FUNCTION__); 247*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 248*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 249*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan2: 250*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN2) 251*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Spartan2_reloc (desc, reloc_offset); 252*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 253*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-II devices.\n", 254*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 255*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 256*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 257*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Spartan3: 258*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_SPARTAN3) 259*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Spartan3_reloc (desc, reloc_offset); 260*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 261*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Spartan-III devices.\n", 262*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 263*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 264*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 265*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Xilinx_Virtex2: 266*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_VIRTEX2) 267*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = Virtex2_reloc (desc, reloc_offset); 268*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 269*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: No support for Virtex-II devices.\n", 270*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__); 271*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 272*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 273*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Add new family types here */ 274*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 275*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Unsupported family type, %d\n", 276*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD __FUNCTION__, desc->family); 277*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 278*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 279*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 280*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 281*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 282*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 283*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 284*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 285*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int xilinx_validate (Xilinx_desc * desc, char *fn) 286*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 287*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FALSE; 288*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 289*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (desc) { 290*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if ((desc->family > min_xilinx_type) && 291*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD (desc->family < max_xilinx_type)) { 292*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if ((desc->iface > min_xilinx_iface_type) && 293*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD (desc->iface < max_xilinx_iface_type)) { 294*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (desc->size) { 295*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = TRUE; 296*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 297*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: NULL part size\n", fn); 298*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 299*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Invalid Interface type, %d\n", 300*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD fn, desc->iface); 301*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 302*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: Invalid family type, %d\n", fn, desc->family); 303*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else 304*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf ("%s: NULL descriptor!\n", fn); 305*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 306*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 307*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 308