xref: /rk3399_rockchip-uboot/drivers/fpga/fpga.c (revision c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b)
1*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /*
2*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * (C) Copyright 2002
3*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
5*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * See file CREDITS for list of people who contributed to this
6*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * project.
7*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
8*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * This program is free software; you can redistribute it and/or
9*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * modify it under the terms of the GNU General Public License as
10*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * published by the Free Software Foundation; either version 2 of
11*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * the License, or (at your option) any later version.
12*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
13*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * This program is distributed in the hope that it will be useful,
14*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * GNU General Public License for more details.
17*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
18*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * You should have received a copy of the GNU General Public License
19*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * along with this program; if not, write to the Free Software
20*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * MA 02111-1307 USA
22*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *
23*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
24*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
25*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /*
26*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *  Generic FPGA support
27*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
28*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <common.h>             /* core U-Boot definitions */
29*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <xilinx.h>             /* xilinx specific definitions */
30*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <altera.h>             /* altera specific definitions */
31*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
32*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if 0
33*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define FPGA_DEBUG              /* define FPGA_DEBUG to get debug messages */
34*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
35*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
36*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Local definitions */
37*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #ifndef CONFIG_MAX_FPGA_DEVICES
38*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_MAX_FPGA_DEVICES		5
39*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
40*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
41*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Enable/Disable debug console messages */
42*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #ifdef FPGA_DEBUG
43*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define	PRINTF(fmt,args...)	printf (fmt ,##args)
44*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
45*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #define	PRINTF(fmt,args...)
46*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
47*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
48*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Local static data */
49*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static ulong relocation_offset = 0;
50*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int next_desc = FPGA_INVALID_DEVICE;
51*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
52*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
53*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Local static functions */
54*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_get_desc( int devnum );
55*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_validate( int devnum, void *buf,
56*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					 size_t bsize, char *fn );
57*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int fpga_dev_info( int devnum );
58*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
59*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
60*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
61*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
62*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_no_sup
63*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * 'no support' message function
64*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
65*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static void fpga_no_sup( char *fn, char *msg )
66*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
67*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( fn && msg ) {
68*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "%s: No support for %s.\n", fn, msg);
69*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else if ( msg ) {
70*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "No support for %s.\n", msg);
71*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else {
72*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "No FPGA suport!\n");
73*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
74*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
75*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
76*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
77*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_get_desc
78*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	map a device number to a descriptor
79*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
80*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_get_desc( int devnum )
81*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
82*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	fpga_desc *desc = (fpga_desc * )NULL;
83*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
84*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if (( devnum >= 0 ) && (devnum < next_desc )) {
85*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		desc = &desc_table[devnum];
86*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		PRINTF( "%s: found fpga descriptor #%d @ 0x%p\n",
87*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				__FUNCTION__, devnum, desc );
88*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
89*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
90*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return desc;
91*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
92*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
93*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
94*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_validate
95*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	generic parameter checking code
96*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
97*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_validate( int devnum, void *buf,
98*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					 size_t bsize, char *fn )
99*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
100*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	fpga_desc * desc = fpga_get_desc( devnum );
101*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
102*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( !desc ) {
103*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "%s: Invalid device number %d\n", fn, devnum );
104*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
105*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
106*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( !buf ) {
107*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "%s: Null buffer.\n", fn );
108*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		return (fpga_desc * const)NULL;
109*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
110*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return desc;
111*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
112*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
113*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
114*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_dev_info
115*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	generic multiplexing code
116*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
117*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int fpga_dev_info( int devnum )
118*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
119*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FPGA_FAIL;           /* assume failure */
120*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	const fpga_desc * const desc = fpga_get_desc( devnum );
121*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
122*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( desc ) {
123*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		PRINTF( "%s: Device Descriptor @ 0x%p\n",
124*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				__FUNCTION__, desc->devdesc );
125*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
126*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		switch ( desc->devtype ) {
127*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case fpga_xilinx:
128*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_XILINX)
129*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf( "Xilinx Device\nDescriptor @ 0x%p\n", desc );
130*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = xilinx_info( desc->devdesc );
131*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
132*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
133*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
134*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
135*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case fpga_altera:
136*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_ALTERA)
137*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf( "Altera Device\nDescriptor @ 0x%p\n", desc );
138*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = altera_info( desc->devdesc );
139*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
140*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
141*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
142*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
143*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		default:
144*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf( "%s: Invalid or unsupported device type %d\n",
145*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					__FUNCTION__, desc->devtype );
146*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
147*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else {
148*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "%s: Invalid device number %d\n",
149*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			__FUNCTION__, devnum );
150*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
151*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
152*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
153*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
154*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
155*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
156*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_reloc
157*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	generic multiplexing code
158*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
159*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int fpga_reloc( fpga_type devtype, void *desc, ulong reloc_off )
160*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
161*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FPGA_FAIL;
162*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
163*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	PRINTF( "%s: Relocating Device of type %d @ 0x%p with offset %lx\n",
164*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				__FUNCTION__, devtype, desc, reloc_off );
165*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
166*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	switch ( devtype ) {
167*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	case fpga_xilinx:
168*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_XILINX)
169*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		ret_val = xilinx_reloc( desc, reloc_off );
170*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
171*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
172*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
173*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		break;
174*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	case fpga_altera:
175*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_ALTERA)
176*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		ret_val = altera_reloc( desc, reloc_off );
177*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
178*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
179*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
180*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		break;
181*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	default:
182*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "%s: Invalid or unsupported device type %d\n",
183*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			__FUNCTION__, devtype );
184*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
185*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
186*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
187*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
188*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
189*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
190*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fgpa_init is usually called from misc_init_r() and MUST be called
191*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * before any of the other fpga functions are used.
192*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
193*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD void fpga_init( ulong reloc_off )
194*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
195*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	relocation_offset = reloc_off;
196*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	next_desc = 0;
197*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	memset( desc_table, 0, sizeof(desc_table));
198*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
199*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	PRINTF( "%s: CONFIG_FPGA = 0x%x\n", __FUNCTION__, CONFIG_FPGA );
200*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
201*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
202*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_count
203*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  * Basic interface function to get the current number of devices available.
204*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
205*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int fpga_count( void )
206*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
207*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return next_desc;
208*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
209*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
210*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_add
211*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	Attempts to relocate the device/board specific interface code
212*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	to the proper RAM locations and adds the device descriptor to
213*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	the device table.
214*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
215*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int fpga_add( fpga_type devtype, void *desc )
216*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
217*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int devnum = FPGA_INVALID_DEVICE;
218*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
219*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( next_desc  < 0 ) {
220*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "%s: FPGA support not initialized!\n", __FUNCTION__ );
221*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else if (( devtype > fpga_min_type ) && ( devtype < fpga_undefined )) {
222*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		if ( desc ) {
223*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			if ( next_desc < CONFIG_MAX_FPGA_DEVICES ) {
224*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				if ( fpga_reloc( devtype, desc, relocation_offset )
225*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				  == FPGA_SUCCESS ) {
226*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					devnum = next_desc;
227*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					desc_table[next_desc].devtype = devtype;
228*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					desc_table[next_desc++].devdesc = desc;
229*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				} else {
230*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 					printf( "%s: Unable to relocate device interface table!\n",
231*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 						__FUNCTION__ );
232*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				}
233*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			} else {
234*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				printf( "%s: Exceeded Max FPGA device count\n", __FUNCTION__ );
235*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			}
236*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		} else {
237*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf( "%s: NULL device descriptor\n", __FUNCTION__ );
238*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
239*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	} else {
240*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		printf( "%s: Unsupported FPGA type %d\n", __FUNCTION__, devtype );
241*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
242*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
243*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return devnum;
244*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
245*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
246*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /*
247*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	Generic multiplexing code
248*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
249*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int fpga_load( int devnum, void *buf, size_t bsize )
250*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
251*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FPGA_FAIL;           /* assume failure */
252*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	fpga_desc * desc = fpga_validate( devnum, buf, bsize, (char *)__FUNCTION__ );
253*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
254*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( desc ) {
255*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		switch ( desc->devtype ) {
256*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case fpga_xilinx:
257*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_XILINX)
258*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = xilinx_load( desc->devdesc, buf, bsize );
259*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
260*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
261*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
262*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
263*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case fpga_altera:
264*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_ALTERA)
265*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = altera_load( desc->devdesc, buf, bsize );
266*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
267*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
268*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
269*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
270*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		default:
271*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf( "%s: Invalid or unsupported device type %d\n",
272*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				__FUNCTION__, desc->devtype );
273*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
274*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
275*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
276*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
277*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
278*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
279*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_dump
280*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	generic multiplexing code
281*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
282*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int fpga_dump( int devnum, void *buf, size_t bsize )
283*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
284*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	int ret_val = FPGA_FAIL;           /* assume failure */
285*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	fpga_desc * desc = fpga_validate( devnum, buf, bsize, (char *)__FUNCTION__ );
286*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
287*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( desc ) {
288*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		switch ( desc->devtype ) {
289*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case fpga_xilinx:
290*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_XILINX)
291*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = xilinx_dump( desc->devdesc, buf, bsize );
292*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
293*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
294*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
295*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
296*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		case fpga_altera:
297*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_ALTERA)
298*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			ret_val = altera_dump( desc->devdesc, buf, bsize );
299*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else
300*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
301*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif
302*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			break;
303*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		default:
304*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf( "%s: Invalid or unsupported device type %d\n",
305*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				__FUNCTION__, desc->devtype );
306*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
307*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
308*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
309*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	return ret_val;
310*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
311*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
312*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
313*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* fpga_info
314*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	front end to fpga_dev_info.  If devnum is invalid, report on all
315*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  *	available devices.
316*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD  */
317*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int fpga_info( int devnum )
318*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD {
319*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	if ( devnum == FPGA_INVALID_DEVICE ) {
320*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		if ( next_desc > 0 ) {
321*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			int dev;
322*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
323*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			for ( dev = 0; dev < next_desc; dev++ ) {
324*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 				fpga_dev_info( dev );
325*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			}
326*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			return FPGA_SUCCESS;
327*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		} else {
328*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			printf( "%s: No FPGA devices available.\n", __FUNCTION__ );
329*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 			return FPGA_FAIL;
330*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 		}
331*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	}
332*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 	else return fpga_dev_info( devnum );
333*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD }
334*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 
335*c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */
336