1 /* 2 * (C) Copyright 2003 3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de 4 * 5 * (C) Copyright 2002 6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 /* 12 * Altera FPGA support 13 */ 14 #include <common.h> 15 #include <errno.h> 16 #include <ACEX1K.h> 17 #include <stratixII.h> 18 19 /* Define FPGA_DEBUG to 1 to get debug printf's */ 20 #define FPGA_DEBUG 0 21 22 static int altera_validate(Altera_desc *desc, const char *fn) 23 { 24 if (!desc) { 25 printf("%s: NULL descriptor!\n", fn); 26 return -EINVAL; 27 } 28 29 if ((desc->family < min_altera_type) || 30 (desc->family > max_altera_type)) { 31 printf("%s: Invalid family type, %d\n", fn, desc->family); 32 return -EINVAL; 33 } 34 35 if ((desc->iface < min_altera_iface_type) || 36 (desc->iface > max_altera_iface_type)) { 37 printf("%s: Invalid Interface type, %d\n", fn, desc->iface); 38 return -EINVAL; 39 } 40 41 if (!desc->size) { 42 printf("%s: NULL part size\n", fn); 43 return -EINVAL; 44 } 45 46 return 0; 47 } 48 49 /* ------------------------------------------------------------------------- */ 50 int altera_load(Altera_desc *desc, const void *buf, size_t bsize) 51 { 52 int ret_val = FPGA_FAIL; /* assume a failure */ 53 54 if (altera_validate(desc, (char *)__func__)) { 55 printf("%s: Invalid device descriptor\n", __func__); 56 return FPGA_FAIL; 57 } 58 59 switch (desc->family) { 60 case Altera_ACEX1K: 61 case Altera_CYC2: 62 #if defined(CONFIG_FPGA_ACEX1K) 63 debug_cond(FPGA_DEBUG, 64 "%s: Launching the ACEX1K Loader...\n", 65 __func__); 66 ret_val = ACEX1K_load (desc, buf, bsize); 67 #elif defined(CONFIG_FPGA_CYCLON2) 68 debug_cond(FPGA_DEBUG, 69 "%s: Launching the CYCLONE II Loader...\n", 70 __func__); 71 ret_val = CYC2_load (desc, buf, bsize); 72 #else 73 printf("%s: No support for ACEX1K devices.\n", 74 __func__); 75 #endif 76 break; 77 78 #if defined(CONFIG_FPGA_STRATIX_II) 79 case Altera_StratixII: 80 debug_cond(FPGA_DEBUG, 81 "%s: Launching the Stratix II Loader...\n", 82 __func__); 83 ret_val = StratixII_load (desc, buf, bsize); 84 break; 85 #endif 86 default: 87 printf("%s: Unsupported family type, %d\n", 88 __func__, desc->family); 89 } 90 91 return ret_val; 92 } 93 94 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) 95 { 96 int ret_val = FPGA_FAIL; /* assume a failure */ 97 98 if (altera_validate(desc, (char *)__func__)) { 99 printf("%s: Invalid device descriptor\n", __func__); 100 return FPGA_FAIL; 101 } 102 103 switch (desc->family) { 104 case Altera_ACEX1K: 105 #if defined(CONFIG_FPGA_ACEX) 106 debug_cond(FPGA_DEBUG, 107 "%s: Launching the ACEX1K Reader...\n", 108 __func__); 109 ret_val = ACEX1K_dump (desc, buf, bsize); 110 #else 111 printf("%s: No support for ACEX1K devices.\n", 112 __func__); 113 #endif 114 break; 115 116 #if defined(CONFIG_FPGA_STRATIX_II) 117 case Altera_StratixII: 118 debug_cond(FPGA_DEBUG, 119 "%s: Launching the Stratix II Reader...\n", 120 __func__); 121 ret_val = StratixII_dump (desc, buf, bsize); 122 break; 123 #endif 124 default: 125 printf("%s: Unsupported family type, %d\n", 126 __func__, desc->family); 127 } 128 129 return ret_val; 130 } 131 132 int altera_info(Altera_desc *desc) 133 { 134 int ret_val = FPGA_FAIL; 135 136 if (altera_validate (desc, (char *)__func__)) { 137 printf("%s: Invalid device descriptor\n", __func__); 138 return FPGA_FAIL; 139 } 140 141 printf("Family: \t"); 142 switch (desc->family) { 143 case Altera_ACEX1K: 144 printf("ACEX1K\n"); 145 break; 146 case Altera_CYC2: 147 printf("CYCLON II\n"); 148 break; 149 case Altera_StratixII: 150 printf("Stratix II\n"); 151 break; 152 /* Add new family types here */ 153 default: 154 printf("Unknown family type, %d\n", desc->family); 155 } 156 157 printf("Interface type:\t"); 158 switch (desc->iface) { 159 case passive_serial: 160 printf("Passive Serial (PS)\n"); 161 break; 162 case passive_parallel_synchronous: 163 printf("Passive Parallel Synchronous (PPS)\n"); 164 break; 165 case passive_parallel_asynchronous: 166 printf("Passive Parallel Asynchronous (PPA)\n"); 167 break; 168 case passive_serial_asynchronous: 169 printf("Passive Serial Asynchronous (PSA)\n"); 170 break; 171 case altera_jtag_mode: /* Not used */ 172 printf("JTAG Mode\n"); 173 break; 174 case fast_passive_parallel: 175 printf("Fast Passive Parallel (FPP)\n"); 176 break; 177 case fast_passive_parallel_security: 178 printf("Fast Passive Parallel with Security (FPPS)\n"); 179 break; 180 /* Add new interface types here */ 181 default: 182 printf("Unsupported interface type, %d\n", desc->iface); 183 } 184 185 printf("Device Size: \t%zd bytes\n" 186 "Cookie: \t0x%x (%d)\n", 187 desc->size, desc->cookie, desc->cookie); 188 189 if (desc->iface_fns) { 190 printf("Device Function Table @ 0x%p\n", desc->iface_fns); 191 switch (desc->family) { 192 case Altera_ACEX1K: 193 case Altera_CYC2: 194 #if defined(CONFIG_FPGA_ACEX1K) 195 ACEX1K_info(desc); 196 #elif defined(CONFIG_FPGA_CYCLON2) 197 CYC2_info(desc); 198 #else 199 /* just in case */ 200 printf("%s: No support for ACEX1K devices.\n", 201 __func__); 202 #endif 203 break; 204 #if defined(CONFIG_FPGA_STRATIX_II) 205 case Altera_StratixII: 206 StratixII_info(desc); 207 break; 208 #endif 209 /* Add new family types here */ 210 default: 211 /* we don't need a message here - we give one up above */ 212 break; 213 } 214 } else { 215 printf("No Device Function Table.\n"); 216 } 217 218 ret_val = FPGA_SUCCESS; 219 220 return ret_val; 221 } 222