1 /* 2 * (C) Copyright 2003 3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de 4 * 5 * (C) Copyright 2002 6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 /* 12 * Altera FPGA support 13 */ 14 #include <common.h> 15 #include <ACEX1K.h> 16 #include <stratixII.h> 17 18 /* Define FPGA_DEBUG to 1 to get debug printf's */ 19 #define FPGA_DEBUG 0 20 21 /* Local Static Functions */ 22 static int altera_validate (Altera_desc * desc, const char *fn); 23 24 /* ------------------------------------------------------------------------- */ 25 int altera_load(Altera_desc *desc, const void *buf, size_t bsize) 26 { 27 int ret_val = FPGA_FAIL; /* assume a failure */ 28 29 if (!altera_validate(desc, (char *)__func__)) { 30 printf("%s: Invalid device descriptor\n", __func__); 31 return FPGA_FAIL; 32 } 33 34 switch (desc->family) { 35 case Altera_ACEX1K: 36 case Altera_CYC2: 37 #if defined(CONFIG_FPGA_ACEX1K) 38 debug_cond(FPGA_DEBUG, 39 "%s: Launching the ACEX1K Loader...\n", 40 __func__); 41 ret_val = ACEX1K_load (desc, buf, bsize); 42 #elif defined(CONFIG_FPGA_CYCLON2) 43 debug_cond(FPGA_DEBUG, 44 "%s: Launching the CYCLONE II Loader...\n", 45 __func__); 46 ret_val = CYC2_load (desc, buf, bsize); 47 #else 48 printf("%s: No support for ACEX1K devices.\n", 49 __func__); 50 #endif 51 break; 52 53 #if defined(CONFIG_FPGA_STRATIX_II) 54 case Altera_StratixII: 55 debug_cond(FPGA_DEBUG, 56 "%s: Launching the Stratix II Loader...\n", 57 __func__); 58 ret_val = StratixII_load (desc, buf, bsize); 59 break; 60 #endif 61 default: 62 printf("%s: Unsupported family type, %d\n", 63 __func__, desc->family); 64 } 65 66 return ret_val; 67 } 68 69 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) 70 { 71 int ret_val = FPGA_FAIL; /* assume a failure */ 72 73 if (!altera_validate (desc, (char *)__func__)) { 74 printf("%s: Invalid device descriptor\n", __func__); 75 return FPGA_FAIL; 76 } 77 78 switch (desc->family) { 79 case Altera_ACEX1K: 80 #if defined(CONFIG_FPGA_ACEX) 81 debug_cond(FPGA_DEBUG, 82 "%s: Launching the ACEX1K Reader...\n", 83 __func__); 84 ret_val = ACEX1K_dump (desc, buf, bsize); 85 #else 86 printf("%s: No support for ACEX1K devices.\n", 87 __func__); 88 #endif 89 break; 90 91 #if defined(CONFIG_FPGA_STRATIX_II) 92 case Altera_StratixII: 93 debug_cond(FPGA_DEBUG, 94 "%s: Launching the Stratix II Reader...\n", 95 __func__); 96 ret_val = StratixII_dump (desc, buf, bsize); 97 break; 98 #endif 99 default: 100 printf("%s: Unsupported family type, %d\n", 101 __func__, desc->family); 102 } 103 104 return ret_val; 105 } 106 107 int altera_info(Altera_desc *desc) 108 { 109 int ret_val = FPGA_FAIL; 110 111 if (!altera_validate (desc, (char *)__func__)) { 112 printf("%s: Invalid device descriptor\n", __func__); 113 return FPGA_FAIL; 114 } 115 116 printf("Family: \t"); 117 switch (desc->family) { 118 case Altera_ACEX1K: 119 printf("ACEX1K\n"); 120 break; 121 case Altera_CYC2: 122 printf("CYCLON II\n"); 123 break; 124 case Altera_StratixII: 125 printf("Stratix II\n"); 126 break; 127 /* Add new family types here */ 128 default: 129 printf("Unknown family type, %d\n", desc->family); 130 } 131 132 printf("Interface type:\t"); 133 switch (desc->iface) { 134 case passive_serial: 135 printf("Passive Serial (PS)\n"); 136 break; 137 case passive_parallel_synchronous: 138 printf("Passive Parallel Synchronous (PPS)\n"); 139 break; 140 case passive_parallel_asynchronous: 141 printf("Passive Parallel Asynchronous (PPA)\n"); 142 break; 143 case passive_serial_asynchronous: 144 printf("Passive Serial Asynchronous (PSA)\n"); 145 break; 146 case altera_jtag_mode: /* Not used */ 147 printf("JTAG Mode\n"); 148 break; 149 case fast_passive_parallel: 150 printf("Fast Passive Parallel (FPP)\n"); 151 break; 152 case fast_passive_parallel_security: 153 printf("Fast Passive Parallel with Security (FPPS)\n"); 154 break; 155 /* Add new interface types here */ 156 default: 157 printf("Unsupported interface type, %d\n", desc->iface); 158 } 159 160 printf("Device Size: \t%zd bytes\n" 161 "Cookie: \t0x%x (%d)\n", 162 desc->size, desc->cookie, desc->cookie); 163 164 if (desc->iface_fns) { 165 printf("Device Function Table @ 0x%p\n", desc->iface_fns); 166 switch (desc->family) { 167 case Altera_ACEX1K: 168 case Altera_CYC2: 169 #if defined(CONFIG_FPGA_ACEX1K) 170 ACEX1K_info(desc); 171 #elif defined(CONFIG_FPGA_CYCLON2) 172 CYC2_info(desc); 173 #else 174 /* just in case */ 175 printf("%s: No support for ACEX1K devices.\n", 176 __func__); 177 #endif 178 break; 179 #if defined(CONFIG_FPGA_STRATIX_II) 180 case Altera_StratixII: 181 StratixII_info(desc); 182 break; 183 #endif 184 /* Add new family types here */ 185 default: 186 /* we don't need a message here - we give one up above */ 187 break; 188 } 189 } else { 190 printf("No Device Function Table.\n"); 191 } 192 193 ret_val = FPGA_SUCCESS; 194 195 return ret_val; 196 } 197 198 /* ------------------------------------------------------------------------- */ 199 200 static int altera_validate(Altera_desc *desc, const char *fn) 201 { 202 if (!desc) { 203 printf("%s: NULL descriptor!\n", fn); 204 return false; 205 } 206 207 if ((desc->family < min_altera_type) || 208 (desc->family > max_altera_type)) { 209 printf("%s: Invalid family type, %d\n", fn, desc->family); 210 return false; 211 } 212 213 if ((desc->iface < min_altera_iface_type) || 214 (desc->iface > max_altera_iface_type)) { 215 printf("%s: Invalid Interface type, %d\n", fn, desc->iface); 216 return false; 217 } 218 219 if (!desc->size) { 220 printf("%s: NULL part size\n", fn); 221 return false; 222 } 223 224 return true; 225 } 226 227 /* ------------------------------------------------------------------------- */ 228