1 /* 2 * (C) Copyright 2003 3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de 4 * 5 * (C) Copyright 2002 6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 /* 12 * Altera FPGA support 13 */ 14 #include <common.h> 15 #include <errno.h> 16 #include <ACEX1K.h> 17 #include <stratixII.h> 18 19 /* Define FPGA_DEBUG to 1 to get debug printf's */ 20 #define FPGA_DEBUG 0 21 22 static const struct altera_fpga { 23 enum altera_family family; 24 const char *name; 25 int (*load)(Altera_desc *, const void *, size_t); 26 int (*dump)(Altera_desc *, const void *, size_t); 27 int (*info)(Altera_desc *); 28 } altera_fpga[] = { 29 #if defined(CONFIG_FPGA_ACEX1K) 30 { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, 31 { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, 32 #elif defined(CONFIG_FPGA_CYCLON2) 33 { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, 34 { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, 35 #endif 36 #if defined(CONFIG_FPGA_STRATIX_II) 37 { Altera_StratixII, "StratixII", StratixII_load, 38 StratixII_dump, StratixII_info }, 39 #endif 40 }; 41 42 static int altera_validate(Altera_desc *desc, const char *fn) 43 { 44 if (!desc) { 45 printf("%s: NULL descriptor!\n", fn); 46 return -EINVAL; 47 } 48 49 if ((desc->family < min_altera_type) || 50 (desc->family > max_altera_type)) { 51 printf("%s: Invalid family type, %d\n", fn, desc->family); 52 return -EINVAL; 53 } 54 55 if ((desc->iface < min_altera_iface_type) || 56 (desc->iface > max_altera_iface_type)) { 57 printf("%s: Invalid Interface type, %d\n", fn, desc->iface); 58 return -EINVAL; 59 } 60 61 if (!desc->size) { 62 printf("%s: NULL part size\n", fn); 63 return -EINVAL; 64 } 65 66 return 0; 67 } 68 69 static const struct altera_fpga * 70 altera_desc_to_fpga(Altera_desc *desc, const char *fn) 71 { 72 int i; 73 74 if (altera_validate(desc, fn)) { 75 printf("%s: Invalid device descriptor\n", fn); 76 return NULL; 77 } 78 79 for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) { 80 if (desc->family == altera_fpga[i].family) 81 break; 82 } 83 84 if (i == ARRAY_SIZE(altera_fpga)) { 85 printf("%s: Unsupported family type, %d\n", fn, desc->family); 86 return NULL; 87 } 88 89 return &altera_fpga[i]; 90 } 91 92 int altera_load(Altera_desc *desc, const void *buf, size_t bsize) 93 { 94 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); 95 96 if (!fpga) 97 return FPGA_FAIL; 98 99 debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n", 100 __func__, fpga->name); 101 if (fpga->load) 102 return fpga->load(desc, buf, bsize); 103 return 0; 104 } 105 106 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) 107 { 108 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); 109 110 if (!fpga) 111 return FPGA_FAIL; 112 113 debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n", 114 __func__, fpga->name); 115 if (fpga->dump) 116 return fpga->dump(desc, buf, bsize); 117 return 0; 118 } 119 120 int altera_info(Altera_desc *desc) 121 { 122 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); 123 124 if (!fpga) 125 return FPGA_FAIL; 126 127 printf("Family: \t%s\n", fpga->name); 128 129 printf("Interface type:\t"); 130 switch (desc->iface) { 131 case passive_serial: 132 printf("Passive Serial (PS)\n"); 133 break; 134 case passive_parallel_synchronous: 135 printf("Passive Parallel Synchronous (PPS)\n"); 136 break; 137 case passive_parallel_asynchronous: 138 printf("Passive Parallel Asynchronous (PPA)\n"); 139 break; 140 case passive_serial_asynchronous: 141 printf("Passive Serial Asynchronous (PSA)\n"); 142 break; 143 case altera_jtag_mode: /* Not used */ 144 printf("JTAG Mode\n"); 145 break; 146 case fast_passive_parallel: 147 printf("Fast Passive Parallel (FPP)\n"); 148 break; 149 case fast_passive_parallel_security: 150 printf("Fast Passive Parallel with Security (FPPS)\n"); 151 break; 152 /* Add new interface types here */ 153 default: 154 printf("Unsupported interface type, %d\n", desc->iface); 155 } 156 157 printf("Device Size: \t%zd bytes\n" 158 "Cookie: \t0x%x (%d)\n", 159 desc->size, desc->cookie, desc->cookie); 160 161 if (desc->iface_fns) { 162 printf("Device Function Table @ 0x%p\n", desc->iface_fns); 163 if (fpga->info) 164 fpga->info(desc); 165 } else { 166 printf("No Device Function Table.\n"); 167 } 168 169 return FPGA_SUCCESS; 170 } 171