1 /* 2 * (C) Copyright 2003 3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de 4 * 5 * (C) Copyright 2002 6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 /* 12 * Altera FPGA support 13 */ 14 #include <common.h> 15 #include <ACEX1K.h> 16 #include <stratixII.h> 17 18 /* Define FPGA_DEBUG to 1 to get debug printf's */ 19 #define FPGA_DEBUG 0 20 21 /* Local Static Functions */ 22 static int altera_validate (Altera_desc * desc, const char *fn); 23 24 /* ------------------------------------------------------------------------- */ 25 int altera_load(Altera_desc *desc, const void *buf, size_t bsize) 26 { 27 int ret_val = FPGA_FAIL; /* assume a failure */ 28 29 if (!altera_validate (desc, (char *)__func__)) { 30 printf("%s: Invalid device descriptor\n", __func__); 31 } else { 32 switch (desc->family) { 33 case Altera_ACEX1K: 34 case Altera_CYC2: 35 #if defined(CONFIG_FPGA_ACEX1K) 36 debug_cond(FPGA_DEBUG, 37 "%s: Launching the ACEX1K Loader...\n", 38 __func__); 39 ret_val = ACEX1K_load (desc, buf, bsize); 40 #elif defined(CONFIG_FPGA_CYCLON2) 41 debug_cond(FPGA_DEBUG, 42 "%s: Launching the CYCLONE II Loader...\n", 43 __func__); 44 ret_val = CYC2_load (desc, buf, bsize); 45 #else 46 printf("%s: No support for ACEX1K devices.\n", 47 __func__); 48 #endif 49 break; 50 51 #if defined(CONFIG_FPGA_STRATIX_II) 52 case Altera_StratixII: 53 debug_cond(FPGA_DEBUG, 54 "%s: Launching the Stratix II Loader...\n", 55 __func__); 56 ret_val = StratixII_load (desc, buf, bsize); 57 break; 58 #endif 59 default: 60 printf("%s: Unsupported family type, %d\n", 61 __func__, desc->family); 62 } 63 } 64 65 return ret_val; 66 } 67 68 int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) 69 { 70 int ret_val = FPGA_FAIL; /* assume a failure */ 71 72 if (!altera_validate (desc, (char *)__func__)) { 73 printf("%s: Invalid device descriptor\n", __func__); 74 } else { 75 switch (desc->family) { 76 case Altera_ACEX1K: 77 #if defined(CONFIG_FPGA_ACEX) 78 debug_cond(FPGA_DEBUG, 79 "%s: Launching the ACEX1K Reader...\n", 80 __func__); 81 ret_val = ACEX1K_dump (desc, buf, bsize); 82 #else 83 printf("%s: No support for ACEX1K devices.\n", 84 __func__); 85 #endif 86 break; 87 88 #if defined(CONFIG_FPGA_STRATIX_II) 89 case Altera_StratixII: 90 debug_cond(FPGA_DEBUG, 91 "%s: Launching the Stratix II Reader...\n", 92 __func__); 93 ret_val = StratixII_dump (desc, buf, bsize); 94 break; 95 #endif 96 default: 97 printf("%s: Unsupported family type, %d\n", 98 __func__, desc->family); 99 } 100 } 101 102 return ret_val; 103 } 104 105 int altera_info( Altera_desc *desc ) 106 { 107 int ret_val = FPGA_FAIL; 108 109 if (altera_validate (desc, (char *)__func__)) { 110 printf("Family: \t"); 111 switch (desc->family) { 112 case Altera_ACEX1K: 113 printf("ACEX1K\n"); 114 break; 115 case Altera_CYC2: 116 printf("CYCLON II\n"); 117 break; 118 case Altera_StratixII: 119 printf("Stratix II\n"); 120 break; 121 /* Add new family types here */ 122 default: 123 printf("Unknown family type, %d\n", desc->family); 124 } 125 126 printf("Interface type:\t"); 127 switch (desc->iface) { 128 case passive_serial: 129 printf("Passive Serial (PS)\n"); 130 break; 131 case passive_parallel_synchronous: 132 printf("Passive Parallel Synchronous (PPS)\n"); 133 break; 134 case passive_parallel_asynchronous: 135 printf("Passive Parallel Asynchronous (PPA)\n"); 136 break; 137 case passive_serial_asynchronous: 138 printf("Passive Serial Asynchronous (PSA)\n"); 139 break; 140 case altera_jtag_mode: /* Not used */ 141 printf("JTAG Mode\n"); 142 break; 143 case fast_passive_parallel: 144 printf("Fast Passive Parallel (FPP)\n"); 145 break; 146 case fast_passive_parallel_security: 147 printf 148 ("Fast Passive Parallel with Security (FPPS) \n"); 149 break; 150 /* Add new interface types here */ 151 default: 152 printf("Unsupported interface type, %d\n", desc->iface); 153 } 154 155 printf("Device Size: \t%zd bytes\n" 156 "Cookie: \t0x%x (%d)\n", 157 desc->size, desc->cookie, desc->cookie); 158 159 if (desc->iface_fns) { 160 printf("Device Function Table @ 0x%p\n", desc->iface_fns); 161 switch (desc->family) { 162 case Altera_ACEX1K: 163 case Altera_CYC2: 164 #if defined(CONFIG_FPGA_ACEX1K) 165 ACEX1K_info(desc); 166 #elif defined(CONFIG_FPGA_CYCLON2) 167 CYC2_info(desc); 168 #else 169 /* just in case */ 170 printf("%s: No support for ACEX1K devices.\n", 171 __func__); 172 #endif 173 break; 174 #if defined(CONFIG_FPGA_STRATIX_II) 175 case Altera_StratixII: 176 StratixII_info(desc); 177 break; 178 #endif 179 /* Add new family types here */ 180 default: 181 /* we don't need a message here - we give one up above */ 182 break; 183 } 184 } else { 185 printf("No Device Function Table.\n"); 186 } 187 188 ret_val = FPGA_SUCCESS; 189 } else { 190 printf("%s: Invalid device descriptor\n", __func__); 191 } 192 193 return ret_val; 194 } 195 196 /* ------------------------------------------------------------------------- */ 197 198 static int altera_validate (Altera_desc * desc, const char *fn) 199 { 200 int ret_val = false; 201 202 if (desc) { 203 if ((desc->family > min_altera_type) && 204 (desc->family < max_altera_type)) { 205 if ((desc->iface > min_altera_iface_type) && 206 (desc->iface < max_altera_iface_type)) { 207 if (desc->size) { 208 ret_val = true; 209 } else { 210 printf("%s: NULL part size\n", fn); 211 } 212 } else { 213 printf("%s: Invalid Interface type, %d\n", 214 fn, desc->iface); 215 } 216 } else { 217 printf("%s: Invalid family type, %d\n", fn, desc->family); 218 } 219 } else { 220 printf("%s: NULL descriptor!\n", fn); 221 } 222 223 return ret_val; 224 } 225 226 /* ------------------------------------------------------------------------- */ 227