1c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* 2c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2003 3c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de 4c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * 5c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2002 6c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * Rich Ireland, Enterasys Networks, rireland@enterasys.com. 7c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * 81a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 9c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD */ 10c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 11c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* 12c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD * Altera FPGA support 13c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD */ 14c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 15c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <ACEX1K.h> 16c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #include <stratixII.h> 17c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 180ae16cbbSMarek Vasut /* Define FPGA_DEBUG to 1 to get debug printf's */ 190ae16cbbSMarek Vasut #define FPGA_DEBUG 0 20c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 21c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Local Static Functions */ 22c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int altera_validate (Altera_desc * desc, const char *fn); 23c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 24c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 25e6a857daSWolfgang Denk int altera_load(Altera_desc *desc, const void *buf, size_t bsize) 26c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 27c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FPGA_FAIL; /* assume a failure */ 28c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 290ae16cbbSMarek Vasut if (!altera_validate(desc, (char *)__func__)) { 300ae16cbbSMarek Vasut printf("%s: Invalid device descriptor\n", __func__); 31*4a4c0a5eSMarek Vasut return FPGA_FAIL; 32*4a4c0a5eSMarek Vasut } 33*4a4c0a5eSMarek Vasut 34c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 35c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_ACEX1K: 36c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_CYC2: 37c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_ACEX1K) 380ae16cbbSMarek Vasut debug_cond(FPGA_DEBUG, 390ae16cbbSMarek Vasut "%s: Launching the ACEX1K Loader...\n", 400ae16cbbSMarek Vasut __func__); 41c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = ACEX1K_load (desc, buf, bsize); 42c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #elif defined(CONFIG_FPGA_CYCLON2) 430ae16cbbSMarek Vasut debug_cond(FPGA_DEBUG, 440ae16cbbSMarek Vasut "%s: Launching the CYCLONE II Loader...\n", 450ae16cbbSMarek Vasut __func__); 46c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = CYC2_load (desc, buf, bsize); 47c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 48c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("%s: No support for ACEX1K devices.\n", 490ae16cbbSMarek Vasut __func__); 50c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 51c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 52c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 53c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_STRATIX_II) 54c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_StratixII: 550ae16cbbSMarek Vasut debug_cond(FPGA_DEBUG, 560ae16cbbSMarek Vasut "%s: Launching the Stratix II Loader...\n", 570ae16cbbSMarek Vasut __func__); 58c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = StratixII_load (desc, buf, bsize); 59c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 60c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 61c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 62c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("%s: Unsupported family type, %d\n", 630ae16cbbSMarek Vasut __func__, desc->family); 64c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 65c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 66c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 67c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 68c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 69e6a857daSWolfgang Denk int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) 70c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 71c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FPGA_FAIL; /* assume a failure */ 72c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 730ae16cbbSMarek Vasut if (!altera_validate (desc, (char *)__func__)) { 740ae16cbbSMarek Vasut printf("%s: Invalid device descriptor\n", __func__); 75*4a4c0a5eSMarek Vasut return FPGA_FAIL; 76*4a4c0a5eSMarek Vasut } 77*4a4c0a5eSMarek Vasut 78c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 79c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_ACEX1K: 80c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_ACEX) 810ae16cbbSMarek Vasut debug_cond(FPGA_DEBUG, 820ae16cbbSMarek Vasut "%s: Launching the ACEX1K Reader...\n", 830ae16cbbSMarek Vasut __func__); 84c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = ACEX1K_dump (desc, buf, bsize); 85c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 86c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("%s: No support for ACEX1K devices.\n", 870ae16cbbSMarek Vasut __func__); 88c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 89c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 90c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 91c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_STRATIX_II) 92c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_StratixII: 930ae16cbbSMarek Vasut debug_cond(FPGA_DEBUG, 940ae16cbbSMarek Vasut "%s: Launching the Stratix II Reader...\n", 950ae16cbbSMarek Vasut __func__); 96c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = StratixII_dump (desc, buf, bsize); 97c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 98c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 99c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 100c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("%s: Unsupported family type, %d\n", 1010ae16cbbSMarek Vasut __func__, desc->family); 102c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 103c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 104c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 105c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 106c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 107c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int altera_info(Altera_desc *desc) 108c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 109c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD int ret_val = FPGA_FAIL; 110c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 111*4a4c0a5eSMarek Vasut if (!altera_validate (desc, (char *)__func__)) { 112*4a4c0a5eSMarek Vasut printf("%s: Invalid device descriptor\n", __func__); 113*4a4c0a5eSMarek Vasut return FPGA_FAIL; 114*4a4c0a5eSMarek Vasut } 115*4a4c0a5eSMarek Vasut 116c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Family: \t"); 117c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 118c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_ACEX1K: 119c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("ACEX1K\n"); 120c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 121c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_CYC2: 122c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("CYCLON II\n"); 123c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 124c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_StratixII: 125c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Stratix II\n"); 126c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 127c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Add new family types here */ 128c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 129c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Unknown family type, %d\n", desc->family); 130c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 131c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 132c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Interface type:\t"); 133c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->iface) { 134c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case passive_serial: 135c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Passive Serial (PS)\n"); 136c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 137c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case passive_parallel_synchronous: 138c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Passive Parallel Synchronous (PPS)\n"); 139c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 140c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case passive_parallel_asynchronous: 141c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Passive Parallel Asynchronous (PPA)\n"); 142c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 143c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case passive_serial_asynchronous: 144c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Passive Serial Asynchronous (PSA)\n"); 145c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 146c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case altera_jtag_mode: /* Not used */ 147c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("JTAG Mode\n"); 148c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 149c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case fast_passive_parallel: 150c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Fast Passive Parallel (FPP)\n"); 151c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 152c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case fast_passive_parallel_security: 153*4a4c0a5eSMarek Vasut printf("Fast Passive Parallel with Security (FPPS)\n"); 154c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 155c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Add new interface types here */ 156c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 157c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Unsupported interface type, %d\n", desc->iface); 158c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 159c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 160ddc94378SSimon Glass printf("Device Size: \t%zd bytes\n" 161c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD "Cookie: \t0x%x (%d)\n", 162c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD desc->size, desc->cookie, desc->cookie); 163c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 164c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD if (desc->iface_fns) { 165c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("Device Function Table @ 0x%p\n", desc->iface_fns); 166c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD switch (desc->family) { 167c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_ACEX1K: 168c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_CYC2: 169c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_ACEX1K) 170c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ACEX1K_info(desc); 171c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #elif defined(CONFIG_FPGA_CYCLON2) 172c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD CYC2_info(desc); 173c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #else 174c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* just in case */ 175c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("%s: No support for ACEX1K devices.\n", 1760ae16cbbSMarek Vasut __func__); 177c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 178c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 179c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_FPGA_STRATIX_II) 180c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD case Altera_StratixII: 181c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD StratixII_info(desc); 182c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 183c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD #endif 184c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* Add new family types here */ 185c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD default: 186c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* we don't need a message here - we give one up above */ 187c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD break; 188c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 189c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } else { 190c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("No Device Function Table.\n"); 191c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 192c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 193c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD ret_val = FPGA_SUCCESS; 194c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 195c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD return ret_val; 196c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 197c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 198c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 199c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 200c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD static int altera_validate(Altera_desc *desc, const char *fn) 201c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD { 2025561a841SMarek Vasut if (!desc) { 203c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD printf("%s: NULL descriptor!\n", fn); 2045561a841SMarek Vasut return false; 205c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 206c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 2075561a841SMarek Vasut if ((desc->family < min_altera_type) || 2085561a841SMarek Vasut (desc->family > max_altera_type)) { 2095561a841SMarek Vasut printf("%s: Invalid family type, %d\n", fn, desc->family); 2105561a841SMarek Vasut return false; 2115561a841SMarek Vasut } 2125561a841SMarek Vasut 2135561a841SMarek Vasut if ((desc->iface < min_altera_iface_type) || 2145561a841SMarek Vasut (desc->iface > max_altera_iface_type)) { 2155561a841SMarek Vasut printf("%s: Invalid Interface type, %d\n", fn, desc->iface); 2165561a841SMarek Vasut return false; 2175561a841SMarek Vasut } 2185561a841SMarek Vasut 2195561a841SMarek Vasut if (!desc->size) { 2205561a841SMarek Vasut printf("%s: NULL part size\n", fn); 2215561a841SMarek Vasut return false; 2225561a841SMarek Vasut } 2235561a841SMarek Vasut 2245561a841SMarek Vasut return true; 225c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD } 226c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD 227c8aa7dfcSJean-Christophe PLAGNIOL-VILLARD /* ------------------------------------------------------------------------- */ 228