1 /* 2 * Copyright 2004,2007,2008 Freescale Semiconductor, Inc. 3 * (C) Copyright 2002, 2003 Motorola Inc. 4 * Xianghua Xiao (X.Xiao@motorola.com) 5 * 6 * (C) Copyright 2000 7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 8 * 9 * See file CREDITS for list of people who contributed to this 10 * project. 11 * 12 * This program is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License as 14 * published by the Free Software Foundation; either version 2 of 15 * the License, or (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 25 * MA 02111-1307 USA 26 */ 27 28 #include <config.h> 29 #include <common.h> 30 #include <asm/fsl_dma.h> 31 32 #if defined(CONFIG_MPC85xx) 33 volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); 34 #elif defined(CONFIG_MPC86xx) 35 volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR); 36 #else 37 #error "Freescale DMA engine not supported on your processor" 38 #endif 39 40 static void dma_sync(void) 41 { 42 #if defined(CONFIG_MPC85xx) 43 asm("sync; isync; msync"); 44 #elif defined(CONFIG_MPC86xx) 45 asm("sync; isync"); 46 #endif 47 } 48 49 static uint dma_check(void) { 50 volatile fsl_dma_t *dma = &dma_base->dma[0]; 51 volatile uint status = dma->sr; 52 53 /* While the channel is busy, spin */ 54 while (status & 4) 55 status = dma->sr; 56 57 /* clear MR[CS] channel start bit */ 58 dma->mr &= 1; 59 dma_sync(); 60 61 if (status != 0) 62 printf ("DMA Error: status = %x\n", status); 63 64 return status; 65 } 66 67 void dma_init(void) { 68 volatile fsl_dma_t *dma = &dma_base->dma[0]; 69 70 dma->satr = 0x00040000; 71 dma->datr = 0x00040000; 72 dma->sr = 0xffffffff; /* clear any errors */ 73 dma_sync(); 74 } 75 76 int dma_xfer(void *dest, uint count, void *src) { 77 volatile fsl_dma_t *dma = &dma_base->dma[0]; 78 79 dma->dar = (uint) dest; 80 dma->sar = (uint) src; 81 dma->bcr = count; 82 83 /* Disable bandwidth control, use direct transfer mode */ 84 dma->mr = 0xf000004; 85 dma_sync(); 86 87 /* Start the transfer */ 88 dma->mr = 0xf000005; 89 dma_sync(); 90 91 return dma_check(); 92 } 93