1*a0594cefSMugunthan V N /* 2*a0594cefSMugunthan V N * Direct Memory Access U-Class driver 3*a0594cefSMugunthan V N * 4*a0594cefSMugunthan V N * (C) Copyright 2015 5*a0594cefSMugunthan V N * Texas Instruments Incorporated, <www.ti.com> 6*a0594cefSMugunthan V N * 7*a0594cefSMugunthan V N * Author: Mugunthan V N <mugunthanvnm@ti.com> 8*a0594cefSMugunthan V N * 9*a0594cefSMugunthan V N * SPDX-License-Identifier: GPL-2.0+ 10*a0594cefSMugunthan V N */ 11*a0594cefSMugunthan V N 12*a0594cefSMugunthan V N #include <common.h> 13*a0594cefSMugunthan V N #include <dma.h> 14*a0594cefSMugunthan V N #include <dm.h> 15*a0594cefSMugunthan V N #include <dm/uclass-internal.h> 16*a0594cefSMugunthan V N #include <dm/device-internal.h> 17*a0594cefSMugunthan V N #include <errno.h> 18*a0594cefSMugunthan V N 19*a0594cefSMugunthan V N DECLARE_GLOBAL_DATA_PTR; 20*a0594cefSMugunthan V N 21*a0594cefSMugunthan V N int dma_get_device(u32 transfer_type, struct udevice **devp) 22*a0594cefSMugunthan V N { 23*a0594cefSMugunthan V N struct udevice *dev; 24*a0594cefSMugunthan V N int ret; 25*a0594cefSMugunthan V N 26*a0594cefSMugunthan V N for (ret = uclass_first_device(UCLASS_DMA, &dev); dev && !ret; 27*a0594cefSMugunthan V N ret = uclass_next_device(&dev)) { 28*a0594cefSMugunthan V N struct dma_dev_priv *uc_priv; 29*a0594cefSMugunthan V N 30*a0594cefSMugunthan V N uc_priv = dev_get_uclass_priv(dev); 31*a0594cefSMugunthan V N if (uc_priv->supported & transfer_type) 32*a0594cefSMugunthan V N break; 33*a0594cefSMugunthan V N } 34*a0594cefSMugunthan V N 35*a0594cefSMugunthan V N if (!dev) { 36*a0594cefSMugunthan V N error("No DMA device found that supports %x type\n", 37*a0594cefSMugunthan V N transfer_type); 38*a0594cefSMugunthan V N return -EPROTONOSUPPORT; 39*a0594cefSMugunthan V N } 40*a0594cefSMugunthan V N 41*a0594cefSMugunthan V N *devp = dev; 42*a0594cefSMugunthan V N 43*a0594cefSMugunthan V N return ret; 44*a0594cefSMugunthan V N } 45*a0594cefSMugunthan V N 46*a0594cefSMugunthan V N int dma_memcpy(void *dst, void *src, size_t len) 47*a0594cefSMugunthan V N { 48*a0594cefSMugunthan V N struct udevice *dev; 49*a0594cefSMugunthan V N const struct dma_ops *ops; 50*a0594cefSMugunthan V N int ret; 51*a0594cefSMugunthan V N 52*a0594cefSMugunthan V N ret = dma_get_device(DMA_SUPPORTS_MEM_TO_MEM, &dev); 53*a0594cefSMugunthan V N if (ret < 0) 54*a0594cefSMugunthan V N return ret; 55*a0594cefSMugunthan V N 56*a0594cefSMugunthan V N ops = device_get_ops(dev); 57*a0594cefSMugunthan V N if (!ops->transfer) 58*a0594cefSMugunthan V N return -ENOSYS; 59*a0594cefSMugunthan V N 60*a0594cefSMugunthan V N /* Invalidate the area, so no writeback into the RAM races with DMA */ 61*a0594cefSMugunthan V N invalidate_dcache_range((unsigned long)dst, (unsigned long)dst + 62*a0594cefSMugunthan V N roundup(len, ARCH_DMA_MINALIGN)); 63*a0594cefSMugunthan V N 64*a0594cefSMugunthan V N return ops->transfer(dev, DMA_MEM_TO_MEM, dst, src, len); 65*a0594cefSMugunthan V N } 66*a0594cefSMugunthan V N 67*a0594cefSMugunthan V N UCLASS_DRIVER(dma) = { 68*a0594cefSMugunthan V N .id = UCLASS_DMA, 69*a0594cefSMugunthan V N .name = "dma", 70*a0594cefSMugunthan V N .flags = DM_UC_FLAG_SEQ_ALIAS, 71*a0594cefSMugunthan V N .per_device_auto_alloc_size = sizeof(struct dma_dev_priv), 72*a0594cefSMugunthan V N }; 73