1*f1df9364SStefan Roese /* 2*f1df9364SStefan Roese * Copyright (C) Marvell International Ltd. and its affiliates 3*f1df9364SStefan Roese * 4*f1df9364SStefan Roese * SPDX-License-Identifier: GPL-2.0 5*f1df9364SStefan Roese */ 6*f1df9364SStefan Roese 7*f1df9364SStefan Roese #ifndef _DDR3_TRAINING_IP_PBS_H_ 8*f1df9364SStefan Roese #define _DDR3_TRAINING_IP_PBS_H_ 9*f1df9364SStefan Roese 10*f1df9364SStefan Roese enum { 11*f1df9364SStefan Roese EBA_CONFIG, 12*f1df9364SStefan Roese EEBA_CONFIG, 13*f1df9364SStefan Roese SBA_CONFIG 14*f1df9364SStefan Roese }; 15*f1df9364SStefan Roese 16*f1df9364SStefan Roese enum hws_training_load_op { 17*f1df9364SStefan Roese TRAINING_LOAD_OPERATION_UNLOAD, 18*f1df9364SStefan Roese TRAINING_LOAD_OPERATION_LOAD 19*f1df9364SStefan Roese }; 20*f1df9364SStefan Roese 21*f1df9364SStefan Roese enum hws_edge { 22*f1df9364SStefan Roese TRAINING_EDGE_1, 23*f1df9364SStefan Roese TRAINING_EDGE_2 24*f1df9364SStefan Roese }; 25*f1df9364SStefan Roese 26*f1df9364SStefan Roese enum hws_edge_search { 27*f1df9364SStefan Roese TRAINING_EDGE_MAX, 28*f1df9364SStefan Roese TRAINING_EDGE_MIN 29*f1df9364SStefan Roese }; 30*f1df9364SStefan Roese 31*f1df9364SStefan Roese enum pbs_dir { 32*f1df9364SStefan Roese PBS_TX_MODE = 0, 33*f1df9364SStefan Roese PBS_RX_MODE, 34*f1df9364SStefan Roese NUM_OF_PBS_MODES 35*f1df9364SStefan Roese }; 36*f1df9364SStefan Roese 37*f1df9364SStefan Roese int ddr3_tip_pbs_rx(u32 dev_num); 38*f1df9364SStefan Roese int ddr3_tip_print_all_pbs_result(u32 dev_num); 39*f1df9364SStefan Roese int ddr3_tip_pbs_tx(u32 dev_num); 40*f1df9364SStefan Roese 41*f1df9364SStefan Roese #endif /* _DDR3_TRAINING_IP_PBS_H_ */ 42