1*f1df9364SStefan Roese /* 2*f1df9364SStefan Roese * Copyright (C) Marvell International Ltd. and its affiliates 3*f1df9364SStefan Roese * 4*f1df9364SStefan Roese * SPDX-License-Identifier: GPL-2.0 5*f1df9364SStefan Roese */ 6*f1df9364SStefan Roese 7*f1df9364SStefan Roese #include <common.h> 8*f1df9364SStefan Roese #include <i2c.h> 9*f1df9364SStefan Roese #include <spl.h> 10*f1df9364SStefan Roese #include <asm/io.h> 11*f1df9364SStefan Roese #include <asm/arch/cpu.h> 12*f1df9364SStefan Roese #include <asm/arch/soc.h> 13*f1df9364SStefan Roese 14*f1df9364SStefan Roese #include "ddr3_init.h" 15*f1df9364SStefan Roese 16*f1df9364SStefan Roese /* 17*f1df9364SStefan Roese * Name: ddr3_tip_init_silicon 18*f1df9364SStefan Roese * Desc: initiate silicon parameters 19*f1df9364SStefan Roese * Args: 20*f1df9364SStefan Roese * Notes: 21*f1df9364SStefan Roese * Returns: required value 22*f1df9364SStefan Roese */ ddr3_silicon_init(void)23*f1df9364SStefan Roeseint ddr3_silicon_init(void) 24*f1df9364SStefan Roese { 25*f1df9364SStefan Roese int status; 26*f1df9364SStefan Roese static int init_done; 27*f1df9364SStefan Roese 28*f1df9364SStefan Roese if (init_done == 1) 29*f1df9364SStefan Roese return MV_OK; 30*f1df9364SStefan Roese 31*f1df9364SStefan Roese status = ddr3_tip_init_a38x(0, 0); 32*f1df9364SStefan Roese if (MV_OK != status) { 33*f1df9364SStefan Roese printf("DDR3 A38x silicon init - FAILED 0x%x\n", status); 34*f1df9364SStefan Roese return status; 35*f1df9364SStefan Roese } 36*f1df9364SStefan Roese 37*f1df9364SStefan Roese init_done = 1; 38*f1df9364SStefan Roese 39*f1df9364SStefan Roese return MV_OK; 40*f1df9364SStefan Roese } 41