1*f1df9364SStefan Roese# 2*f1df9364SStefan Roese# SPDX-License-Identifier: GPL-2.0+ 3*f1df9364SStefan Roese# 4*f1df9364SStefan Roese 5*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_a38x.o 6*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_a38x_training.o 7*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_debug.o 8*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_hws_hw_training.o 9*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_init.o 10*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training.o 11*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_bist.o 12*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_centralization.o 13*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_db.o 14*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_hw_algo.o 15*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_ip_engine.o 16*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_leveling.o 17*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_pbs.o 18*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += ddr3_training_static.o 19*f1df9364SStefan Roeseobj-$(CONFIG_SPL_BUILD) += xor.o 20