1# 2# Copyright 2008-2014 Freescale Semiconductor, Inc. 3# 4# SPDX-License-Identifier: GPL-2.0 5# 6 7obj-$(CONFIG_SYS_FSL_DDR1) += main.o util.o ctrl_regs.o options.o \ 8 lc_common_dimm_params.o 9obj-$(CONFIG_SYS_FSL_DDR2) += main.o util.o ctrl_regs.o options.o \ 10 lc_common_dimm_params.o 11obj-$(CONFIG_SYS_FSL_DDR3) += main.o util.o ctrl_regs.o options.o \ 12 lc_common_dimm_params.o 13obj-$(CONFIG_SYS_FSL_DDR4) += main.o util.o ctrl_regs.o options.o \ 14 lc_common_dimm_params.o 15 16ifdef CONFIG_DDR_SPD 17SPD := y 18endif 19ifdef CONFIG_SPD_EEPROM 20SPD := y 21endif 22ifdef SPD 23obj-$(CONFIG_SYS_FSL_DDR1) += ddr1_dimm_params.o 24obj-$(CONFIG_SYS_FSL_DDR2) += ddr2_dimm_params.o 25obj-$(CONFIG_SYS_FSL_DDR3) += ddr3_dimm_params.o 26obj-$(CONFIG_SYS_FSL_DDR4) += ddr4_dimm_params.o 27endif 28 29obj-$(CONFIG_FSL_DDR_INTERACTIVE) += interactive.o 30obj-$(CONFIG_SYS_FSL_DDRC_GEN1) += mpc85xx_ddr_gen1.o 31obj-$(CONFIG_SYS_FSL_DDRC_GEN2) += mpc85xx_ddr_gen2.o 32obj-$(CONFIG_SYS_FSL_DDRC_GEN3) += mpc85xx_ddr_gen3.o 33obj-$(CONFIG_SYS_FSL_DDRC_86XX_GEN2) += mpc86xx_ddr.o 34obj-$(CONFIG_SYS_FSL_DDRC_ARM_GEN3) += arm_ddr_gen3.o 35obj-$(CONFIG_SYS_FSL_DDRC_GEN4) += fsl_ddr_gen4.o 36obj-$(CONFIG_SYS_FSL_MMDC) += fsl_mmdc.o 37