10044c42eSStefan Roese /* 20044c42eSStefan Roese * (C) Copyright 2011 30044c42eSStefan Roese * Heiko Schocher, DENX Software Engineering, hs@denx.de. 40044c42eSStefan Roese * 5*abcaa6eeSTom Rini * A bootcount driver for the RTC IP block found on many TI platforms. 6*abcaa6eeSTom Rini * This requires the RTC clocks, etc, to be enabled prior to use and 7*abcaa6eeSTom Rini * not all boards with this IP block on it will have the RTC in use. 8*abcaa6eeSTom Rini * 91a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 100044c42eSStefan Roese */ 110044c42eSStefan Roese 120044c42eSStefan Roese #include <bootcount.h> 13155d424aSTom Rini #include <asm/davinci_rtc.h> 140044c42eSStefan Roese bootcount_store(ulong a)150044c42eSStefan Roesevoid bootcount_store(ulong a) 160044c42eSStefan Roese { 170044c42eSStefan Roese struct davinci_rtc *reg = 180044c42eSStefan Roese (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; 190044c42eSStefan Roese 200044c42eSStefan Roese /* 210044c42eSStefan Roese * write RTC kick register to enable write 220044c42eSStefan Roese * for RTC Scratch registers. Scratch0 and 1 are 230044c42eSStefan Roese * used for bootcount values. 240044c42eSStefan Roese */ 250044c42eSStefan Roese writel(RTC_KICK0R_WE, ®->kick0r); 260044c42eSStefan Roese writel(RTC_KICK1R_WE, ®->kick1r); 2722ee3975STom Rini raw_bootcount_store(®->scratch2, 2822ee3975STom Rini (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff)); 290044c42eSStefan Roese } 300044c42eSStefan Roese bootcount_load(void)310044c42eSStefan Roeseulong bootcount_load(void) 320044c42eSStefan Roese { 3322ee3975STom Rini unsigned long val; 340044c42eSStefan Roese struct davinci_rtc *reg = 350044c42eSStefan Roese (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; 360044c42eSStefan Roese 3722ee3975STom Rini val = raw_bootcount_load(®->scratch2); 3822ee3975STom Rini if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) 390044c42eSStefan Roese return 0; 400044c42eSStefan Roese else 4122ee3975STom Rini return val & 0x0000ffff; 420044c42eSStefan Roese } 43