10044c42eSStefan Roese /* 2*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 30044c42eSStefan Roese */ 40044c42eSStefan Roese 50044c42eSStefan Roese #include <common.h> 60044c42eSStefan Roese #include <asm/io.h> 70044c42eSStefan Roese #include <asm/arch/hardware.h> 80044c42eSStefan Roese #include <asm/arch/at91_gpbr.h> 90044c42eSStefan Roese 100044c42eSStefan Roese /* 110044c42eSStefan Roese * We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register. 120044c42eSStefan Roese * This is done so we need to use only one of the four GPBR registers. 130044c42eSStefan Roese */ bootcount_store(ulong a)140044c42eSStefan Roesevoid bootcount_store(ulong a) 150044c42eSStefan Roese { 160044c42eSStefan Roese at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; 170044c42eSStefan Roese 180044c42eSStefan Roese writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), 190044c42eSStefan Roese &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); 200044c42eSStefan Roese } 210044c42eSStefan Roese bootcount_load(void)220044c42eSStefan Roeseulong bootcount_load(void) 230044c42eSStefan Roese { 240044c42eSStefan Roese at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; 250044c42eSStefan Roese 260044c42eSStefan Roese ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); 270044c42eSStefan Roese if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) 280044c42eSStefan Roese return 0; 290044c42eSStefan Roese else 300044c42eSStefan Roese return val & 0x0000ffff; 310044c42eSStefan Roese } 32