1ece92f85SJason Jin /**************************************************************************** 2ece92f85SJason Jin * 3ece92f85SJason Jin * BIOS emulator and interface 4ece92f85SJason Jin * to Realmode X86 Emulator Library 5ece92f85SJason Jin * 6ece92f85SJason Jin * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. 7ece92f85SJason Jin * Jason Jin <Jason.jin@freescale.com> 8ece92f85SJason Jin * 9ece92f85SJason Jin * Copyright (C) 1996-1999 SciTech Software, Inc. 10ece92f85SJason Jin * 11ece92f85SJason Jin * ======================================================================== 12ece92f85SJason Jin * 13ece92f85SJason Jin * Permission to use, copy, modify, distribute, and sell this software and 14ece92f85SJason Jin * its documentation for any purpose is hereby granted without fee, 15ece92f85SJason Jin * provided that the above copyright notice appear in all copies and that 16ece92f85SJason Jin * both that copyright notice and this permission notice appear in 17ece92f85SJason Jin * supporting documentation, and that the name of the authors not be used 18ece92f85SJason Jin * in advertising or publicity pertaining to distribution of the software 19ece92f85SJason Jin * without specific, written prior permission. The authors makes no 20ece92f85SJason Jin * representations about the suitability of this software for any purpose. 21ece92f85SJason Jin * It is provided "as is" without express or implied warranty. 22ece92f85SJason Jin * 23ece92f85SJason Jin * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 24ece92f85SJason Jin * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 25ece92f85SJason Jin * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 26ece92f85SJason Jin * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF 27ece92f85SJason Jin * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 28ece92f85SJason Jin * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 29ece92f85SJason Jin * PERFORMANCE OF THIS SOFTWARE. 30ece92f85SJason Jin * 31ece92f85SJason Jin * ======================================================================== 32ece92f85SJason Jin * 33ece92f85SJason Jin * Language: ANSI C 34ece92f85SJason Jin * Environment: Any 35ece92f85SJason Jin * Developer: Kendall Bennett 36ece92f85SJason Jin * 37ece92f85SJason Jin * Description: Module implementing the BIOS specific functions. 38ece92f85SJason Jin * 39ece92f85SJason Jin * Jason ported this file to u-boot to run the ATI video card 40ece92f85SJason Jin * video BIOS. 41ece92f85SJason Jin * 42ece92f85SJason Jin ****************************************************************************/ 43ece92f85SJason Jin 44*5b4de930SMichal Simek #if defined(CONFIG_BIOSEMU) 45*5b4de930SMichal Simek 46ece92f85SJason Jin #include "biosemui.h" 47ece92f85SJason Jin 48ece92f85SJason Jin /*----------------------------- Implementation ----------------------------*/ 49ece92f85SJason Jin 50ece92f85SJason Jin /**************************************************************************** 51ece92f85SJason Jin PARAMETERS: 52ece92f85SJason Jin intno - Interrupt number being serviced 53ece92f85SJason Jin 54ece92f85SJason Jin REMARKS: 55ece92f85SJason Jin Handler for undefined interrupts. 56ece92f85SJason Jin ****************************************************************************/ 57ece92f85SJason Jin static void X86API undefined_intr(int intno) 58ece92f85SJason Jin { 59ece92f85SJason Jin if (BE_rdw(intno * 4 + 2) == BIOS_SEG) { 60ece92f85SJason Jin DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);) 61ece92f85SJason Jin } else 62ece92f85SJason Jin X86EMU_prepareForInt(intno); 63ece92f85SJason Jin } 64ece92f85SJason Jin 65ece92f85SJason Jin /**************************************************************************** 66ece92f85SJason Jin PARAMETERS: 67ece92f85SJason Jin intno - Interrupt number being serviced 68ece92f85SJason Jin 69ece92f85SJason Jin REMARKS: 70ece92f85SJason Jin This function handles the default system BIOS Int 10h (the default is stored 71ece92f85SJason Jin in the Int 42h vector by the system BIOS at bootup). We only need to handle 72ece92f85SJason Jin a small number of special functions used by the BIOS during POST time. 73ece92f85SJason Jin ****************************************************************************/ 74ece92f85SJason Jin static void X86API int42(int intno) 75ece92f85SJason Jin { 76ece92f85SJason Jin if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) { 77ece92f85SJason Jin if (M.x86.R_AL == 0) { 78ece92f85SJason Jin /* Enable CPU accesses to video memory */ 79ece92f85SJason Jin PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02); 80ece92f85SJason Jin return; 81ece92f85SJason Jin } else if (M.x86.R_AL == 1) { 82ece92f85SJason Jin /* Disable CPU accesses to video memory */ 83ece92f85SJason Jin PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02); 84ece92f85SJason Jin return; 85ece92f85SJason Jin } 86ece92f85SJason Jin #ifdef DEBUG 87ece92f85SJason Jin else { 88ece92f85SJason Jin printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n", 89ece92f85SJason Jin M.x86.R_AL); 90ece92f85SJason Jin } 91ece92f85SJason Jin #endif 92ece92f85SJason Jin } 93ece92f85SJason Jin #ifdef DEBUG 94ece92f85SJason Jin else { 95ece92f85SJason Jin printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n", 96ece92f85SJason Jin M.x86.R_AH, M.x86.R_AL, M.x86.R_BL); 97ece92f85SJason Jin } 98ece92f85SJason Jin #endif 99ece92f85SJason Jin } 100ece92f85SJason Jin 101ece92f85SJason Jin /**************************************************************************** 102ece92f85SJason Jin PARAMETERS: 103ece92f85SJason Jin intno - Interrupt number being serviced 104ece92f85SJason Jin 105ece92f85SJason Jin REMARKS: 106ece92f85SJason Jin This function handles the default system BIOS Int 10h. If the POST code 107ece92f85SJason Jin has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this 108ece92f85SJason Jin by simply calling the int42 interrupt handler above. Very early in the 109ece92f85SJason Jin BIOS POST process, the vector gets replaced and we simply let the real 110ece92f85SJason Jin mode interrupt handler process the interrupt. 111ece92f85SJason Jin ****************************************************************************/ 112ece92f85SJason Jin static void X86API int10(int intno) 113ece92f85SJason Jin { 114ece92f85SJason Jin if (BE_rdw(intno * 4 + 2) == BIOS_SEG) 115ece92f85SJason Jin int42(intno); 116ece92f85SJason Jin else 117ece92f85SJason Jin X86EMU_prepareForInt(intno); 118ece92f85SJason Jin } 119ece92f85SJason Jin 120ece92f85SJason Jin /* Result codes returned by the PCI BIOS */ 121ece92f85SJason Jin 122ece92f85SJason Jin #define SUCCESSFUL 0x00 123ece92f85SJason Jin #define FUNC_NOT_SUPPORT 0x81 124ece92f85SJason Jin #define BAD_VENDOR_ID 0x83 125ece92f85SJason Jin #define DEVICE_NOT_FOUND 0x86 126ece92f85SJason Jin #define BAD_REGISTER_NUMBER 0x87 127ece92f85SJason Jin #define SET_FAILED 0x88 128ece92f85SJason Jin #define BUFFER_TOO_SMALL 0x89 129ece92f85SJason Jin 130ece92f85SJason Jin /**************************************************************************** 131ece92f85SJason Jin PARAMETERS: 132ece92f85SJason Jin intno - Interrupt number being serviced 133ece92f85SJason Jin 134ece92f85SJason Jin REMARKS: 135ece92f85SJason Jin This function handles the default Int 1Ah interrupt handler for the real 136ece92f85SJason Jin mode code, which provides support for the PCI BIOS functions. Since we only 137ece92f85SJason Jin want to allow the real mode BIOS code *only* see the PCI config space for 138ece92f85SJason Jin its own device, we only return information for the specific PCI config 139ece92f85SJason Jin space that we have passed in to the init function. This solves problems 140ece92f85SJason Jin when using the BIOS to warm boot a secondary adapter when there is an 141ece92f85SJason Jin identical adapter before it on the bus (some BIOS'es get confused in this 142ece92f85SJason Jin case). 143ece92f85SJason Jin ****************************************************************************/ 144ece92f85SJason Jin static void X86API int1A(int unused) 145ece92f85SJason Jin { 146ece92f85SJason Jin u16 pciSlot; 147ece92f85SJason Jin 148ece92f85SJason Jin #ifdef __KERNEL__ 149ece92f85SJason Jin u8 interface, subclass, baseclass; 150ece92f85SJason Jin 151ece92f85SJason Jin /* Initialise the PCI slot number */ 152ece92f85SJason Jin pciSlot = ((int)_BE_env.vgaInfo.bus << 8) | 153ece92f85SJason Jin ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function; 154ece92f85SJason Jin #else 155ece92f85SJason Jin /* Fail if no PCI device information has been registered */ 156ece92f85SJason Jin if (!_BE_env.vgaInfo.pciInfo) 157ece92f85SJason Jin return; 158ece92f85SJason Jin 159ece92f85SJason Jin pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8); 160ece92f85SJason Jin #endif 161ece92f85SJason Jin switch (M.x86.R_AX) { 162ece92f85SJason Jin case 0xB101: /* PCI bios present? */ 163ece92f85SJason Jin M.x86.R_AL = 0x00; /* no config space/special cycle generation support */ 164ece92f85SJason Jin M.x86.R_EDX = 0x20494350; /* " ICP" */ 165ece92f85SJason Jin M.x86.R_BX = 0x0210; /* Version 2.10 */ 166ece92f85SJason Jin M.x86.R_CL = 0; /* Max bus number in system */ 167ece92f85SJason Jin CLEAR_FLAG(F_CF); 168ece92f85SJason Jin break; 169ece92f85SJason Jin case 0xB102: /* Find PCI device */ 170ece92f85SJason Jin M.x86.R_AH = DEVICE_NOT_FOUND; 171ece92f85SJason Jin #ifdef __KERNEL__ 172ece92f85SJason Jin if (M.x86.R_DX == _BE_env.vgaInfo.VendorID && 173ece92f85SJason Jin M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) { 174ece92f85SJason Jin #else 175ece92f85SJason Jin if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID && 176ece92f85SJason Jin M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID && 177ece92f85SJason Jin M.x86.R_SI == 0) { 178ece92f85SJason Jin #endif 179ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 180ece92f85SJason Jin M.x86.R_BX = pciSlot; 181ece92f85SJason Jin } 182ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 183ece92f85SJason Jin break; 184ece92f85SJason Jin case 0xB103: /* Find PCI class code */ 185ece92f85SJason Jin M.x86.R_AH = DEVICE_NOT_FOUND; 186ece92f85SJason Jin #ifdef __KERNEL__ 187ece92f85SJason Jin pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG, 188ece92f85SJason Jin &interface); 189ece92f85SJason Jin pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE, 190ece92f85SJason Jin &subclass); 191ece92f85SJason Jin pci_read_config_byte(_BE_env.vgaInfo.pcidev, 192ece92f85SJason Jin PCI_CLASS_DEVICE + 1, &baseclass); 193ece92f85SJason Jin if (M.x86.R_CL == interface && M.x86.R_CH == subclass 194ece92f85SJason Jin && (u8) (M.x86.R_ECX >> 16) == baseclass) { 195ece92f85SJason Jin #else 196ece92f85SJason Jin if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface && 197ece92f85SJason Jin M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass && 198ece92f85SJason Jin (u8) (M.x86.R_ECX >> 16) == 199ece92f85SJason Jin _BE_env.vgaInfo.pciInfo->BaseClass) { 200ece92f85SJason Jin #endif 201ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 202ece92f85SJason Jin M.x86.R_BX = pciSlot; 203ece92f85SJason Jin } 204ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 205ece92f85SJason Jin break; 206ece92f85SJason Jin case 0xB108: /* Read configuration byte */ 207ece92f85SJason Jin M.x86.R_AH = BAD_REGISTER_NUMBER; 208ece92f85SJason Jin if (M.x86.R_BX == pciSlot) { 209ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 210ece92f85SJason Jin #ifdef __KERNEL__ 211ece92f85SJason Jin pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI, 212ece92f85SJason Jin &M.x86.R_CL); 213ece92f85SJason Jin #else 214ece92f85SJason Jin M.x86.R_CL = 215ece92f85SJason Jin (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE, 216ece92f85SJason Jin _BE_env.vgaInfo.pciInfo); 217ece92f85SJason Jin #endif 218ece92f85SJason Jin } 219ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 220ece92f85SJason Jin break; 221ece92f85SJason Jin case 0xB109: /* Read configuration word */ 222ece92f85SJason Jin M.x86.R_AH = BAD_REGISTER_NUMBER; 223ece92f85SJason Jin if (M.x86.R_BX == pciSlot) { 224ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 225ece92f85SJason Jin #ifdef __KERNEL__ 226ece92f85SJason Jin pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI, 227ece92f85SJason Jin &M.x86.R_CX); 228ece92f85SJason Jin #else 229ece92f85SJason Jin M.x86.R_CX = 230ece92f85SJason Jin (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD, 231ece92f85SJason Jin _BE_env.vgaInfo.pciInfo); 232ece92f85SJason Jin #endif 233ece92f85SJason Jin } 234ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 235ece92f85SJason Jin break; 236ece92f85SJason Jin case 0xB10A: /* Read configuration dword */ 237ece92f85SJason Jin M.x86.R_AH = BAD_REGISTER_NUMBER; 238ece92f85SJason Jin if (M.x86.R_BX == pciSlot) { 239ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 240ece92f85SJason Jin #ifdef __KERNEL__ 241ece92f85SJason Jin pci_read_config_dword(_BE_env.vgaInfo.pcidev, 242ece92f85SJason Jin M.x86.R_DI, &M.x86.R_ECX); 243ece92f85SJason Jin #else 244ece92f85SJason Jin M.x86.R_ECX = 245ece92f85SJason Jin (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD, 246ece92f85SJason Jin _BE_env.vgaInfo.pciInfo); 247ece92f85SJason Jin #endif 248ece92f85SJason Jin } 249ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 250ece92f85SJason Jin break; 251ece92f85SJason Jin case 0xB10B: /* Write configuration byte */ 252ece92f85SJason Jin M.x86.R_AH = BAD_REGISTER_NUMBER; 253ece92f85SJason Jin if (M.x86.R_BX == pciSlot) { 254ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 255ece92f85SJason Jin #ifdef __KERNEL__ 256ece92f85SJason Jin pci_write_config_byte(_BE_env.vgaInfo.pcidev, 257ece92f85SJason Jin M.x86.R_DI, M.x86.R_CL); 258ece92f85SJason Jin #else 259ece92f85SJason Jin PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE, 260ece92f85SJason Jin _BE_env.vgaInfo.pciInfo); 261ece92f85SJason Jin #endif 262ece92f85SJason Jin } 263ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 264ece92f85SJason Jin break; 265ece92f85SJason Jin case 0xB10C: /* Write configuration word */ 266ece92f85SJason Jin M.x86.R_AH = BAD_REGISTER_NUMBER; 267ece92f85SJason Jin if (M.x86.R_BX == pciSlot) { 268ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 269ece92f85SJason Jin #ifdef __KERNEL__ 270ece92f85SJason Jin pci_write_config_word(_BE_env.vgaInfo.pcidev, 271ece92f85SJason Jin M.x86.R_DI, M.x86.R_CX); 272ece92f85SJason Jin #else 273ece92f85SJason Jin PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD, 274ece92f85SJason Jin _BE_env.vgaInfo.pciInfo); 275ece92f85SJason Jin #endif 276ece92f85SJason Jin } 277ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 278ece92f85SJason Jin break; 279ece92f85SJason Jin case 0xB10D: /* Write configuration dword */ 280ece92f85SJason Jin M.x86.R_AH = BAD_REGISTER_NUMBER; 281ece92f85SJason Jin if (M.x86.R_BX == pciSlot) { 282ece92f85SJason Jin M.x86.R_AH = SUCCESSFUL; 283ece92f85SJason Jin #ifdef __KERNEL__ 284ece92f85SJason Jin pci_write_config_dword(_BE_env.vgaInfo.pcidev, 285ece92f85SJason Jin M.x86.R_DI, M.x86.R_ECX); 286ece92f85SJason Jin #else 287ece92f85SJason Jin PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD, 288ece92f85SJason Jin _BE_env.vgaInfo.pciInfo); 289ece92f85SJason Jin #endif 290ece92f85SJason Jin } 291ece92f85SJason Jin CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 292ece92f85SJason Jin break; 293ece92f85SJason Jin default: 294ece92f85SJason Jin printf("biosEmu/bios.int1a: unknown function AX=%#04x\n", 295ece92f85SJason Jin M.x86.R_AX); 296ece92f85SJason Jin } 297ece92f85SJason Jin } 298ece92f85SJason Jin 299ece92f85SJason Jin /**************************************************************************** 300ece92f85SJason Jin REMARKS: 301ece92f85SJason Jin This function initialises the BIOS emulation functions for the specific 302ece92f85SJason Jin PCI display device. We insulate the real mode BIOS from any other devices 303ece92f85SJason Jin on the bus, so that it will work correctly thinking that it is the only 304ece92f85SJason Jin device present on the bus (ie: avoiding any adapters present in from of 305ece92f85SJason Jin the device we are trying to control). 306ece92f85SJason Jin ****************************************************************************/ 307ece92f85SJason Jin #define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16)) 308ece92f85SJason Jin 309ece92f85SJason Jin void _BE_bios_init(u32 * intrTab) 310ece92f85SJason Jin { 311ece92f85SJason Jin int i; 312ece92f85SJason Jin X86EMU_intrFuncs bios_intr_tab[256]; 313ece92f85SJason Jin 314ece92f85SJason Jin for (i = 0; i < 256; ++i) { 315ece92f85SJason Jin intrTab[i] = BE_constLE_32(BIOS_SEG << 16); 316ece92f85SJason Jin bios_intr_tab[i] = undefined_intr; 317ece92f85SJason Jin } 318ece92f85SJason Jin bios_intr_tab[0x10] = int10; 319ece92f85SJason Jin bios_intr_tab[0x1A] = int1A; 320ece92f85SJason Jin bios_intr_tab[0x42] = int42; 321ece92f85SJason Jin bios_intr_tab[0x6D] = int10; 322ece92f85SJason Jin X86EMU_setupIntrFuncs(bios_intr_tab); 323ece92f85SJason Jin } 324ce981dc8SJason Jin #endif 325