xref: /rk3399_rockchip-uboot/drivers/bios_emulator/bios.c (revision 7282672d298905088fb3c7c0a049d7d7d31cb8b4)
1ece92f85SJason Jin /****************************************************************************
2ece92f85SJason Jin *
3ece92f85SJason Jin *                        BIOS emulator and interface
4ece92f85SJason Jin *                      to Realmode X86 Emulator Library
5ece92f85SJason Jin *
64c2e3da8SKumar Gala *  Copyright (C) 2007 Freescale Semiconductor, Inc.
7ece92f85SJason Jin *  Jason Jin <Jason.jin@freescale.com>
8ece92f85SJason Jin *
9ece92f85SJason Jin *               Copyright (C) 1996-1999 SciTech Software, Inc.
10ece92f85SJason Jin *
11ece92f85SJason Jin *  ========================================================================
12ece92f85SJason Jin *
13ece92f85SJason Jin *  Permission to use, copy, modify, distribute, and sell this software and
14ece92f85SJason Jin *  its documentation for any purpose is hereby granted without fee,
15ece92f85SJason Jin *  provided that the above copyright notice appear in all copies and that
16ece92f85SJason Jin *  both that copyright notice and this permission notice appear in
17ece92f85SJason Jin *  supporting documentation, and that the name of the authors not be used
18ece92f85SJason Jin *  in advertising or publicity pertaining to distribution of the software
19ece92f85SJason Jin *  without specific, written prior permission.  The authors makes no
20ece92f85SJason Jin *  representations about the suitability of this software for any purpose.
21ece92f85SJason Jin *  It is provided "as is" without express or implied warranty.
22ece92f85SJason Jin *
23ece92f85SJason Jin *  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
24ece92f85SJason Jin *  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
25ece92f85SJason Jin *  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
26ece92f85SJason Jin *  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
27ece92f85SJason Jin *  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
28ece92f85SJason Jin *  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
29ece92f85SJason Jin *  PERFORMANCE OF THIS SOFTWARE.
30ece92f85SJason Jin *
31ece92f85SJason Jin *  ========================================================================
32ece92f85SJason Jin *
33ece92f85SJason Jin * Language:     ANSI C
34ece92f85SJason Jin * Environment:  Any
35ece92f85SJason Jin * Developer:    Kendall Bennett
36ece92f85SJason Jin *
37ece92f85SJason Jin * Description:  Module implementing the BIOS specific functions.
38ece92f85SJason Jin *
39ece92f85SJason Jin *		Jason ported this file to u-boot to run the ATI video card
40ece92f85SJason Jin *		video BIOS.
41ece92f85SJason Jin *
42ece92f85SJason Jin ****************************************************************************/
43ece92f85SJason Jin 
44b2da8038SLinus Walleij #define __io
4578cff50eSMichal Simek #include <common.h>
46f46f3f35SSimon Glass #include <asm/io.h>
47ece92f85SJason Jin #include "biosemui.h"
48ece92f85SJason Jin 
49ece92f85SJason Jin /*----------------------------- Implementation ----------------------------*/
50ece92f85SJason Jin 
51ece92f85SJason Jin /****************************************************************************
52ece92f85SJason Jin PARAMETERS:
53ece92f85SJason Jin intno   - Interrupt number being serviced
54ece92f85SJason Jin 
55ece92f85SJason Jin REMARKS:
56ece92f85SJason Jin Handler for undefined interrupts.
57ece92f85SJason Jin ****************************************************************************/
undefined_intr(int intno)58ece92f85SJason Jin static void X86API undefined_intr(int intno)
59ece92f85SJason Jin {
60ece92f85SJason Jin 	if (BE_rdw(intno * 4 + 2) == BIOS_SEG) {
61ece92f85SJason Jin 		DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);)
62ece92f85SJason Jin 	} else
63ece92f85SJason Jin 		X86EMU_prepareForInt(intno);
64ece92f85SJason Jin }
65ece92f85SJason Jin 
66ece92f85SJason Jin /****************************************************************************
67ece92f85SJason Jin PARAMETERS:
68ece92f85SJason Jin intno   - Interrupt number being serviced
69ece92f85SJason Jin 
70ece92f85SJason Jin REMARKS:
71ece92f85SJason Jin This function handles the default system BIOS Int 10h (the default is stored
72ece92f85SJason Jin in the Int 42h vector by the system BIOS at bootup). We only need to handle
73ece92f85SJason Jin a small number of special functions used by the BIOS during POST time.
74ece92f85SJason Jin ****************************************************************************/
int42(int intno)75ece92f85SJason Jin static void X86API int42(int intno)
76ece92f85SJason Jin {
77ece92f85SJason Jin 	if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
78ece92f85SJason Jin 		if (M.x86.R_AL == 0) {
79ece92f85SJason Jin 			/* Enable CPU accesses to video memory */
80ece92f85SJason Jin 			PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02);
81ece92f85SJason Jin 			return;
82ece92f85SJason Jin 		} else if (M.x86.R_AL == 1) {
83ece92f85SJason Jin 			/* Disable CPU accesses to video memory */
84ece92f85SJason Jin 			PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
85ece92f85SJason Jin 			return;
86ece92f85SJason Jin 		}
87b3521f2eSSimon Glass #ifdef CONFIG_X86EMU_DEBUG
88ece92f85SJason Jin 		else {
89ece92f85SJason Jin 			printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
90ece92f85SJason Jin 			     M.x86.R_AL);
91ece92f85SJason Jin 		}
92ece92f85SJason Jin #endif
93ece92f85SJason Jin 	}
94b3521f2eSSimon Glass #ifdef CONFIG_X86EMU_DEBUG
95ece92f85SJason Jin 	else {
96ece92f85SJason Jin 		printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
97ece92f85SJason Jin 		     M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
98ece92f85SJason Jin 	}
99ece92f85SJason Jin #endif
100ece92f85SJason Jin }
101ece92f85SJason Jin 
102ece92f85SJason Jin /****************************************************************************
103ece92f85SJason Jin PARAMETERS:
104ece92f85SJason Jin intno   - Interrupt number being serviced
105ece92f85SJason Jin 
106ece92f85SJason Jin REMARKS:
107ece92f85SJason Jin This function handles the default system BIOS Int 10h. If the POST code
108ece92f85SJason Jin has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
109ece92f85SJason Jin by simply calling the int42 interrupt handler above. Very early in the
110ece92f85SJason Jin BIOS POST process, the vector gets replaced and we simply let the real
111ece92f85SJason Jin mode interrupt handler process the interrupt.
112ece92f85SJason Jin ****************************************************************************/
int10(int intno)113ece92f85SJason Jin static void X86API int10(int intno)
114ece92f85SJason Jin {
115ece92f85SJason Jin 	if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
116ece92f85SJason Jin 		int42(intno);
117ece92f85SJason Jin 	else
118ece92f85SJason Jin 		X86EMU_prepareForInt(intno);
119ece92f85SJason Jin }
120ece92f85SJason Jin 
121ece92f85SJason Jin /* Result codes returned by the PCI BIOS */
122ece92f85SJason Jin 
123ece92f85SJason Jin #define SUCCESSFUL          0x00
124ece92f85SJason Jin #define FUNC_NOT_SUPPORT    0x81
125ece92f85SJason Jin #define BAD_VENDOR_ID       0x83
126ece92f85SJason Jin #define DEVICE_NOT_FOUND    0x86
127ece92f85SJason Jin #define BAD_REGISTER_NUMBER 0x87
128ece92f85SJason Jin #define SET_FAILED          0x88
129ece92f85SJason Jin #define BUFFER_TOO_SMALL    0x89
130ece92f85SJason Jin 
131ece92f85SJason Jin /****************************************************************************
132ece92f85SJason Jin PARAMETERS:
133ece92f85SJason Jin intno   - Interrupt number being serviced
134ece92f85SJason Jin 
135ece92f85SJason Jin REMARKS:
136ece92f85SJason Jin This function handles the default Int 1Ah interrupt handler for the real
137ece92f85SJason Jin mode code, which provides support for the PCI BIOS functions. Since we only
138ece92f85SJason Jin want to allow the real mode BIOS code *only* see the PCI config space for
139ece92f85SJason Jin its own device, we only return information for the specific PCI config
140ece92f85SJason Jin space that we have passed in to the init function. This solves problems
141ece92f85SJason Jin when using the BIOS to warm boot a secondary adapter when there is an
142ece92f85SJason Jin identical adapter before it on the bus (some BIOS'es get confused in this
143ece92f85SJason Jin case).
144ece92f85SJason Jin ****************************************************************************/
int1A(int unused)145ece92f85SJason Jin static void X86API int1A(int unused)
146ece92f85SJason Jin {
147ece92f85SJason Jin 	u16 pciSlot;
148ece92f85SJason Jin 
149ece92f85SJason Jin #ifdef __KERNEL__
150ece92f85SJason Jin 	u8 interface, subclass, baseclass;
151ece92f85SJason Jin 
152ece92f85SJason Jin 	/* Initialise the PCI slot number */
153ece92f85SJason Jin 	pciSlot = ((int)_BE_env.vgaInfo.bus << 8) |
154ece92f85SJason Jin 	    ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function;
155ece92f85SJason Jin #else
156ece92f85SJason Jin /* Fail if no PCI device information has been registered */
157ece92f85SJason Jin 	if (!_BE_env.vgaInfo.pciInfo)
158ece92f85SJason Jin 		return;
159ece92f85SJason Jin 
160ece92f85SJason Jin 	pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8);
161ece92f85SJason Jin #endif
162ece92f85SJason Jin 	switch (M.x86.R_AX) {
163ece92f85SJason Jin 	case 0xB101:		/* PCI bios present? */
164ece92f85SJason Jin 		M.x86.R_AL = 0x00;	/* no config space/special cycle generation support */
165ece92f85SJason Jin 		M.x86.R_EDX = 0x20494350;	/* " ICP" */
166ece92f85SJason Jin 		M.x86.R_BX = 0x0210;	/* Version 2.10 */
167ece92f85SJason Jin 		M.x86.R_CL = 0;	/* Max bus number in system */
168ece92f85SJason Jin 		CLEAR_FLAG(F_CF);
169ece92f85SJason Jin 		break;
170ece92f85SJason Jin 	case 0xB102:		/* Find PCI device */
171ece92f85SJason Jin 		M.x86.R_AH = DEVICE_NOT_FOUND;
172ece92f85SJason Jin #ifdef __KERNEL__
173ece92f85SJason Jin 		if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
174ece92f85SJason Jin 		    M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
175ece92f85SJason Jin #else
176ece92f85SJason Jin 		if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
177ece92f85SJason Jin 		    M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
178ece92f85SJason Jin 		    M.x86.R_SI == 0) {
179ece92f85SJason Jin #endif
180ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
181ece92f85SJason Jin 			M.x86.R_BX = pciSlot;
182ece92f85SJason Jin 		}
183ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
184ece92f85SJason Jin 		break;
185ece92f85SJason Jin 	case 0xB103:		/* Find PCI class code */
186ece92f85SJason Jin 		M.x86.R_AH = DEVICE_NOT_FOUND;
187ece92f85SJason Jin #ifdef __KERNEL__
188*7282672dSSimon Glass #ifdef CONFIG_DM_PCI
189*7282672dSSimon Glass 		dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
190*7282672dSSimon Glass 				    &interface);
191*7282672dSSimon Glass 		dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
192*7282672dSSimon Glass 				    &subclass);
193*7282672dSSimon Glass 		dm_pci_read_config8(_BE_env.vgaInfo.pcidev,
194*7282672dSSimon Glass 				    PCI_CLASS_DEVICE + 1, &baseclass);
195*7282672dSSimon Glass #else
196ece92f85SJason Jin 		pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
197ece92f85SJason Jin 				     &interface);
198ece92f85SJason Jin 		pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
199ece92f85SJason Jin 				     &subclass);
200ece92f85SJason Jin 		pci_read_config_byte(_BE_env.vgaInfo.pcidev,
201ece92f85SJason Jin 				     PCI_CLASS_DEVICE + 1, &baseclass);
202*7282672dSSimon Glass #endif
203ece92f85SJason Jin 		if (M.x86.R_CL == interface && M.x86.R_CH == subclass
204ece92f85SJason Jin 		    && (u8) (M.x86.R_ECX >> 16) == baseclass) {
205ece92f85SJason Jin #else
206ece92f85SJason Jin 		if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
207ece92f85SJason Jin 		    M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
208ece92f85SJason Jin 		    (u8) (M.x86.R_ECX >> 16) ==
209ece92f85SJason Jin 		    _BE_env.vgaInfo.pciInfo->BaseClass) {
210ece92f85SJason Jin #endif
211ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
212ece92f85SJason Jin 			M.x86.R_BX = pciSlot;
213ece92f85SJason Jin 		}
214ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
215ece92f85SJason Jin 		break;
216ece92f85SJason Jin 	case 0xB108:		/* Read configuration byte */
217ece92f85SJason Jin 		M.x86.R_AH = BAD_REGISTER_NUMBER;
218ece92f85SJason Jin 		if (M.x86.R_BX == pciSlot) {
219ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
220ece92f85SJason Jin #ifdef __KERNEL__
221*7282672dSSimon Glass # ifdef CONFIG_DM_PCI
222*7282672dSSimon Glass 			dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
223*7282672dSSimon Glass 					    &M.x86.R_CL);
224*7282672dSSimon Glass # else
225ece92f85SJason Jin 			pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
226ece92f85SJason Jin 					     &M.x86.R_CL);
227*7282672dSSimon Glass # endif
228ece92f85SJason Jin #else
229ece92f85SJason Jin 			M.x86.R_CL =
230ece92f85SJason Jin 			    (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
231ece92f85SJason Jin 					       _BE_env.vgaInfo.pciInfo);
232ece92f85SJason Jin #endif
233ece92f85SJason Jin 		}
234ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
235ece92f85SJason Jin 		break;
236ece92f85SJason Jin 	case 0xB109:		/* Read configuration word */
237ece92f85SJason Jin 		M.x86.R_AH = BAD_REGISTER_NUMBER;
238ece92f85SJason Jin 		if (M.x86.R_BX == pciSlot) {
239ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
240ece92f85SJason Jin #ifdef __KERNEL__
241*7282672dSSimon Glass # ifdef CONFIG_DM_PCI
242*7282672dSSimon Glass 			dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
243*7282672dSSimon Glass 					     &M.x86.R_CX);
244*7282672dSSimon Glass # else
245ece92f85SJason Jin 			pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
246ece92f85SJason Jin 					     &M.x86.R_CX);
247*7282672dSSimon Glass # endif
248ece92f85SJason Jin #else
249ece92f85SJason Jin 			M.x86.R_CX =
250ece92f85SJason Jin 			    (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
251ece92f85SJason Jin 						_BE_env.vgaInfo.pciInfo);
252ece92f85SJason Jin #endif
253ece92f85SJason Jin 		}
254ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
255ece92f85SJason Jin 		break;
256ece92f85SJason Jin 	case 0xB10A:		/* Read configuration dword */
257ece92f85SJason Jin 		M.x86.R_AH = BAD_REGISTER_NUMBER;
258ece92f85SJason Jin 		if (M.x86.R_BX == pciSlot) {
259ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
260ece92f85SJason Jin #ifdef __KERNEL__
261*7282672dSSimon Glass # ifdef CONFIG_DM_PCI
262*7282672dSSimon Glass 			dm_pci_read_config32(_BE_env.vgaInfo.pcidev,
263*7282672dSSimon Glass 					     M.x86.R_DI, &M.x86.R_ECX);
264*7282672dSSimon Glass # else
265ece92f85SJason Jin 			pci_read_config_dword(_BE_env.vgaInfo.pcidev,
266ece92f85SJason Jin 					      M.x86.R_DI, &M.x86.R_ECX);
267*7282672dSSimon Glass # endif
268ece92f85SJason Jin #else
269ece92f85SJason Jin 			M.x86.R_ECX =
270ece92f85SJason Jin 			    (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
271ece92f85SJason Jin 						_BE_env.vgaInfo.pciInfo);
272ece92f85SJason Jin #endif
273ece92f85SJason Jin 		}
274ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
275ece92f85SJason Jin 		break;
276ece92f85SJason Jin 	case 0xB10B:		/* Write configuration byte */
277ece92f85SJason Jin 		M.x86.R_AH = BAD_REGISTER_NUMBER;
278ece92f85SJason Jin 		if (M.x86.R_BX == pciSlot) {
279ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
280ece92f85SJason Jin #ifdef __KERNEL__
281*7282672dSSimon Glass # ifdef CONFIG_DM_PCI
282*7282672dSSimon Glass 			dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
283*7282672dSSimon Glass 					     M.x86.R_DI, M.x86.R_CL);
284*7282672dSSimon Glass # else
285ece92f85SJason Jin 			pci_write_config_byte(_BE_env.vgaInfo.pcidev,
286ece92f85SJason Jin 					      M.x86.R_DI, M.x86.R_CL);
287*7282672dSSimon Glass # endif
288ece92f85SJason Jin #else
289ece92f85SJason Jin 			PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
290ece92f85SJason Jin 				      _BE_env.vgaInfo.pciInfo);
291ece92f85SJason Jin #endif
292ece92f85SJason Jin 		}
293ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
294ece92f85SJason Jin 		break;
295ece92f85SJason Jin 	case 0xB10C:		/* Write configuration word */
296ece92f85SJason Jin 		M.x86.R_AH = BAD_REGISTER_NUMBER;
297ece92f85SJason Jin 		if (M.x86.R_BX == pciSlot) {
298ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
299ece92f85SJason Jin #ifdef __KERNEL__
300*7282672dSSimon Glass # ifdef CONFIG_DM_PCI
301*7282672dSSimon Glass 			dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
302*7282672dSSimon Glass 					      M.x86.R_DI, M.x86.R_CX);
303*7282672dSSimon Glass # else
304ece92f85SJason Jin 			pci_write_config_word(_BE_env.vgaInfo.pcidev,
305ece92f85SJason Jin 					      M.x86.R_DI, M.x86.R_CX);
306*7282672dSSimon Glass # endif
307ece92f85SJason Jin #else
308ece92f85SJason Jin 			PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
309ece92f85SJason Jin 				      _BE_env.vgaInfo.pciInfo);
310ece92f85SJason Jin #endif
311ece92f85SJason Jin 		}
312ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
313ece92f85SJason Jin 		break;
314ece92f85SJason Jin 	case 0xB10D:		/* Write configuration dword */
315ece92f85SJason Jin 		M.x86.R_AH = BAD_REGISTER_NUMBER;
316ece92f85SJason Jin 		if (M.x86.R_BX == pciSlot) {
317ece92f85SJason Jin 			M.x86.R_AH = SUCCESSFUL;
318ece92f85SJason Jin #ifdef __KERNEL__
319*7282672dSSimon Glass # ifdef CONFIG_DM_PCI
320*7282672dSSimon Glass 			dm_pci_write_config32(_BE_env.vgaInfo.pcidev,
321*7282672dSSimon Glass 					      M.x86.R_DI, M.x86.R_ECX);
322*7282672dSSimon Glass # else
323ece92f85SJason Jin 			pci_write_config_dword(_BE_env.vgaInfo.pcidev,
324ece92f85SJason Jin 					       M.x86.R_DI, M.x86.R_ECX);
325*7282672dSSimon Glass # endif
326ece92f85SJason Jin #else
327ece92f85SJason Jin 			PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
328ece92f85SJason Jin 				      _BE_env.vgaInfo.pciInfo);
329ece92f85SJason Jin #endif
330ece92f85SJason Jin 		}
331ece92f85SJason Jin 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
332ece92f85SJason Jin 		break;
333ece92f85SJason Jin 	default:
334ece92f85SJason Jin 		printf("biosEmu/bios.int1a: unknown function AX=%#04x\n",
335ece92f85SJason Jin 		       M.x86.R_AX);
336ece92f85SJason Jin 	}
337ece92f85SJason Jin }
338ece92f85SJason Jin 
339ece92f85SJason Jin /****************************************************************************
340ece92f85SJason Jin REMARKS:
341ece92f85SJason Jin This function initialises the BIOS emulation functions for the specific
342ece92f85SJason Jin PCI display device. We insulate the real mode BIOS from any other devices
343ece92f85SJason Jin on the bus, so that it will work correctly thinking that it is the only
344ece92f85SJason Jin device present on the bus (ie: avoiding any adapters present in from of
345ece92f85SJason Jin the device we are trying to control).
346ece92f85SJason Jin ****************************************************************************/
347ece92f85SJason Jin #define BE_constLE_32(v)    ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16))
348ece92f85SJason Jin 
349ece92f85SJason Jin void _BE_bios_init(u32 * intrTab)
350ece92f85SJason Jin {
351ece92f85SJason Jin 	int i;
352ece92f85SJason Jin 	X86EMU_intrFuncs bios_intr_tab[256];
353ece92f85SJason Jin 
354ece92f85SJason Jin 	for (i = 0; i < 256; ++i) {
355ece92f85SJason Jin 		intrTab[i] = BE_constLE_32(BIOS_SEG << 16);
356ece92f85SJason Jin 		bios_intr_tab[i] = undefined_intr;
357ece92f85SJason Jin 	}
358ece92f85SJason Jin 	bios_intr_tab[0x10] = int10;
359ece92f85SJason Jin 	bios_intr_tab[0x1A] = int1A;
360ece92f85SJason Jin 	bios_intr_tab[0x42] = int42;
361ece92f85SJason Jin 	bios_intr_tab[0x6D] = int10;
362ece92f85SJason Jin 	X86EMU_setupIntrFuncs(bios_intr_tab);
363ece92f85SJason Jin }
364