1*f2105c61SSimon Glass /*
2*f2105c61SSimon Glass * Freescale iMX51 ATA driver
3*f2105c61SSimon Glass *
4*f2105c61SSimon Glass * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5*f2105c61SSimon Glass *
6*f2105c61SSimon Glass * Based on code by:
7*f2105c61SSimon Glass * Mahesh Mahadevan <mahesh.mahadevan@freescale.com>
8*f2105c61SSimon Glass *
9*f2105c61SSimon Glass * Based on code from original FSL ATA driver, which is
10*f2105c61SSimon Glass * part of eCos, the Embedded Configurable Operating System.
11*f2105c61SSimon Glass * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
12*f2105c61SSimon Glass *
13*f2105c61SSimon Glass * SPDX-License-Identifier: GPL-2.0+
14*f2105c61SSimon Glass */
15*f2105c61SSimon Glass
16*f2105c61SSimon Glass #include <common.h>
17*f2105c61SSimon Glass #include <command.h>
18*f2105c61SSimon Glass #include <config.h>
19*f2105c61SSimon Glass #include <asm/byteorder.h>
20*f2105c61SSimon Glass #include <asm/io.h>
21*f2105c61SSimon Glass #include <ide.h>
22*f2105c61SSimon Glass
23*f2105c61SSimon Glass #include <asm/arch/imx-regs.h>
24*f2105c61SSimon Glass #include <asm/arch/clock.h>
25*f2105c61SSimon Glass
26*f2105c61SSimon Glass /* MXC ATA register offsets */
27*f2105c61SSimon Glass struct mxc_ata_config_regs {
28*f2105c61SSimon Glass u8 time_off; /* 0x00 */
29*f2105c61SSimon Glass u8 time_on;
30*f2105c61SSimon Glass u8 time_1;
31*f2105c61SSimon Glass u8 time_2w;
32*f2105c61SSimon Glass u8 time_2r;
33*f2105c61SSimon Glass u8 time_ax;
34*f2105c61SSimon Glass u8 time_pio_rdx;
35*f2105c61SSimon Glass u8 time_4;
36*f2105c61SSimon Glass u8 time_9;
37*f2105c61SSimon Glass u8 time_m;
38*f2105c61SSimon Glass u8 time_jn;
39*f2105c61SSimon Glass u8 time_d;
40*f2105c61SSimon Glass u8 time_k;
41*f2105c61SSimon Glass u8 time_ack;
42*f2105c61SSimon Glass u8 time_env;
43*f2105c61SSimon Glass u8 time_udma_rdx;
44*f2105c61SSimon Glass u8 time_zah; /* 0x10 */
45*f2105c61SSimon Glass u8 time_mlix;
46*f2105c61SSimon Glass u8 time_dvh;
47*f2105c61SSimon Glass u8 time_dzfs;
48*f2105c61SSimon Glass u8 time_dvs;
49*f2105c61SSimon Glass u8 time_cvh;
50*f2105c61SSimon Glass u8 time_ss;
51*f2105c61SSimon Glass u8 time_cyc;
52*f2105c61SSimon Glass u32 fifo_data_32; /* 0x18 */
53*f2105c61SSimon Glass u32 fifo_data_16;
54*f2105c61SSimon Glass u32 fifo_fill;
55*f2105c61SSimon Glass u32 ata_control;
56*f2105c61SSimon Glass u32 interrupt_pending;
57*f2105c61SSimon Glass u32 interrupt_enable;
58*f2105c61SSimon Glass u32 interrupt_clear;
59*f2105c61SSimon Glass u32 fifo_alarm;
60*f2105c61SSimon Glass };
61*f2105c61SSimon Glass
62*f2105c61SSimon Glass struct mxc_data_hdd_regs {
63*f2105c61SSimon Glass u32 drive_data; /* 0xa0 */
64*f2105c61SSimon Glass u32 drive_features;
65*f2105c61SSimon Glass u32 drive_sector_count;
66*f2105c61SSimon Glass u32 drive_sector_num;
67*f2105c61SSimon Glass u32 drive_cyl_low;
68*f2105c61SSimon Glass u32 drive_cyl_high;
69*f2105c61SSimon Glass u32 drive_dev_head;
70*f2105c61SSimon Glass u32 command;
71*f2105c61SSimon Glass u32 status;
72*f2105c61SSimon Glass u32 alt_status;
73*f2105c61SSimon Glass };
74*f2105c61SSimon Glass
75*f2105c61SSimon Glass /* PIO timing table */
76*f2105c61SSimon Glass #define NR_PIO_SPECS 5
77*f2105c61SSimon Glass static uint16_t pio_t1[NR_PIO_SPECS] = { 70, 50, 30, 30, 25 };
78*f2105c61SSimon Glass static uint16_t pio_t2_8[NR_PIO_SPECS] = { 290, 290, 290, 80, 70 };
79*f2105c61SSimon Glass static uint16_t pio_t4[NR_PIO_SPECS] = { 30, 20, 15, 10, 10 };
80*f2105c61SSimon Glass static uint16_t pio_t9[NR_PIO_SPECS] = { 20, 15, 10, 10, 10 };
81*f2105c61SSimon Glass static uint16_t pio_tA[NR_PIO_SPECS] = { 50, 50, 50, 50, 50 };
82*f2105c61SSimon Glass
83*f2105c61SSimon Glass #define REG2OFF(reg) ((((uint32_t)reg) & 0x3) * 8)
set_ata_bus_timing(unsigned char mode)84*f2105c61SSimon Glass static void set_ata_bus_timing(unsigned char mode)
85*f2105c61SSimon Glass {
86*f2105c61SSimon Glass uint32_t T = 1000000000 / mxc_get_clock(MXC_IPG_CLK);
87*f2105c61SSimon Glass
88*f2105c61SSimon Glass struct mxc_ata_config_regs *ata_regs;
89*f2105c61SSimon Glass ata_regs = (struct mxc_ata_config_regs *)CONFIG_SYS_ATA_BASE_ADDR;
90*f2105c61SSimon Glass
91*f2105c61SSimon Glass if (mode >= NR_PIO_SPECS)
92*f2105c61SSimon Glass return;
93*f2105c61SSimon Glass
94*f2105c61SSimon Glass /* Write TIME_OFF/ON/1/2W */
95*f2105c61SSimon Glass writeb(3, &ata_regs->time_off);
96*f2105c61SSimon Glass writeb(3, &ata_regs->time_on);
97*f2105c61SSimon Glass writeb((pio_t1[mode] + T) / T, &ata_regs->time_1);
98*f2105c61SSimon Glass writeb((pio_t2_8[mode] + T) / T, &ata_regs->time_2w);
99*f2105c61SSimon Glass
100*f2105c61SSimon Glass /* Write TIME_2R/AX/RDX/4 */
101*f2105c61SSimon Glass writeb((pio_t2_8[mode] + T) / T, &ata_regs->time_2r);
102*f2105c61SSimon Glass writeb((pio_tA[mode] + T) / T + 2, &ata_regs->time_ax);
103*f2105c61SSimon Glass writeb(1, &ata_regs->time_pio_rdx);
104*f2105c61SSimon Glass writeb((pio_t4[mode] + T) / T, &ata_regs->time_4);
105*f2105c61SSimon Glass
106*f2105c61SSimon Glass /* Write TIME_9 ; the rest of timing registers is irrelevant for PIO */
107*f2105c61SSimon Glass writeb((pio_t9[mode] + T) / T, &ata_regs->time_9);
108*f2105c61SSimon Glass }
109*f2105c61SSimon Glass
ide_preinit(void)110*f2105c61SSimon Glass int ide_preinit(void)
111*f2105c61SSimon Glass {
112*f2105c61SSimon Glass struct mxc_ata_config_regs *ata_regs;
113*f2105c61SSimon Glass ata_regs = (struct mxc_ata_config_regs *)CONFIG_SYS_ATA_BASE_ADDR;
114*f2105c61SSimon Glass
115*f2105c61SSimon Glass /* 46.3.3.4 @ FSL iMX51 manual */
116*f2105c61SSimon Glass /* FIFO normal op., drive reset */
117*f2105c61SSimon Glass writel(0x80, &ata_regs->ata_control);
118*f2105c61SSimon Glass /* FIFO normal op., drive not reset */
119*f2105c61SSimon Glass writel(0xc0, &ata_regs->ata_control);
120*f2105c61SSimon Glass
121*f2105c61SSimon Glass /* Configure the PIO timing */
122*f2105c61SSimon Glass set_ata_bus_timing(CONFIG_MXC_ATA_PIO_MODE);
123*f2105c61SSimon Glass
124*f2105c61SSimon Glass /* 46.3.3.4 @ FSL iMX51 manual */
125*f2105c61SSimon Glass /* Drive not reset, IORDY handshake */
126*f2105c61SSimon Glass writel(0x41, &ata_regs->ata_control);
127*f2105c61SSimon Glass
128*f2105c61SSimon Glass return 0;
129*f2105c61SSimon Glass }
130