1*90abb28fSSimon Glass /* 2*90abb28fSSimon Glass * Copyright (C) 2010 Freescale Semiconductor, Inc. 3*90abb28fSSimon Glass * Terry Lv <r65388@freescale.com> 4*90abb28fSSimon Glass * 5*90abb28fSSimon Glass * SPDX-License-Identifier: GPL-2.0+ 6*90abb28fSSimon Glass */ 7*90abb28fSSimon Glass 8*90abb28fSSimon Glass #ifndef __DWC_AHSATA_PRIV_H__ 9*90abb28fSSimon Glass #define __DWC_AHSATA_PRIV_H__ 10*90abb28fSSimon Glass 11*90abb28fSSimon Glass #define DWC_AHSATA_MAX_CMD_SLOTS 32 12*90abb28fSSimon Glass 13*90abb28fSSimon Glass /* Max host controller numbers */ 14*90abb28fSSimon Glass #define SATA_HC_MAX_NUM 4 15*90abb28fSSimon Glass /* Max command queue depth per host controller */ 16*90abb28fSSimon Glass #define DWC_AHSATA_HC_MAX_CMD 32 17*90abb28fSSimon Glass /* Max port number per host controller */ 18*90abb28fSSimon Glass #define SATA_HC_MAX_PORT 16 19*90abb28fSSimon Glass 20*90abb28fSSimon Glass /* Generic Host Register */ 21*90abb28fSSimon Glass 22*90abb28fSSimon Glass /* HBA Capabilities Register */ 23*90abb28fSSimon Glass #define SATA_HOST_CAP_S64A 0x80000000 24*90abb28fSSimon Glass #define SATA_HOST_CAP_SNCQ 0x40000000 25*90abb28fSSimon Glass #define SATA_HOST_CAP_SSNTF 0x20000000 26*90abb28fSSimon Glass #define SATA_HOST_CAP_SMPS 0x10000000 27*90abb28fSSimon Glass #define SATA_HOST_CAP_SSS 0x08000000 28*90abb28fSSimon Glass #define SATA_HOST_CAP_SALP 0x04000000 29*90abb28fSSimon Glass #define SATA_HOST_CAP_SAL 0x02000000 30*90abb28fSSimon Glass #define SATA_HOST_CAP_SCLO 0x01000000 31*90abb28fSSimon Glass #define SATA_HOST_CAP_ISS_MASK 0x00f00000 32*90abb28fSSimon Glass #define SATA_HOST_CAP_ISS_OFFSET 20 33*90abb28fSSimon Glass #define SATA_HOST_CAP_SNZO 0x00080000 34*90abb28fSSimon Glass #define SATA_HOST_CAP_SAM 0x00040000 35*90abb28fSSimon Glass #define SATA_HOST_CAP_SPM 0x00020000 36*90abb28fSSimon Glass #define SATA_HOST_CAP_PMD 0x00008000 37*90abb28fSSimon Glass #define SATA_HOST_CAP_SSC 0x00004000 38*90abb28fSSimon Glass #define SATA_HOST_CAP_PSC 0x00002000 39*90abb28fSSimon Glass #define SATA_HOST_CAP_NCS 0x00001f00 40*90abb28fSSimon Glass #define SATA_HOST_CAP_CCCS 0x00000080 41*90abb28fSSimon Glass #define SATA_HOST_CAP_EMS 0x00000040 42*90abb28fSSimon Glass #define SATA_HOST_CAP_SXS 0x00000020 43*90abb28fSSimon Glass #define SATA_HOST_CAP_NP_MASK 0x0000001f 44*90abb28fSSimon Glass 45*90abb28fSSimon Glass /* Global HBA Control Register */ 46*90abb28fSSimon Glass #define SATA_HOST_GHC_AE 0x80000000 47*90abb28fSSimon Glass #define SATA_HOST_GHC_IE 0x00000002 48*90abb28fSSimon Glass #define SATA_HOST_GHC_HR 0x00000001 49*90abb28fSSimon Glass 50*90abb28fSSimon Glass /* Interrupt Status Register */ 51*90abb28fSSimon Glass 52*90abb28fSSimon Glass /* Ports Implemented Register */ 53*90abb28fSSimon Glass 54*90abb28fSSimon Glass /* AHCI Version Register */ 55*90abb28fSSimon Glass #define SATA_HOST_VS_MJR_MASK 0xffff0000 56*90abb28fSSimon Glass #define SATA_HOST_VS_MJR_OFFSET 16 57*90abb28fSSimon Glass #define SATA_HOST_VS_MJR_MNR 0x0000ffff 58*90abb28fSSimon Glass 59*90abb28fSSimon Glass /* Command Completion Coalescing Control */ 60*90abb28fSSimon Glass #define SATA_HOST_CCC_CTL_TV_MASK 0xffff0000 61*90abb28fSSimon Glass #define SATA_HOST_CCC_CTL_TV_OFFSET 16 62*90abb28fSSimon Glass #define SATA_HOST_CCC_CTL_CC_MASK 0x0000ff00 63*90abb28fSSimon Glass #define SATA_HOST_CCC_CTL_CC_OFFSET 8 64*90abb28fSSimon Glass #define SATA_HOST_CCC_CTL_INT_MASK 0x000000f8 65*90abb28fSSimon Glass #define SATA_HOST_CCC_CTL_INT_OFFSET 3 66*90abb28fSSimon Glass #define SATA_HOST_CCC_CTL_EN 0x00000001 67*90abb28fSSimon Glass 68*90abb28fSSimon Glass /* Command Completion Coalescing Ports */ 69*90abb28fSSimon Glass 70*90abb28fSSimon Glass /* HBA Capabilities Extended Register */ 71*90abb28fSSimon Glass #define SATA_HOST_CAP2_APST 0x00000004 72*90abb28fSSimon Glass 73*90abb28fSSimon Glass /* BIST Activate FIS Register */ 74*90abb28fSSimon Glass #define SATA_HOST_BISTAFR_NCP_MASK 0x0000ff00 75*90abb28fSSimon Glass #define SATA_HOST_BISTAFR_NCP_OFFSET 8 76*90abb28fSSimon Glass #define SATA_HOST_BISTAFR_PD_MASK 0x000000ff 77*90abb28fSSimon Glass #define SATA_HOST_BISTAFR_PD_OFFSET 0 78*90abb28fSSimon Glass 79*90abb28fSSimon Glass /* BIST Control Register */ 80*90abb28fSSimon Glass #define SATA_HOST_BISTCR_FERLB 0x00100000 81*90abb28fSSimon Glass #define SATA_HOST_BISTCR_TXO 0x00040000 82*90abb28fSSimon Glass #define SATA_HOST_BISTCR_CNTCLR 0x00020000 83*90abb28fSSimon Glass #define SATA_HOST_BISTCR_NEALB 0x00010000 84*90abb28fSSimon Glass #define SATA_HOST_BISTCR_LLC_MASK 0x00000700 85*90abb28fSSimon Glass #define SATA_HOST_BISTCR_LLC_OFFSET 8 86*90abb28fSSimon Glass #define SATA_HOST_BISTCR_ERREN 0x00000040 87*90abb28fSSimon Glass #define SATA_HOST_BISTCR_FLIP 0x00000020 88*90abb28fSSimon Glass #define SATA_HOST_BISTCR_PV 0x00000010 89*90abb28fSSimon Glass #define SATA_HOST_BISTCR_PATTERN_MASK 0x0000000f 90*90abb28fSSimon Glass #define SATA_HOST_BISTCR_PATTERN_OFFSET 0 91*90abb28fSSimon Glass 92*90abb28fSSimon Glass /* BIST FIS Count Register */ 93*90abb28fSSimon Glass 94*90abb28fSSimon Glass /* BIST Status Register */ 95*90abb28fSSimon Glass #define SATA_HOST_BISTSR_FRAMERR_MASK 0x0000ffff 96*90abb28fSSimon Glass #define SATA_HOST_BISTSR_FRAMERR_OFFSET 0 97*90abb28fSSimon Glass #define SATA_HOST_BISTSR_BRSTERR_MASK 0x00ff0000 98*90abb28fSSimon Glass #define SATA_HOST_BISTSR_BRSTERR_OFFSET 16 99*90abb28fSSimon Glass 100*90abb28fSSimon Glass /* BIST DWORD Error Count Register */ 101*90abb28fSSimon Glass 102*90abb28fSSimon Glass /* OOB Register*/ 103*90abb28fSSimon Glass #define SATA_HOST_OOBR_WE 0x80000000 104*90abb28fSSimon Glass #define SATA_HOST_OOBR_cwMin_MASK 0x7f000000 105*90abb28fSSimon Glass #define SATA_HOST_OOBR_cwMAX_MASK 0x00ff0000 106*90abb28fSSimon Glass #define SATA_HOST_OOBR_ciMin_MASK 0x0000ff00 107*90abb28fSSimon Glass #define SATA_HOST_OOBR_ciMax_MASK 0x000000ff 108*90abb28fSSimon Glass 109*90abb28fSSimon Glass /* Timer 1-ms Register */ 110*90abb28fSSimon Glass 111*90abb28fSSimon Glass /* Global Parameter 1 Register */ 112*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_ALIGN_M 0x80000000 113*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_RX_BUFFER 0x40000000 114*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_PHY_DATA_MASK 0x30000000 115*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_PHY_RST 0x08000000 116*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_PHY_CTRL_MASK 0x07e00000 117*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_PHY_STAT_MASK 0x001f8000 118*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_LATCH_M 0x00004000 119*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_BIST_M 0x00002000 120*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_PHY_TYPE 0x00001000 121*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_RETURN_ERR 0x00000400 122*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_AHB_ENDIAN_MASK 0x00000300 123*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_S_HADDR 0X00000080 124*90abb28fSSimon Glass #define SATA_HOST_GPARAM1R_M_HADDR 0X00000040 125*90abb28fSSimon Glass 126*90abb28fSSimon Glass /* Global Parameter 2 Register */ 127*90abb28fSSimon Glass #define SATA_HOST_GPARAM2R_DEV_CP 0x00004000 128*90abb28fSSimon Glass #define SATA_HOST_GPARAM2R_DEV_MP 0x00002000 129*90abb28fSSimon Glass #define SATA_HOST_GPARAM2R_DEV_ENCODE_M 0x00001000 130*90abb28fSSimon Glass #define SATA_HOST_GPARAM2R_RXOOB_CLK_M 0x00000800 131*90abb28fSSimon Glass #define SATA_HOST_GPARAM2R_RXOOB_M 0x00000400 132*90abb28fSSimon Glass #define SATA_HOST_GPARAM2R_TX_OOB_M 0x00000200 133*90abb28fSSimon Glass #define SATA_HOST_GPARAM2R_RXOOB_CLK_MASK 0x000001ff 134*90abb28fSSimon Glass 135*90abb28fSSimon Glass /* Port Parameter Register */ 136*90abb28fSSimon Glass #define SATA_HOST_PPARAMR_TX_MEM_M 0x00000200 137*90abb28fSSimon Glass #define SATA_HOST_PPARAMR_TX_MEM_S 0x00000100 138*90abb28fSSimon Glass #define SATA_HOST_PPARAMR_RX_MEM_M 0x00000080 139*90abb28fSSimon Glass #define SATA_HOST_PPARAMR_RX_MEM_S 0x00000040 140*90abb28fSSimon Glass #define SATA_HOST_PPARAMR_TXFIFO_DEPTH_MASK 0x00000038 141*90abb28fSSimon Glass #define SATA_HOST_PPARAMR_RXFIFO_DEPTH_MASK 0x00000007 142*90abb28fSSimon Glass 143*90abb28fSSimon Glass /* Test Register */ 144*90abb28fSSimon Glass #define SATA_HOST_TESTR_PSEL_MASK 0x00070000 145*90abb28fSSimon Glass #define SATA_HOST_TESTR_TEST_IF 0x00000001 146*90abb28fSSimon Glass 147*90abb28fSSimon Glass /* Port Register Descriptions */ 148*90abb28fSSimon Glass /* Port# Command List Base Address Register */ 149*90abb28fSSimon Glass #define SATA_PORT_CLB_CLB_MASK 0xfffffc00 150*90abb28fSSimon Glass 151*90abb28fSSimon Glass /* Port# Command List Base Address Upper 32-Bits Register */ 152*90abb28fSSimon Glass 153*90abb28fSSimon Glass /* Port# FIS Base Address Register */ 154*90abb28fSSimon Glass #define SATA_PORT_FB_FB_MASK 0xfffffff0 155*90abb28fSSimon Glass 156*90abb28fSSimon Glass /* Port# FIS Base Address Upper 32-Bits Register */ 157*90abb28fSSimon Glass 158*90abb28fSSimon Glass /* Port# Interrupt Status Register */ 159*90abb28fSSimon Glass #define SATA_PORT_IS_CPDS 0x80000000 160*90abb28fSSimon Glass #define SATA_PORT_IS_TFES 0x40000000 161*90abb28fSSimon Glass #define SATA_PORT_IS_HBFS 0x20000000 162*90abb28fSSimon Glass #define SATA_PORT_IS_HBDS 0x10000000 163*90abb28fSSimon Glass #define SATA_PORT_IS_IFS 0x08000000 164*90abb28fSSimon Glass #define SATA_PORT_IS_INFS 0x04000000 165*90abb28fSSimon Glass #define SATA_PORT_IS_OFS 0x01000000 166*90abb28fSSimon Glass #define SATA_PORT_IS_IPMS 0x00800000 167*90abb28fSSimon Glass #define SATA_PORT_IS_PRCS 0x00400000 168*90abb28fSSimon Glass #define SATA_PORT_IS_DMPS 0x00000080 169*90abb28fSSimon Glass #define SATA_PORT_IS_PCS 0x00000040 170*90abb28fSSimon Glass #define SATA_PORT_IS_DPS 0x00000020 171*90abb28fSSimon Glass #define SATA_PORT_IS_UFS 0x00000010 172*90abb28fSSimon Glass #define SATA_PORT_IS_SDBS 0x00000008 173*90abb28fSSimon Glass #define SATA_PORT_IS_DSS 0x00000004 174*90abb28fSSimon Glass #define SATA_PORT_IS_PSS 0x00000002 175*90abb28fSSimon Glass #define SATA_PORT_IS_DHRS 0x00000001 176*90abb28fSSimon Glass 177*90abb28fSSimon Glass /* Port# Interrupt Enable Register */ 178*90abb28fSSimon Glass #define SATA_PORT_IE_CPDE 0x80000000 179*90abb28fSSimon Glass #define SATA_PORT_IE_TFEE 0x40000000 180*90abb28fSSimon Glass #define SATA_PORT_IE_HBFE 0x20000000 181*90abb28fSSimon Glass #define SATA_PORT_IE_HBDE 0x10000000 182*90abb28fSSimon Glass #define SATA_PORT_IE_IFE 0x08000000 183*90abb28fSSimon Glass #define SATA_PORT_IE_INFE 0x04000000 184*90abb28fSSimon Glass #define SATA_PORT_IE_OFE 0x01000000 185*90abb28fSSimon Glass #define SATA_PORT_IE_IPME 0x00800000 186*90abb28fSSimon Glass #define SATA_PORT_IE_PRCE 0x00400000 187*90abb28fSSimon Glass #define SATA_PORT_IE_DMPE 0x00000080 188*90abb28fSSimon Glass #define SATA_PORT_IE_PCE 0x00000040 189*90abb28fSSimon Glass #define SATA_PORT_IE_DPE 0x00000020 190*90abb28fSSimon Glass #define SATA_PORT_IE_UFE 0x00000010 191*90abb28fSSimon Glass #define SATA_PORT_IE_SDBE 0x00000008 192*90abb28fSSimon Glass #define SATA_PORT_IE_DSE 0x00000004 193*90abb28fSSimon Glass #define SATA_PORT_IE_PSE 0x00000002 194*90abb28fSSimon Glass #define SATA_PORT_IE_DHRE 0x00000001 195*90abb28fSSimon Glass 196*90abb28fSSimon Glass /* Port# Command Register */ 197*90abb28fSSimon Glass #define SATA_PORT_CMD_ICC_MASK 0xf0000000 198*90abb28fSSimon Glass #define SATA_PORT_CMD_ASP 0x08000000 199*90abb28fSSimon Glass #define SATA_PORT_CMD_ALPE 0x04000000 200*90abb28fSSimon Glass #define SATA_PORT_CMD_DLAE 0x02000000 201*90abb28fSSimon Glass #define SATA_PORT_CMD_ATAPI 0x01000000 202*90abb28fSSimon Glass #define SATA_PORT_CMD_APSTE 0x00800000 203*90abb28fSSimon Glass #define SATA_PORT_CMD_ESP 0x00200000 204*90abb28fSSimon Glass #define SATA_PORT_CMD_CPD 0x00100000 205*90abb28fSSimon Glass #define SATA_PORT_CMD_MPSP 0x00080000 206*90abb28fSSimon Glass #define SATA_PORT_CMD_HPCP 0x00040000 207*90abb28fSSimon Glass #define SATA_PORT_CMD_PMA 0x00020000 208*90abb28fSSimon Glass #define SATA_PORT_CMD_CPS 0x00010000 209*90abb28fSSimon Glass #define SATA_PORT_CMD_CR 0x00008000 210*90abb28fSSimon Glass #define SATA_PORT_CMD_FR 0x00004000 211*90abb28fSSimon Glass #define SATA_PORT_CMD_MPSS 0x00002000 212*90abb28fSSimon Glass #define SATA_PORT_CMD_CCS_MASK 0x00001f00 213*90abb28fSSimon Glass #define SATA_PORT_CMD_FRE 0x00000010 214*90abb28fSSimon Glass #define SATA_PORT_CMD_CLO 0x00000008 215*90abb28fSSimon Glass #define SATA_PORT_CMD_POD 0x00000004 216*90abb28fSSimon Glass #define SATA_PORT_CMD_SUD 0x00000002 217*90abb28fSSimon Glass #define SATA_PORT_CMD_ST 0x00000001 218*90abb28fSSimon Glass 219*90abb28fSSimon Glass /* Port# Task File Data Register */ 220*90abb28fSSimon Glass #define SATA_PORT_TFD_ERR_MASK 0x0000ff00 221*90abb28fSSimon Glass #define SATA_PORT_TFD_STS_MASK 0x000000ff 222*90abb28fSSimon Glass #define SATA_PORT_TFD_STS_ERR 0x00000001 223*90abb28fSSimon Glass #define SATA_PORT_TFD_STS_DRQ 0x00000008 224*90abb28fSSimon Glass #define SATA_PORT_TFD_STS_BSY 0x00000080 225*90abb28fSSimon Glass 226*90abb28fSSimon Glass /* Port# Signature Register */ 227*90abb28fSSimon Glass 228*90abb28fSSimon Glass /* Port# Serial ATA Status {SStatus} Register */ 229*90abb28fSSimon Glass #define SATA_PORT_SSTS_IPM_MASK 0x00000f00 230*90abb28fSSimon Glass #define SATA_PORT_SSTS_SPD_MASK 0x000000f0 231*90abb28fSSimon Glass #define SATA_PORT_SSTS_DET_MASK 0x0000000f 232*90abb28fSSimon Glass 233*90abb28fSSimon Glass /* Port# Serial ATA Control {SControl} Register */ 234*90abb28fSSimon Glass #define SATA_PORT_SCTL_IPM_MASK 0x00000f00 235*90abb28fSSimon Glass #define SATA_PORT_SCTL_SPD_MASK 0x000000f0 236*90abb28fSSimon Glass #define SATA_PORT_SCTL_DET_MASK 0x0000000f 237*90abb28fSSimon Glass 238*90abb28fSSimon Glass /* Port# Serial ATA Error {SError} Register */ 239*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_X 0x04000000 240*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_F 0x02000000 241*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_T 0x01000000 242*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_S 0x00800000 243*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_H 0x00400000 244*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_C 0x00200000 245*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_D 0x00100000 246*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_B 0x00080000 247*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_W 0x00040000 248*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_I 0x00020000 249*90abb28fSSimon Glass #define SATA_PORT_SERR_DIAG_N 0x00010000 250*90abb28fSSimon Glass #define SATA_PORT_SERR_ERR_E 0x00000800 251*90abb28fSSimon Glass #define SATA_PORT_SERR_ERR_P 0x00000400 252*90abb28fSSimon Glass #define SATA_PORT_SERR_ERR_C 0x00000200 253*90abb28fSSimon Glass #define SATA_PORT_SERR_ERR_T 0x00000100 254*90abb28fSSimon Glass #define SATA_PORT_SERR_ERR_M 0x00000002 255*90abb28fSSimon Glass #define SATA_PORT_SERR_ERR_I 0x00000001 256*90abb28fSSimon Glass 257*90abb28fSSimon Glass /* Port# Serial ATA Active {SActive} Register */ 258*90abb28fSSimon Glass 259*90abb28fSSimon Glass /* Port# Command Issue Register */ 260*90abb28fSSimon Glass 261*90abb28fSSimon Glass /* Port# Serial ATA Notification Register */ 262*90abb28fSSimon Glass 263*90abb28fSSimon Glass /* Port# DMA Control Register */ 264*90abb28fSSimon Glass #define SATA_PORT_DMACR_RXABL_MASK 0x0000f000 265*90abb28fSSimon Glass #define SATA_PORT_DMACR_TXABL_MASK 0x00000f00 266*90abb28fSSimon Glass #define SATA_PORT_DMACR_RXTS_MASK 0x000000f0 267*90abb28fSSimon Glass #define SATA_PORT_DMACR_TXTS_MASK 0x0000000f 268*90abb28fSSimon Glass 269*90abb28fSSimon Glass /* Port# PHY Control Register */ 270*90abb28fSSimon Glass 271*90abb28fSSimon Glass /* Port# PHY Status Register */ 272*90abb28fSSimon Glass 273*90abb28fSSimon Glass #define SATA_HC_CMD_HDR_ENTRY_SIZE sizeof(struct cmd_hdr_entry) 274*90abb28fSSimon Glass 275*90abb28fSSimon Glass /* DW0 276*90abb28fSSimon Glass */ 277*90abb28fSSimon Glass #define CMD_HDR_DI_CFL_MASK 0x0000001f 278*90abb28fSSimon Glass #define CMD_HDR_DI_CFL_OFFSET 0 279*90abb28fSSimon Glass #define CMD_HDR_DI_A 0x00000020 280*90abb28fSSimon Glass #define CMD_HDR_DI_W 0x00000040 281*90abb28fSSimon Glass #define CMD_HDR_DI_P 0x00000080 282*90abb28fSSimon Glass #define CMD_HDR_DI_R 0x00000100 283*90abb28fSSimon Glass #define CMD_HDR_DI_B 0x00000200 284*90abb28fSSimon Glass #define CMD_HDR_DI_C 0x00000400 285*90abb28fSSimon Glass #define CMD_HDR_DI_PMP_MASK 0x0000f000 286*90abb28fSSimon Glass #define CMD_HDR_DI_PMP_OFFSET 12 287*90abb28fSSimon Glass #define CMD_HDR_DI_PRDTL 0xffff0000 288*90abb28fSSimon Glass #define CMD_HDR_DI_PRDTL_OFFSET 16 289*90abb28fSSimon Glass 290*90abb28fSSimon Glass /* prde_fis_len 291*90abb28fSSimon Glass */ 292*90abb28fSSimon Glass #define CMD_HDR_PRD_ENTRY_SHIFT 16 293*90abb28fSSimon Glass #define CMD_HDR_PRD_ENTRY_MASK 0x003f0000 294*90abb28fSSimon Glass #define CMD_HDR_FIS_LEN_SHIFT 2 295*90abb28fSSimon Glass 296*90abb28fSSimon Glass /* attribute 297*90abb28fSSimon Glass */ 298*90abb28fSSimon Glass #define CMD_HDR_ATTR_RES 0x00000800 /* Reserved bit, should be 1 */ 299*90abb28fSSimon Glass #define CMD_HDR_ATTR_VBIST 0x00000400 /* Vendor BIST */ 300*90abb28fSSimon Glass /* Snoop enable for all descriptor */ 301*90abb28fSSimon Glass #define CMD_HDR_ATTR_SNOOP 0x00000200 302*90abb28fSSimon Glass #define CMD_HDR_ATTR_FPDMA 0x00000100 /* FPDMA queued command */ 303*90abb28fSSimon Glass #define CMD_HDR_ATTR_RESET 0x00000080 /* Reset - a SRST or device reset */ 304*90abb28fSSimon Glass /* BIST - require the host to enter BIST mode */ 305*90abb28fSSimon Glass #define CMD_HDR_ATTR_BIST 0x00000040 306*90abb28fSSimon Glass #define CMD_HDR_ATTR_ATAPI 0x00000020 /* ATAPI command */ 307*90abb28fSSimon Glass #define CMD_HDR_ATTR_TAG 0x0000001f /* TAG mask */ 308*90abb28fSSimon Glass 309*90abb28fSSimon Glass #define FLAGS_DMA 0x00000000 310*90abb28fSSimon Glass #define FLAGS_FPDMA 0x00000001 311*90abb28fSSimon Glass 312*90abb28fSSimon Glass #define SATA_FLAG_Q_DEP_MASK 0x0000000f 313*90abb28fSSimon Glass #define SATA_FLAG_WCACHE 0x00000100 314*90abb28fSSimon Glass #define SATA_FLAG_FLUSH 0x00000200 315*90abb28fSSimon Glass #define SATA_FLAG_FLUSH_EXT 0x00000400 316*90abb28fSSimon Glass 317*90abb28fSSimon Glass #define READ_CMD 0 318*90abb28fSSimon Glass #define WRITE_CMD 1 319*90abb28fSSimon Glass 320*90abb28fSSimon Glass #endif /* __DWC_AHSATA_H__ */ 321