1# 2# Copyright (C) 2014, Simon Glass <sjg@chromium.org> 3# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 4# 5# SPDX-License-Identifier: GPL-2.0+ 6# 7 8U-Boot on x86 9============= 10 11This document describes the information about U-Boot running on x86 targets, 12including supported boards, build instructions, todo list, etc. 13 14Status 15------ 16U-Boot supports running as a coreboot [1] payload on x86. So far only Link 17(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should 18work with minimal adjustments on other x86 boards since coreboot deals with 19most of the low-level details. 20 21U-Boot also supports booting directly from x86 reset vector, without coreboot. 22In this case, known as bare mode, from the fact that it runs on the 23'bare metal', U-Boot acts like a BIOS replacement. Currently Link, QEMU x86 24targets and all Intel boards support running U-Boot 'bare metal'. 25 26As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit 27Linux kernel as part of a FIT image. It also supports a compressed zImage. 28U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks 29for more details. 30 31Build Instructions for U-Boot as coreboot payload 32------------------------------------------------- 33Building U-Boot as a coreboot payload is just like building U-Boot for targets 34on other architectures, like below: 35 36$ make coreboot-x86_defconfig 37$ make all 38 39Note this default configuration will build a U-Boot payload for the QEMU board. 40To build a coreboot payload against another board, you can change the build 41configuration during the 'make menuconfig' process. 42 43x86 architecture ---> 44 ... 45 (qemu-x86) Board configuration file 46 (qemu-x86_i440fx) Board Device Tree Source (dts) file 47 (0x01920000) Board specific Cache-As-RAM (CAR) address 48 (0x4000) Board specific Cache-As-RAM (CAR) size 49 50Change the 'Board configuration file' and 'Board Device Tree Source (dts) file' 51to point to a new board. You can also change the Cache-As-RAM (CAR) related 52settings here if the default values do not fit your new board. 53 54Build Instructions for U-Boot as BIOS replacement (bare mode) 55------------------------------------------------------------- 56Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a 57little bit tricky, as generally it requires several binary blobs which are not 58shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is 59not turned on by default in the U-Boot source tree. Firstly, you need turn it 60on by enabling the ROM build: 61 62$ export BUILD_ROM=y 63 64This tells the Makefile to build u-boot.rom as a target. 65 66--- 67 68Chromebook Link specific instructions for bare mode: 69 70First, you need the following binary blobs: 71 72* descriptor.bin - Intel flash descriptor 73* me.bin - Intel Management Engine 74* mrc.bin - Memory Reference Code, which sets up SDRAM 75* video ROM - sets up the display 76 77You can get these binary blobs by: 78 79$ git clone http://review.coreboot.org/p/blobs.git 80$ cd blobs 81 82Find the following files: 83 84* ./mainboard/google/link/descriptor.bin 85* ./mainboard/google/link/me.bin 86* ./northbridge/intel/sandybridge/systemagent-r6.bin 87 88The 3rd one should be renamed to mrc.bin. 89As for the video ROM, you can get it here [3] and rename it to vga.bin. 90Make sure all these binary blobs are put in the board directory. 91 92Now you can build U-Boot and obtain u-boot.rom: 93 94$ make chromebook_link_defconfig 95$ make all 96 97--- 98 99Intel Crown Bay specific instructions for bare mode: 100 101U-Boot support of Intel Crown Bay board [4] relies on a binary blob called 102Firmware Support Package [5] to perform all the necessary initialization steps 103as documented in the BIOS Writer Guide, including initialization of the CPU, 104memory controller, chipset and certain bus interfaces. 105 106Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T, 107install it on your host and locate the FSP binary blob. Note this platform 108also requires a Chipset Micro Code (CMC) state machine binary to be present in 109the SPI flash where u-boot.rom resides, and this CMC binary blob can be found 110in this FSP package too. 111 112* ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd 113* ./Microcode/C0_22211.BIN 114 115Rename the first one to fsp.bin and second one to cmc.bin and put them in the 116board directory. 117 118Note the FSP release version 001 has a bug which could cause random endless 119loop during the FspInit call. This bug was published by Intel although Intel 120did not describe any details. We need manually apply the patch to the FSP 121binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP 122binary, change the following five bytes values from orginally E8 42 FF FF FF 123to B8 00 80 0B 00. 124 125As for the video ROM, you need manually extract it from the Intel provided 126BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM 127ID 8086:4108, extract and save it as vga.bin in the board directory. 128 129Now you can build U-Boot and obtain u-boot.rom 130 131$ make crownbay_defconfig 132$ make all 133 134--- 135 136Intel Minnowboard Max instructions for bare mode: 137 138This uses as FSP as with Crown Bay, except it is for the Atom E3800 series. 139Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at 140the time of writing). Put it in the board directory: 141board/intel/minnowmax/fsp.bin 142 143Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same 144directory: board/intel/minnowmax/vga.bin 145 146You still need two more binary blobs. The first comes from the original 147firmware image available from: 148 149http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip 150 151Unzip it: 152 153 $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip 154 155Use ifdtool in the U-Boot tools directory to extract the images from that 156file, for example: 157 158 $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin 159 160This will provide the descriptor file - copy this into the correct place: 161 162 $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin 163 164Then do the same with the sample SPI image provided in the FSP (SPI.bin at 165the time of writing) to obtain the last image. Note that this will also 166produce a flash descriptor file, but it does not seem to work, probably 167because it is not designed for the Minnowmax. That is why you need to get 168the flash descriptor from the original firmware as above. 169 170 $ ./tools/ifdtool -x BayleyBay/SPI.bin 171 $ cp flashregion_2_intel_me.bin board/intel/minnowmax/me.bin 172 173Now you can build U-Boot and obtain u-boot.rom 174 175$ make minnowmax_defconfig 176$ make all 177 178Checksums are as follows (but note that newer versions will invalidate this): 179 180$ md5sum -b board/intel/minnowmax/*.bin 181ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin 18269f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin 183894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin 184a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin 185 186The ROM image is broken up into these parts: 187 188Offset Description Controlling config 189------------------------------------------------------------ 190000000 descriptor.bin Hard-coded to 0 in ifdtool 191001000 me.bin Set by the descriptor 192500000 <spare> 193700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE 194790000 vga.bin CONFIG_VGA_BIOS_ADDR 1957c0000 fsp.bin CONFIG_FSP_ADDR 1967f8000 <spare> (depends on size of fsp.bin) 1977fe000 Environment CONFIG_ENV_OFFSET 1987ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16 199 200Overall ROM image size is controlled by CONFIG_ROM_SIZE. 201 202--- 203 204Intel Galileo instructions for bare mode: 205 206Only one binary blob is needed for Remote Management Unit (RMU) within Intel 207Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is 208needed by the Quark SoC itself. 209 210You can get the binary blob from Quark Board Support Package from Intel website: 211 212* ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin 213 214Rename the file and put it to the board directory by: 215 216 $ cp RMU.bin board/intel/galileo/rmu.bin 217 218Now you can build U-Boot and obtain u-boot.rom 219 220$ make galileo_defconfig 221$ make all 222 223QEMU x86 target instructions: 224 225To build u-boot.rom for QEMU x86 targets, just simply run 226 227$ make qemu-x86_defconfig 228$ make all 229 230Note this default configuration will build a U-Boot for the QEMU x86 i440FX 231board. To build a U-Boot against QEMU x86 Q35 board, you can change the build 232configuration during the 'make menuconfig' process like below: 233 234Device Tree Control ---> 235 ... 236 (qemu-x86_q35) Default Device Tree for DT control 237 238Test with coreboot 239------------------ 240For testing U-Boot as the coreboot payload, there are things that need be paid 241attention to. coreboot supports loading an ELF executable and a 32-bit plain 242binary, as well as other supported payloads. With the default configuration, 243U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the 244generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool 245provided by coreboot) manually as coreboot's 'make menuconfig' does not provide 246this capability yet. The command is as follows: 247 248# in the coreboot root directory 249$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \ 250 -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000 251 252Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address 253of _x86boot_start (in arch/x86/cpu/start.S). 254 255If you want to use ELF as the coreboot payload, change U-Boot configuration to 256use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE. 257 258To enable video you must enable these options in coreboot: 259 260 - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) 261 - Keep VESA framebuffer 262 263At present it seems that for Minnowboard Max, coreboot does not pass through 264the video information correctly (it always says the resolution is 0x0). This 265works correctly for link though. 266 267Test with QEMU for bare mode 268---------------------------- 269QEMU is a fancy emulator that can enable us to test U-Boot without access to 270a real x86 board. Please make sure your QEMU version is 2.3.0 or above test 271U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows: 272 273$ qemu-system-i386 -nographic -bios path/to/u-boot.rom 274 275This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU 276also supports emulating an x86 board with Q35 and ICH9 based chipset, which is 277also supported by U-Boot. To instantiate such a machine, call QEMU with: 278 279$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35 280 281Note by default QEMU instantiated boards only have 128 MiB system memory. But 282it is enough to have U-Boot boot and function correctly. You can increase the 283system memory by pass '-m' parameter to QEMU if you want more memory: 284 285$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 286 287This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only 288supports 3 GiB maximum system memory and reserves the last 1 GiB address space 289for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m' 290would be 3072. 291 292QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will 293show QEMU's VGA console window. Note this will disable QEMU's serial output. 294If you want to check both consoles, use '-serial stdio'. 295 296Multicore is also supported by QEMU via '-smp n' where n is the number of cores 297to instantiate. Currently the default U-Boot built for QEMU supports 2 cores. 298In order to support more cores, you need add additional cpu nodes in the device 299tree and change CONFIG_MAX_CPUS accordingly. 300 301CPU Microcode 302------------- 303Modern CPUs usually require a special bit stream called microcode [8] to be 304loaded on the processor after power up in order to function properly. U-Boot 305has already integrated these as hex dumps in the source tree. 306 307SMP Support 308----------- 309On a multicore system, U-Boot is executed on the bootstrap processor (BSP). 310Additional application processors (AP) can be brought up by U-Boot. In order to 311have an SMP kernel to discover all of the available processors, U-Boot needs to 312prepare configuration tables which contain the multi-CPUs information before 313loading the OS kernel. Currently U-Boot supports generating two types of tables 314for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP) 315[10] tables. The writing of these two tables are controlled by two Kconfig 316options GENERATE_SFI_TABLE and GENERATE_MP_TABLE. 317 318Driver Model 319------------ 320x86 has been converted to use driver model for serial and GPIO. 321 322Device Tree 323----------- 324x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to 325be turned on. Not every device on the board is configured via device tree, but 326more and more devices will be added as time goes by. Check out the directory 327arch/x86/dts/ for these device tree source files. 328 329Useful Commands 330--------------- 331In keeping with the U-Boot philosophy of providing functions to check and 332adjust internal settings, there are several x86-specific commands that may be 333useful: 334 335fsp - Display information about Intel Firmware Support Package (FSP). 336 This is only available on platforms which use FSP, mostly Atom. 337iod - Display I/O memory 338iow - Write I/O memory 339mtrr - List and set the Memory Type Range Registers (MTRR). These are used to 340 tell the CPU whether memory is cacheable and if so the cache write 341 mode to use. U-Boot sets up some reasonable values but you can 342 adjust then with this command. 343 344Booting Ubuntu 345-------------- 346As an example of how to set up your boot flow with U-Boot, here are 347instructions for starting Ubuntu from U-Boot. These instructions have been 348tested on Minnowboard MAX with a SATA driver but are equally applicable on 349other platforms and other media. There are really only four steps and its a 350very simple script, but a more detailed explanation is provided here for 351completeness. 352 353Note: It is possible to set up U-Boot to boot automatically using syslinux. 354It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the 355GUID. If you figure these out, please post patches to this README. 356 357Firstly, you will need Ubunutu installed on an available disk. It should be 358possible to make U-Boot start a USB start-up disk but for now let's assume 359that you used another boot loader to install Ubuntu. 360 361Use the U-Boot command line to find the UUID of the partition you want to 362boot. For example our disk is SCSI device 0: 363 364=> part list scsi 0 365 366Partition Map for SCSI device 0 -- Partition Type: EFI 367 368 Part Start LBA End LBA Name 369 Attributes 370 Type GUID 371 Partition GUID 372 1 0x00000800 0x001007ff "" 373 attrs: 0x0000000000000000 374 type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b 375 guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c 376 2 0x00100800 0x037d8fff "" 377 attrs: 0x0000000000000000 378 type: 0fc63daf-8483-4772-8e79-3d69d8477de4 379 guid: 965c59ee-1822-4326-90d2-b02446050059 380 3 0x037d9000 0x03ba27ff "" 381 attrs: 0x0000000000000000 382 type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f 383 guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17 384 => 385 386This shows that your SCSI disk has three partitions. The really long hex 387strings are called Globally Unique Identifiers (GUIDs). You can look up the 388'type' ones here [11]. On this disk the first partition is for EFI and is in 389VFAT format (DOS/Windows): 390 391 => fatls scsi 0:1 392 efi/ 393 394 0 file(s), 1 dir(s) 395 396 397Partition 2 is 'Linux filesystem data' so that will be our root disk. It is 398in ext2 format: 399 400 => ext2ls scsi 0:2 401 <DIR> 4096 . 402 <DIR> 4096 .. 403 <DIR> 16384 lost+found 404 <DIR> 4096 boot 405 <DIR> 12288 etc 406 <DIR> 4096 media 407 <DIR> 4096 bin 408 <DIR> 4096 dev 409 <DIR> 4096 home 410 <DIR> 4096 lib 411 <DIR> 4096 lib64 412 <DIR> 4096 mnt 413 <DIR> 4096 opt 414 <DIR> 4096 proc 415 <DIR> 4096 root 416 <DIR> 4096 run 417 <DIR> 12288 sbin 418 <DIR> 4096 srv 419 <DIR> 4096 sys 420 <DIR> 4096 tmp 421 <DIR> 4096 usr 422 <DIR> 4096 var 423 <SYM> 33 initrd.img 424 <SYM> 30 vmlinuz 425 <DIR> 4096 cdrom 426 <SYM> 33 initrd.img.old 427 => 428 429and if you look in the /boot directory you will see the kernel: 430 431 => ext2ls scsi 0:2 /boot 432 <DIR> 4096 . 433 <DIR> 4096 .. 434 <DIR> 4096 efi 435 <DIR> 4096 grub 436 3381262 System.map-3.13.0-32-generic 437 1162712 abi-3.13.0-32-generic 438 165611 config-3.13.0-32-generic 439 176500 memtest86+.bin 440 178176 memtest86+.elf 441 178680 memtest86+_multiboot.bin 442 5798112 vmlinuz-3.13.0-32-generic 443 165762 config-3.13.0-58-generic 444 1165129 abi-3.13.0-58-generic 445 5823136 vmlinuz-3.13.0-58-generic 446 19215259 initrd.img-3.13.0-58-generic 447 3391763 System.map-3.13.0-58-generic 448 5825048 vmlinuz-3.13.0-58-generic.efi.signed 449 28304443 initrd.img-3.13.0-32-generic 450 => 451 452The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of 453self-extracting compressed file mixed with some 'setup' configuration data. 454Despite its size (uncompressed it is >10MB) this only includes a basic set of 455device drivers, enough to boot on most hardware types. 456 457The 'initrd' files contain a RAM disk. This is something that can be loaded 458into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots 459of drivers for whatever hardware you might have. It is loaded before the 460real root disk is accessed. 461 462The numbers after the end of each file are the version. Here it is Linux 463version 3.13. You can find the source code for this in the Linux tree with 464the tag v3.13. The '.0' allows for additional Linux releases to fix problems, 465but normally this is not needed. The '-58' is used by Ubuntu. Each time they 466release a new kernel they increment this number. New Ubuntu versions might 467include kernel patches to fix reported bugs. Stable kernels can exist for 468some years so this number can get quite high. 469 470The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own 471secure boot mechanism - see [12] [13] and cannot read .efi files at present. 472 473To boot Ubuntu from U-Boot the steps are as follows: 474 4751. Set up the boot arguments. Use the GUID for the partition you want to 476boot: 477 478 => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro 479 480Here root= tells Linux the location of its root disk. The disk is specified 481by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory' 482containing all the GUIDs Linux has found. When it starts up, there will be a 483file in that directory with this name in it. It is also possible to use a 484device name here, see later. 485 4862. Load the kernel. Since it is an ext2/4 filesystem we can do: 487 488 => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic 489 490The address 30000000 is arbitrary, but there seem to be problems with using 491small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into 492the start of RAM (which is at 0 on x86). 493 4943. Load the ramdisk (to 64MB): 495 496 => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic 497 4984. Start up the kernel. We need to know the size of the ramdisk, but can use 499a variable for that. U-Boot sets 'filesize' to the size of the last file it 500loaded. 501 502 => zboot 03000000 0 04000000 ${filesize} 503 504Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is 505quite verbose when it boots a kernel. You should see these messages from 506U-Boot: 507 508 Valid Boot Flag 509 Setup Size = 0x00004400 510 Magic signature found 511 Using boot protocol version 2.0c 512 Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 513 Building boot_params at 0x00090000 514 Loading bzImage at address 100000 (5805728 bytes) 515 Magic signature found 516 Initial RAM disk at linear address 0x04000000, size 19215259 bytes 517 Kernel command line: "console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro" 518 519 Starting kernel ... 520 521U-Boot prints out some bootstage timing. This is more useful if you put the 522above commands into a script since then it will be faster. 523 524 Timer summary in microseconds: 525 Mark Elapsed Stage 526 0 0 reset 527 241,535 241,535 board_init_r 528 2,421,611 2,180,076 id=64 529 2,421,790 179 id=65 530 2,428,215 6,425 main_loop 531 48,860,584 46,432,369 start_kernel 532 533 Accumulated time: 534 240,329 ahci 535 1,422,704 vesa display 536 537Now the kernel actually starts: 538 539 [ 0.000000] Initializing cgroup subsys cpuset 540 [ 0.000000] Initializing cgroup subsys cpu 541 [ 0.000000] Initializing cgroup subsys cpuacct 542 [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22) 543 [ 0.000000] Command line: console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro 544 545It continues for a long time. Along the way you will see it pick up your 546ramdisk: 547 548 [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff] 549... 550 [ 0.788540] Trying to unpack rootfs image as initramfs... 551 [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000) 552... 553 554Later it actually starts using it: 555 556 Begin: Running /scripts/local-premount ... done. 557 558You should also see your boot disk turn up: 559 560 [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5 561 [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB) 562 [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0 563 [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off 564 [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA 565 [ 4.399535] sda: sda1 sda2 sda3 566 567Linux has found the three partitions (sda1-3). Mercifully it doesn't print out 568the GUIDs. In step 1 above we could have used: 569 570 setenv bootargs root=/dev/sda2 ro 571 572instead of the GUID. However if you add another drive to your board the 573numbering may change whereas the GUIDs will not. So if your boot partition 574becomes sdb2, it will still boot. For embedded systems where you just want to 575boot the first disk, you have that option. 576 577The last thing you will see on the console is mention of plymouth (which 578displays the Ubuntu start-up screen) and a lot of 'Starting' messages: 579 580 * Starting Mount filesystems on boot [ OK ] 581 582After a pause you should see a login screen on your display and you are done. 583 584If you want to put this in a script you can use something like this: 585 586 setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro 587 setenv boot zboot 03000000 0 04000000 \${filesize} 588 setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot" 589 saveenv 590 591The \ is to tell the shell not to evaluate ${filesize} as part of the setenv 592command. 593 594You will also need to add this to your board configuration file, e.g. 595include/configs/minnowmax.h: 596 597 #define CONFIG_BOOTDELAY 2 598 599Now when you reset your board it wait a few seconds (in case you want to 600interrupt) and then should boot straight into Ubuntu. 601 602You can also bake this behaviour into your build by hard-coding the 603environment variables if you add this to minnowmax.h: 604 605#undef CONFIG_BOOTARGS 606#undef CONFIG_BOOTCOMMAND 607 608#define CONFIG_BOOTARGS \ 609 "root=/dev/sda2 ro" 610#define CONFIG_BOOTCOMMAND \ 611 "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \ 612 "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \ 613 "run boot" 614 615#undef CONFIG_EXTRA_ENV_SETTINGS 616#define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}" 617 618 619Development Flow 620---------------- 621These notes are for those who want to port U-Boot to a new x86 platform. 622 623Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment. 624The Dediprog em100 can be used on Linux. The em100 tool is available here: 625 626 http://review.coreboot.org/p/em100.git 627 628On Minnowboard Max the following command line can be used: 629 630 sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r 631 632A suitable clip for connecting over the SPI flash chip is here: 633 634 http://www.dediprog.com/pd/programmer-accessories/EM-TC-8 635 636This allows you to override the SPI flash contents for development purposes. 637Typically you can write to the em100 in around 1200ms, considerably faster 638than programming the real flash device each time. The only important 639limitation of the em100 is that it only supports SPI bus speeds up to 20MHz. 640This means that images must be set to boot with that speed. This is an 641Intel-specific feature - e.g. tools/ifttool has an option to set the SPI 642speed in the SPI descriptor region. 643 644If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly 645easy to fit it in. You can follow the Minnowboard Max implementation, for 646example. Hopefully you will just need to create new files similar to those 647in arch/x86/cpu/baytrail which provide Bay Trail support. 648 649If you are not using an FSP you have more freedom and more responsibility. 650The ivybridge support works this way, although it still uses a ROM for 651graphics and still has binary blobs containing Intel code. You should aim to 652support all important peripherals on your platform including video and storage. 653Use the device tree for configuration where possible. 654 655For the microcode you can create a suitable device tree file using the 656microcode tool: 657 658 ./tools/microcode-tool -d microcode.dat -m <model> create 659 660or if you only have header files and not the full Intel microcode.dat database: 661 662 ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \ 663 -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \ 664 -m all create 665 666These are written to arch/x86/dts/microcode/ by default. 667 668Note that it is possible to just add the micrcode for your CPU if you know its 669model. U-Boot prints this information when it starts 670 671 CPU: x86_64, vendor Intel, device 30673h 672 673so here we can use the M0130673322 file. 674 675If you platform can display POST codes on two little 7-segment displays on 676the board, then you can use post_code() calls from C or assembler to monitor 677boot progress. This can be good for debugging. 678 679If not, you can try to get serial working as early as possible. The early 680debug serial port may be useful here. See setup_early_uart() for an example. 681 682During the U-Boot porting, one of the important steps is to write correct PIRQ 683routing information in the board device tree. Without it, device drivers in the 684Linux kernel won't function correctly due to interrupt is not working. Please 685refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router. 686Here we have more details on the intel,pirq-routing property below. 687 688 intel,pirq-routing = < 689 PCI_BDF(0, 2, 0) INTA PIRQA 690 ... 691 >; 692 693As you see each entry has 3 cells. For the first one, we need describe all pci 694devices mounted on the board. For SoC devices, normally there is a chapter on 695the chipset datasheet which lists all the available PCI devices. For example on 696Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we 697can get the interrupt pin either from datasheet or hardware via U-Boot shell. 698The reliable source is the hardware as sometimes chipset datasheet is not 100% 699up-to-date. Type 'pci header' plus the device's pci bus/device/function number 700from U-Boot shell below. 701 702 => pci header 0.1e.1 703 vendor ID = 0x8086 704 device ID = 0x0f08 705 ... 706 interrupt line = 0x09 707 interrupt pin = 0x04 708 ... 709 710It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin 711register. Repeat this until you get interrupt pins for all the devices. The last 712cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel 713chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This 714can be changed by registers in LPC bridge. So far Intel FSP does not touch those 715registers so we can write down the PIRQ according to the default mapping rule. 716 717Once we get the PIRQ routing information in the device tree, the interrupt 718allocation and assignment will be done by U-Boot automatically. Now you can 719enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and 720CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC. 721 722This script might be useful. If you feed it the output of 'pci long' from 723U-Boot then it will generate a device tree fragment with the interrupt 724configuration for each device (note it needs gawk 4.0.0): 725 726 $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \ 727 /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \ 728 {patsplit(device, bdf, "[0-9a-f]+"); \ 729 printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \ 730 strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}' 731 732Example output: 733 PCI_BDF(0, 2, 0) INTA PIRQA 734 PCI_BDF(0, 3, 0) INTA PIRQA 735... 736 737Porting Hints 738------------- 739 740Quark-specific considerations: 741 742To port U-Boot to other boards based on the Intel Quark SoC, a few things need 743to be taken care of. The first important part is the Memory Reference Code (MRC) 744parameters. Quark MRC supports memory-down configuration only. All these MRC 745parameters are supplied via the board device tree. To get started, first copy 746the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then 747change these values by consulting board manuals or your hardware vendor. 748Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h. 749The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports, 750but by default they are held in reset after power on. In U-Boot, PCIe 751initialization is properly handled as per Quark's firmware writer guide. 752In your board support codes, you need provide two routines to aid PCIe 753initialization, which are board_assert_perst() and board_deassert_perst(). 754The two routines need implement a board-specific mechanism to assert/deassert 755PCIe PERST# pin. Care must be taken that in those routines that any APIs that 756may trigger PCI enumeration process are strictly forbidden, as any access to 757PCIe root port's configuration registers will cause system hang while it is 758held in reset. For more details, check how they are implemented by the Intel 759Galileo board support codes in board/intel/galileo/galileo.c. 760 761TODO List 762--------- 763- Audio 764- Chrome OS verified boot 765- SMI and ACPI support, to provide platform info and facilities to Linux 766 767References 768---------- 769[1] http://www.coreboot.org 770[2] http://www.qemu.org 771[3] http://www.coreboot.org/~stepan/pci8086,0166.rom 772[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html 773[5] http://www.intel.com/fsp 774[6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html 775[7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/ 776[8] http://en.wikipedia.org/wiki/Microcode 777[9] http://simplefirmware.org 778[10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm 779[11] https://en.wikipedia.org/wiki/GUID_Partition_Table 780[12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf 781[13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf 782[14] doc/device-tree-bindings/misc/intel,irq-router.txt 783