1U-Boot for UniPhier SoC family 2============================== 3 4 5Tested toolchains 6----------------- 7 8 (a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-) 9 10 If you are building U-Boot on Ubuntu, its standard package is recommended. 11 You can install it as follows: 12 13 $ sudo apt-get install gcc-arm-linux-gnueabi- 14 15 (b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-) 16 17 You can download pre-built toolchains from: 18 19 http://www.linaro.org/downloads/ 20 21 (c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-) 22 23 You can download pre-built toolchains from: 24 25 ftp://www.kernel.org/pub/tools/crosstool/files/bin/ 26 27 28Compile the source 29------------------ 30 31PH1-sLD3 reference board: 32 $ make uniphier_sld3_defconfig 33 $ make CROSS_COMPILE=arm-linux-gnueabi- 34 35PH1-LD4 reference board: 36 $ make uniphier_ld4_sld8_defconfig 37 $ make CROSS_COMPILE=arm-linux-gnueabi- 38 39PH1-sLD8 reference board: 40 $ make uniphier_ld4_sld8_defconfig 41 $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref 42 43PH1-Pro4 reference board: 44 $ make uniphier_pro4_defconfig 45 $ make CROSS_COMPILE=arm-linux-gnueabi- 46 47PH1-Pro5 4KBOX Board: 48 $ make uniphier_pxs2_ld6b_defconfig 49 $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro5-4kbox 50 51ProXstream2 Gentil board: 52 $ make uniphier_pxs2_ld6b_defconfig 53 $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil 54 55ProXstream2 Vodka board: 56 $ make uniphier_pxs2_ld6b_defconfig 57 $ make CROSS_COMPILE=arm-linux-gnueabi- 58 59PH1-LD6b reference board: 60 $ make uniphier_pxs2_ld6b_defconfig 61 $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref 62 63You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" 64to use your favorite compiler. 65 66 67Burn U-Boot images to NAND 68-------------------------- 69 70Write two files to the NAND device as follows: 71 - spl/u-boot-spl.bin at the offset address 0x00000000 72 - u-boot.img at the offset address 0x00010000 73 74If a TFTP server is available, the images can be easily updated. 75Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public 76directory, and then run the following command at the U-Boot command line: 77 78 => run nandupdate 79 80 81Burn U-Boot images to eMMC 82-------------------------- 83 84Write two files to the Boot partition 1 of the eMMC device as follows: 85 - spl/u-boot-spl.bin at the offset address 0x00000000 86 - u-boot.img at the offset address 0x00010000 87 88If a TFTP server is available, the images can be easily updated. 89Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public 90directory, and then run the following command at the U-Boot command line: 91 92 => run emmcupdate 93 94 95UniPhier specific commands 96-------------------------- 97 98 - pinmon (enabled by CONFIG_CMD_PINMON) 99 shows the boot mode pins that has been latched at the power-on reset 100 101 - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP) 102 shows the DDR PHY parameters set by the PHY training 103 104 105Supported devices 106----------------- 107 108 - UART (on-chip) 109 - NAND 110 - SD/eMMC 111 - USB 2.0 (EHCI) 112 - USB 3.0 (xHCI) 113 - GPIO 114 - LAN (on-board SMSC9118) 115 - I2C 116 - EEPROM (connected to the on-board I2C bus) 117 - Support card (SRAM, NOR flash, some peripherals) 118 119 120Micro Support Card 121------------------ 122 123The recommended bit switch settings are as follows: 124 125 SW2 OFF(1)/ON(0) Description 126 ------------------------------------------ 127 bit 1 <---- BKSZ[0] 128 bit 2 ----> BKSZ[1] 129 bit 3 <---- SoC Bus Width 16/32 130 bit 4 <---- SERIAL_SEL[0] 131 bit 5 ----> SERIAL_SEL[1] 132 bit 6 ----> BOOTSWAP_EN 133 bit 7 <---- CS1/CS5 134 bit 8 <---- SOC_SERIAL_DISABLE 135 136 SW8 OFF(1)/ON(0) Description 137 ------------------------------------------ 138 bit 1 <---- CS1_SPLIT 139 bit 2 <---- CASE9_ON 140 bit 3 <---- CASE10_ON 141 bit 4 Don't Care Reserve 142 bit 5 Don't Care Reserve 143 bit 6 Don't Care Reserve 144 bit 7 ----> BURST_EN 145 bit 8 ----> FLASHBUS32_16 146 147The BKSZ[1:0] specifies the address range of memory slot and peripherals 148as follows: 149 150 BKSZ Description RAM slot Peripherals 151 -------------------------------------------------------------------- 152 0b00 15MB RAM / 1MB Peri 00000000-00efffff 00f00000-00ffffff 153 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff 154 0b10 64MB RAM / 1MB Peri 00000000-03efffff 03f00000-03ffffff 155 0b11 127MB RAM / 1MB Peri 00000000-07efffff 07f00000-07ffffff 156 157Set BSKZ[1:0] to 0b01 for U-Boot. 158This mode is the most handy because EA[24] is always supported by the save pin 159mode of the system bus. On the other hand, EA[25] is not supported for some 160newer SoCs. Even if it is, EA[25] is not connected on most of the boards. 161 162-- 163Masahiro Yamada <yamada.masahiro@socionext.com> 164Feb. 2016 165