xref: /rk3399_rockchip-uboot/configs/chromebook_jerry_defconfig (revision 318922b30fd0f255a72d7ccd7d7fd58dfb5feb2e)
1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_MALLOC_F_LEN=0x2000
4CONFIG_ROCKCHIP_RK3288=y
5CONFIG_TARGET_CHROMEBOOK_JERRY=y
6CONFIG_SPL_STACK_R_ADDR=0x80000
7CONFIG_DM_KEYBOARD=y
8CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
9CONFIG_SPL_STACK_R=y
10CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
11# CONFIG_CMD_IMLS is not set
12# CONFIG_CMD_SETEXPR is not set
13CONFIG_CMD_PMIC=y
14CONFIG_CMD_REGULATOR=y
15CONFIG_SPL_OF_CONTROL=y
16CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent"
17CONFIG_REGMAP=y
18CONFIG_SPL_REGMAP=y
19CONFIG_SYSCON=y
20CONFIG_SPL_SYSCON=y
21# CONFIG_SPL_SIMPLE_BUS is not set
22CONFIG_CLK=y
23CONFIG_SPL_CLK=y
24CONFIG_ROCKCHIP_GPIO=y
25CONFIG_I2C_CROS_EC_TUNNEL=y
26CONFIG_SYS_I2C_ROCKCHIP=y
27CONFIG_I2C_MUX=y
28CONFIG_CROS_EC_KEYB=y
29CONFIG_CMD_CROS_EC=y
30CONFIG_CROS_EC=y
31CONFIG_CROS_EC_SPI=y
32CONFIG_PWRSEQ=y
33CONFIG_RESET=y
34CONFIG_DM_MMC=y
35CONFIG_ROCKCHIP_DWMMC=y
36CONFIG_PINCTRL=y
37CONFIG_SPL_PINCTRL=y
38# CONFIG_SPL_PINCTRL_FULL is not set
39CONFIG_ROCKCHIP_PINCTRL=y
40CONFIG_DM_PMIC=y
41# CONFIG_SPL_PMIC_CHILDREN is not set
42CONFIG_PMIC_RK808=y
43CONFIG_DM_REGULATOR=y
44CONFIG_REGULATOR_RK808=y
45CONFIG_RAM=y
46CONFIG_SPL_RAM=y
47CONFIG_DEBUG_UART=y
48CONFIG_DEBUG_UART_BASE=0xff690000
49CONFIG_DEBUG_UART_CLOCK=24000000
50CONFIG_DEBUG_UART_SHIFT=2
51CONFIG_SYS_NS16550=y
52CONFIG_ROCKCHIP_SPI=y
53CONFIG_USE_PRIVATE_LIBGCC=y
54CONFIG_USE_TINY_PRINTF=y
55CONFIG_CMD_DHRYSTONE=y
56CONFIG_ERRNO_STR=y
57