1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <console.h> 15 #include <environment.h> 16 #include <dm.h> 17 #include <fdtdec.h> 18 #include <fs.h> 19 #include <i2c.h> 20 #include <initcall.h> 21 #include <logbuff.h> 22 #include <malloc.h> 23 #include <mapmem.h> 24 25 /* TODO: Can we move these into arch/ headers? */ 26 #ifdef CONFIG_8xx 27 #include <mpc8xx.h> 28 #endif 29 #ifdef CONFIG_5xx 30 #include <mpc5xx.h> 31 #endif 32 #ifdef CONFIG_MPC5xxx 33 #include <mpc5xxx.h> 34 #endif 35 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 36 #include <asm/mp.h> 37 #endif 38 39 #include <os.h> 40 #include <post.h> 41 #include <spi.h> 42 #include <status_led.h> 43 #include <timer.h> 44 #include <trace.h> 45 #include <video.h> 46 #include <watchdog.h> 47 #include <asm/io.h> 48 #include <asm/sections.h> 49 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 50 #include <asm/init_helpers.h> 51 #endif 52 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA) 53 #include <asm/relocate.h> 54 #endif 55 #include <dm/root.h> 56 #include <linux/errno.h> 57 58 /* 59 * Pointer to initial global data area 60 * 61 * Here we initialize it if needed. 62 */ 63 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 64 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 65 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 66 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 67 #else 68 DECLARE_GLOBAL_DATA_PTR; 69 #endif 70 71 /* 72 * TODO(sjg@chromium.org): IMO this code should be 73 * refactored to a single function, something like: 74 * 75 * void led_set_state(enum led_colour_t colour, int on); 76 */ 77 /************************************************************************ 78 * Coloured LED functionality 79 ************************************************************************ 80 * May be supplied by boards if desired 81 */ 82 __weak void coloured_LED_init(void) {} 83 __weak void red_led_on(void) {} 84 __weak void red_led_off(void) {} 85 __weak void green_led_on(void) {} 86 __weak void green_led_off(void) {} 87 __weak void yellow_led_on(void) {} 88 __weak void yellow_led_off(void) {} 89 __weak void blue_led_on(void) {} 90 __weak void blue_led_off(void) {} 91 92 /* 93 * Why is gd allocated a register? Prior to reloc it might be better to 94 * just pass it around to each function in this file? 95 * 96 * After reloc one could argue that it is hardly used and doesn't need 97 * to be in a register. Or if it is it should perhaps hold pointers to all 98 * global data for all modules, so that post-reloc we can avoid the massive 99 * literal pool we get on ARM. Or perhaps just encourage each module to use 100 * a structure... 101 */ 102 103 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 104 static int init_func_watchdog_init(void) 105 { 106 # if defined(CONFIG_HW_WATCHDOG) && \ 107 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 108 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 109 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 110 defined(CONFIG_IMX_WATCHDOG)) 111 hw_watchdog_init(); 112 puts(" Watchdog enabled\n"); 113 # endif 114 WATCHDOG_RESET(); 115 116 return 0; 117 } 118 119 int init_func_watchdog_reset(void) 120 { 121 WATCHDOG_RESET(); 122 123 return 0; 124 } 125 #endif /* CONFIG_WATCHDOG */ 126 127 __weak void board_add_ram_info(int use_default) 128 { 129 /* please define platform specific board_add_ram_info() */ 130 } 131 132 static int init_baud_rate(void) 133 { 134 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); 135 return 0; 136 } 137 138 static int display_text_info(void) 139 { 140 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 141 ulong bss_start, bss_end, text_base; 142 143 bss_start = (ulong)&__bss_start; 144 bss_end = (ulong)&__bss_end; 145 146 #ifdef CONFIG_SYS_TEXT_BASE 147 text_base = CONFIG_SYS_TEXT_BASE; 148 #else 149 text_base = CONFIG_SYS_MONITOR_BASE; 150 #endif 151 152 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 153 text_base, bss_start, bss_end); 154 #endif 155 156 #ifdef CONFIG_USE_IRQ 157 debug("IRQ Stack: %08lx\n", IRQ_STACK_START); 158 debug("FIQ Stack: %08lx\n", FIQ_STACK_START); 159 #endif 160 161 return 0; 162 } 163 164 static int announce_dram_init(void) 165 { 166 puts("DRAM: "); 167 return 0; 168 } 169 170 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 171 static int init_func_ram(void) 172 { 173 return initdram(); 174 } 175 #endif 176 177 static int show_dram_config(void) 178 { 179 unsigned long long size; 180 181 #ifdef CONFIG_NR_DRAM_BANKS 182 int i; 183 184 debug("\nRAM Configuration:\n"); 185 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 186 size += gd->bd->bi_dram[i].size; 187 debug("Bank #%d: %llx ", i, 188 (unsigned long long)(gd->bd->bi_dram[i].start)); 189 #ifdef DEBUG 190 print_size(gd->bd->bi_dram[i].size, "\n"); 191 #endif 192 } 193 debug("\nDRAM: "); 194 #else 195 size = gd->ram_size; 196 #endif 197 198 print_size(size, ""); 199 board_add_ram_info(0); 200 putc('\n'); 201 202 return 0; 203 } 204 205 __weak int dram_init_banksize(void) 206 { 207 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 208 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 209 gd->bd->bi_dram[0].size = get_effective_memsize(); 210 #endif 211 212 return 0; 213 } 214 215 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 216 static int init_func_i2c(void) 217 { 218 puts("I2C: "); 219 #ifdef CONFIG_SYS_I2C 220 i2c_init_all(); 221 #else 222 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 223 #endif 224 puts("ready\n"); 225 return 0; 226 } 227 #endif 228 229 #if defined(CONFIG_HARD_SPI) 230 static int init_func_spi(void) 231 { 232 puts("SPI: "); 233 spi_init(); 234 puts("ready\n"); 235 return 0; 236 } 237 #endif 238 239 __maybe_unused 240 static int zero_global_data(void) 241 { 242 memset((void *)gd, '\0', sizeof(gd_t)); 243 244 return 0; 245 } 246 247 static int setup_mon_len(void) 248 { 249 #if defined(__ARM__) || defined(__MICROBLAZE__) 250 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 251 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 252 gd->mon_len = (ulong)&_end - (ulong)_init; 253 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 254 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 255 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) 256 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 257 #elif defined(CONFIG_SYS_MONITOR_BASE) 258 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 259 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 260 #endif 261 return 0; 262 } 263 264 __weak int arch_cpu_init(void) 265 { 266 return 0; 267 } 268 269 __weak int mach_cpu_init(void) 270 { 271 return 0; 272 } 273 274 /* Get the top of usable RAM */ 275 __weak ulong board_get_usable_ram_top(ulong total_size) 276 { 277 #ifdef CONFIG_SYS_SDRAM_BASE 278 /* 279 * Detect whether we have so much RAM that it goes past the end of our 280 * 32-bit address space. If so, clip the usable RAM so it doesn't. 281 */ 282 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 283 /* 284 * Will wrap back to top of 32-bit space when reservations 285 * are made. 286 */ 287 return 0; 288 #endif 289 return gd->ram_top; 290 } 291 292 static int setup_dest_addr(void) 293 { 294 debug("Monitor len: %08lX\n", gd->mon_len); 295 /* 296 * Ram is setup, size stored in gd !! 297 */ 298 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 299 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 300 /* 301 * Subtract specified amount of memory to hide so that it won't 302 * get "touched" at all by U-Boot. By fixing up gd->ram_size 303 * the Linux kernel should now get passed the now "corrected" 304 * memory size and won't touch it either. This should work 305 * for arch/ppc and arch/powerpc. Only Linux board ports in 306 * arch/powerpc with bootwrapper support, that recalculate the 307 * memory size from the SDRAM controller setup will have to 308 * get fixed. 309 */ 310 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 311 #endif 312 #ifdef CONFIG_SYS_SDRAM_BASE 313 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 314 #endif 315 gd->ram_top += get_effective_memsize(); 316 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 317 gd->relocaddr = gd->ram_top; 318 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 319 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 320 /* 321 * We need to make sure the location we intend to put secondary core 322 * boot code is reserved and not used by any part of u-boot 323 */ 324 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 325 gd->relocaddr = determine_mp_bootpg(NULL); 326 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 327 } 328 #endif 329 return 0; 330 } 331 332 #if defined(CONFIG_LOGBUFFER) 333 static int reserve_logbuffer(void) 334 { 335 #ifndef CONFIG_ALT_LB_ADDR 336 /* reserve kernel log buffer */ 337 gd->relocaddr -= LOGBUFF_RESERVE; 338 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, 339 gd->relocaddr); 340 #endif 341 342 return 0; 343 } 344 #endif 345 346 #ifdef CONFIG_PRAM 347 /* reserve protected RAM */ 348 static int reserve_pram(void) 349 { 350 ulong reg; 351 352 reg = getenv_ulong("pram", 10, CONFIG_PRAM); 353 gd->relocaddr -= (reg << 10); /* size is in kB */ 354 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 355 gd->relocaddr); 356 return 0; 357 } 358 #endif /* CONFIG_PRAM */ 359 360 /* Round memory pointer down to next 4 kB limit */ 361 static int reserve_round_4k(void) 362 { 363 gd->relocaddr &= ~(4096 - 1); 364 return 0; 365 } 366 367 #ifdef CONFIG_ARM 368 static int reserve_mmu(void) 369 { 370 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 371 /* reserve TLB table */ 372 gd->arch.tlb_size = PGTABLE_SIZE; 373 gd->relocaddr -= gd->arch.tlb_size; 374 375 /* round down to next 64 kB limit */ 376 gd->relocaddr &= ~(0x10000 - 1); 377 378 gd->arch.tlb_addr = gd->relocaddr; 379 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 380 gd->arch.tlb_addr + gd->arch.tlb_size); 381 382 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 383 /* 384 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 385 * with location within secure ram. 386 */ 387 gd->arch.tlb_allocated = gd->arch.tlb_addr; 388 #endif 389 #endif 390 391 return 0; 392 } 393 #endif 394 395 static int reserve_video(void) 396 { 397 #ifdef CONFIG_DM_VIDEO 398 ulong addr; 399 int ret; 400 401 addr = gd->relocaddr; 402 ret = video_reserve(&addr); 403 if (ret) 404 return ret; 405 gd->relocaddr = addr; 406 #elif defined(CONFIG_LCD) 407 # ifdef CONFIG_FB_ADDR 408 gd->fb_base = CONFIG_FB_ADDR; 409 # else 410 /* reserve memory for LCD display (always full pages) */ 411 gd->relocaddr = lcd_setmem(gd->relocaddr); 412 gd->fb_base = gd->relocaddr; 413 # endif /* CONFIG_FB_ADDR */ 414 #elif defined(CONFIG_VIDEO) && \ 415 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ 416 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 417 !defined(CONFIG_M68K) 418 /* reserve memory for video display (always full pages) */ 419 gd->relocaddr = video_setmem(gd->relocaddr); 420 gd->fb_base = gd->relocaddr; 421 #endif 422 423 return 0; 424 } 425 426 static int reserve_trace(void) 427 { 428 #ifdef CONFIG_TRACE 429 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 430 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 431 debug("Reserving %dk for trace data at: %08lx\n", 432 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 433 #endif 434 435 return 0; 436 } 437 438 static int reserve_uboot(void) 439 { 440 /* 441 * reserve memory for U-Boot code, data & bss 442 * round down to next 4 kB limit 443 */ 444 gd->relocaddr -= gd->mon_len; 445 gd->relocaddr &= ~(4096 - 1); 446 #ifdef CONFIG_E500 447 /* round down to next 64 kB limit so that IVPR stays aligned */ 448 gd->relocaddr &= ~(65536 - 1); 449 #endif 450 451 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 452 gd->relocaddr); 453 454 gd->start_addr_sp = gd->relocaddr; 455 456 return 0; 457 } 458 459 /* reserve memory for malloc() area */ 460 static int reserve_malloc(void) 461 { 462 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 463 debug("Reserving %dk for malloc() at: %08lx\n", 464 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 465 return 0; 466 } 467 468 /* (permanently) allocate a Board Info struct */ 469 static int reserve_board(void) 470 { 471 if (!gd->bd) { 472 gd->start_addr_sp -= sizeof(bd_t); 473 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 474 memset(gd->bd, '\0', sizeof(bd_t)); 475 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 476 sizeof(bd_t), gd->start_addr_sp); 477 } 478 return 0; 479 } 480 481 static int setup_machine(void) 482 { 483 #ifdef CONFIG_MACH_TYPE 484 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 485 #endif 486 return 0; 487 } 488 489 static int reserve_global_data(void) 490 { 491 gd->start_addr_sp -= sizeof(gd_t); 492 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 493 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 494 sizeof(gd_t), gd->start_addr_sp); 495 return 0; 496 } 497 498 static int reserve_fdt(void) 499 { 500 #ifndef CONFIG_OF_EMBED 501 /* 502 * If the device tree is sitting immediately above our image then we 503 * must relocate it. If it is embedded in the data section, then it 504 * will be relocated with other data. 505 */ 506 if (gd->fdt_blob) { 507 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 508 509 gd->start_addr_sp -= gd->fdt_size; 510 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 511 debug("Reserving %lu Bytes for FDT at: %08lx\n", 512 gd->fdt_size, gd->start_addr_sp); 513 } 514 #endif 515 516 return 0; 517 } 518 519 int arch_reserve_stacks(void) 520 { 521 return 0; 522 } 523 524 static int reserve_stacks(void) 525 { 526 /* make stack pointer 16-byte aligned */ 527 gd->start_addr_sp -= 16; 528 gd->start_addr_sp &= ~0xf; 529 530 /* 531 * let the architecture-specific code tailor gd->start_addr_sp and 532 * gd->irq_sp 533 */ 534 return arch_reserve_stacks(); 535 } 536 537 static int display_new_sp(void) 538 { 539 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 540 541 return 0; 542 } 543 544 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 545 defined(CONFIG_SH) 546 static int setup_board_part1(void) 547 { 548 bd_t *bd = gd->bd; 549 550 /* 551 * Save local variables to board info struct 552 */ 553 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 554 bd->bi_memsize = gd->ram_size; /* size in bytes */ 555 556 #ifdef CONFIG_SYS_SRAM_BASE 557 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 558 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 559 #endif 560 561 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ 562 defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 563 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 564 #endif 565 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) 566 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 567 #endif 568 #if defined(CONFIG_MPC83xx) 569 bd->bi_immrbar = CONFIG_SYS_IMMR; 570 #endif 571 572 return 0; 573 } 574 #endif 575 576 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 577 static int setup_board_part2(void) 578 { 579 bd_t *bd = gd->bd; 580 581 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 582 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 583 #if defined(CONFIG_CPM2) 584 bd->bi_cpmfreq = gd->arch.cpm_clk; 585 bd->bi_brgfreq = gd->arch.brg_clk; 586 bd->bi_sccfreq = gd->arch.scc_clk; 587 bd->bi_vco = gd->arch.vco_out; 588 #endif /* CONFIG_CPM2 */ 589 #if defined(CONFIG_MPC512X) 590 bd->bi_ipsfreq = gd->arch.ips_clk; 591 #endif /* CONFIG_MPC512X */ 592 #if defined(CONFIG_MPC5xxx) 593 bd->bi_ipbfreq = gd->arch.ipb_clk; 594 bd->bi_pcifreq = gd->pci_clk; 595 #endif /* CONFIG_MPC5xxx */ 596 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 597 bd->bi_pcifreq = gd->pci_clk; 598 #endif 599 #if defined(CONFIG_EXTRA_CLOCK) 600 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 601 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 602 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 603 #endif 604 605 return 0; 606 } 607 #endif 608 609 #ifdef CONFIG_POST 610 static int init_post(void) 611 { 612 post_bootmode_init(); 613 post_run(NULL, POST_ROM | post_bootmode_get(0)); 614 615 return 0; 616 } 617 #endif 618 619 static int reloc_fdt(void) 620 { 621 #ifndef CONFIG_OF_EMBED 622 if (gd->flags & GD_FLG_SKIP_RELOC) 623 return 0; 624 if (gd->new_fdt) { 625 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 626 gd->fdt_blob = gd->new_fdt; 627 } 628 #endif 629 630 return 0; 631 } 632 633 static int setup_reloc(void) 634 { 635 if (gd->flags & GD_FLG_SKIP_RELOC) { 636 debug("Skipping relocation due to flag\n"); 637 return 0; 638 } 639 640 #ifdef CONFIG_SYS_TEXT_BASE 641 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 642 #ifdef CONFIG_M68K 643 /* 644 * On all ColdFire arch cpu, monitor code starts always 645 * just after the default vector table location, so at 0x400 646 */ 647 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 648 #endif 649 #endif 650 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 651 652 debug("Relocation Offset is: %08lx\n", gd->reloc_off); 653 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 654 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 655 gd->start_addr_sp); 656 657 return 0; 658 } 659 660 #ifdef CONFIG_OF_BOARD_FIXUP 661 static int fix_fdt(void) 662 { 663 return board_fix_fdt((void *)gd->fdt_blob); 664 } 665 #endif 666 667 /* ARM calls relocate_code from its crt0.S */ 668 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 669 !CONFIG_IS_ENABLED(X86_64) 670 671 static int jump_to_copy(void) 672 { 673 if (gd->flags & GD_FLG_SKIP_RELOC) 674 return 0; 675 /* 676 * x86 is special, but in a nice way. It uses a trampoline which 677 * enables the dcache if possible. 678 * 679 * For now, other archs use relocate_code(), which is implemented 680 * similarly for all archs. When we do generic relocation, hopefully 681 * we can make all archs enable the dcache prior to relocation. 682 */ 683 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 684 /* 685 * SDRAM and console are now initialised. The final stack can now 686 * be setup in SDRAM. Code execution will continue in Flash, but 687 * with the stack in SDRAM and Global Data in temporary memory 688 * (CPU cache) 689 */ 690 arch_setup_gd(gd->new_gd); 691 board_init_f_r_trampoline(gd->start_addr_sp); 692 #else 693 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 694 #endif 695 696 return 0; 697 } 698 #endif 699 700 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 701 static int mark_bootstage(void) 702 { 703 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 704 705 return 0; 706 } 707 708 static int initf_console_record(void) 709 { 710 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) 711 return console_record_init(); 712 #else 713 return 0; 714 #endif 715 } 716 717 static int initf_dm(void) 718 { 719 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) 720 int ret; 721 722 ret = dm_init_and_scan(true); 723 if (ret) 724 return ret; 725 #endif 726 #ifdef CONFIG_TIMER_EARLY 727 ret = dm_timer_init(); 728 if (ret) 729 return ret; 730 #endif 731 732 return 0; 733 } 734 735 /* Architecture-specific memory reservation */ 736 __weak int reserve_arch(void) 737 { 738 return 0; 739 } 740 741 __weak int arch_cpu_init_dm(void) 742 { 743 return 0; 744 } 745 746 static const init_fnc_t init_sequence_f[] = { 747 setup_mon_len, 748 #ifdef CONFIG_OF_CONTROL 749 fdtdec_setup, 750 #endif 751 #ifdef CONFIG_TRACE 752 trace_early_init, 753 #endif 754 initf_malloc, 755 initf_console_record, 756 #if defined(CONFIG_HAVE_FSP) 757 arch_fsp_init, 758 #endif 759 arch_cpu_init, /* basic arch cpu dependent setup */ 760 mach_cpu_init, /* SoC/machine dependent CPU setup */ 761 initf_dm, 762 arch_cpu_init_dm, 763 mark_bootstage, /* need timer, go after init dm */ 764 #if defined(CONFIG_BOARD_EARLY_INIT_F) 765 board_early_init_f, 766 #endif 767 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 768 /* get CPU and bus clocks according to the environment variable */ 769 get_clocks, /* get CPU and bus clocks (etc.) */ 770 #endif 771 timer_init, /* initialize timer */ 772 #if defined(CONFIG_BOARD_POSTCLK_INIT) 773 board_postclk_init, 774 #endif 775 env_init, /* initialize environment */ 776 init_baud_rate, /* initialze baudrate settings */ 777 serial_init, /* serial communications setup */ 778 console_init_f, /* stage 1 init of console */ 779 display_options, /* say that we are here */ 780 display_text_info, /* show debugging info if required */ 781 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 782 defined(CONFIG_X86) 783 checkcpu, 784 #endif 785 #if defined(CONFIG_DISPLAY_CPUINFO) 786 print_cpuinfo, /* display cpu info (and speed) */ 787 #endif 788 #if defined(CONFIG_DISPLAY_BOARDINFO) 789 show_board_info, 790 #endif 791 INIT_FUNC_WATCHDOG_INIT 792 #if defined(CONFIG_MISC_INIT_F) 793 misc_init_f, 794 #endif 795 INIT_FUNC_WATCHDOG_RESET 796 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) 797 init_func_i2c, 798 #endif 799 #if defined(CONFIG_HARD_SPI) 800 init_func_spi, 801 #endif 802 announce_dram_init, 803 /* TODO: unify all these dram functions? */ 804 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \ 805 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \ 806 defined(CONFIG_SH) 807 dram_init, /* configure available RAM banks */ 808 #endif 809 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) 810 init_func_ram, 811 #endif 812 #ifdef CONFIG_POST 813 post_init_f, 814 #endif 815 INIT_FUNC_WATCHDOG_RESET 816 #if defined(CONFIG_SYS_DRAM_TEST) 817 testdram, 818 #endif /* CONFIG_SYS_DRAM_TEST */ 819 INIT_FUNC_WATCHDOG_RESET 820 821 #ifdef CONFIG_POST 822 init_post, 823 #endif 824 INIT_FUNC_WATCHDOG_RESET 825 /* 826 * Now that we have DRAM mapped and working, we can 827 * relocate the code and continue running from DRAM. 828 * 829 * Reserve memory at end of RAM for (top down in that order): 830 * - area that won't get touched by U-Boot and Linux (optional) 831 * - kernel log buffer 832 * - protected RAM 833 * - LCD framebuffer 834 * - monitor code 835 * - board info struct 836 */ 837 setup_dest_addr, 838 #if defined(CONFIG_LOGBUFFER) 839 reserve_logbuffer, 840 #endif 841 #ifdef CONFIG_PRAM 842 reserve_pram, 843 #endif 844 reserve_round_4k, 845 #ifdef CONFIG_ARM 846 reserve_mmu, 847 #endif 848 reserve_video, 849 reserve_trace, 850 reserve_uboot, 851 reserve_malloc, 852 reserve_board, 853 setup_machine, 854 reserve_global_data, 855 reserve_fdt, 856 reserve_arch, 857 reserve_stacks, 858 dram_init_banksize, 859 show_dram_config, 860 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 861 defined(CONFIG_SH) 862 setup_board_part1, 863 #endif 864 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 865 INIT_FUNC_WATCHDOG_RESET 866 setup_board_part2, 867 #endif 868 display_new_sp, 869 #ifdef CONFIG_SYS_EXTBDINFO 870 setup_board_extra, 871 #endif 872 #ifdef CONFIG_OF_BOARD_FIXUP 873 fix_fdt, 874 #endif 875 INIT_FUNC_WATCHDOG_RESET 876 reloc_fdt, 877 setup_reloc, 878 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 879 copy_uboot_to_ram, 880 do_elf_reloc_fixups, 881 clear_bss, 882 #endif 883 #if defined(CONFIG_XTENSA) 884 clear_bss, 885 #endif 886 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 887 !CONFIG_IS_ENABLED(X86_64) 888 jump_to_copy, 889 #endif 890 NULL, 891 }; 892 893 void board_init_f(ulong boot_flags) 894 { 895 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA 896 /* 897 * For some architectures, global data is initialized and used before 898 * calling this function. The data should be preserved. For others, 899 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack 900 * here to host global data until relocation. 901 */ 902 gd_t data; 903 904 gd = &data; 905 906 /* 907 * Clear global data before it is accessed at debug print 908 * in initcall_run_list. Otherwise the debug print probably 909 * get the wrong value of gd->have_console. 910 */ 911 zero_global_data(); 912 #endif 913 914 gd->flags = boot_flags; 915 gd->have_console = 0; 916 917 if (initcall_run_list(init_sequence_f)) 918 hang(); 919 920 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 921 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 922 /* NOTREACHED - jump_to_copy() does not return */ 923 hang(); 924 #endif 925 } 926 927 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 928 /* 929 * For now this code is only used on x86. 930 * 931 * init_sequence_f_r is the list of init functions which are run when 932 * U-Boot is executing from Flash with a semi-limited 'C' environment. 933 * The following limitations must be considered when implementing an 934 * '_f_r' function: 935 * - 'static' variables are read-only 936 * - Global Data (gd->xxx) is read/write 937 * 938 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 939 * supported). It _should_, if possible, copy global data to RAM and 940 * initialise the CPU caches (to speed up the relocation process) 941 * 942 * NOTE: At present only x86 uses this route, but it is intended that 943 * all archs will move to this when generic relocation is implemented. 944 */ 945 static const init_fnc_t init_sequence_f_r[] = { 946 #if !CONFIG_IS_ENABLED(X86_64) 947 init_cache_f_r, 948 #endif 949 950 NULL, 951 }; 952 953 void board_init_f_r(void) 954 { 955 if (initcall_run_list(init_sequence_f_r)) 956 hang(); 957 958 /* 959 * The pre-relocation drivers may be using memory that has now gone 960 * away. Mark serial as unavailable - this will fall back to the debug 961 * UART if available. 962 */ 963 gd->flags &= ~GD_FLG_SERIAL_READY; 964 965 /* 966 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 967 * Transfer execution from Flash to RAM by calculating the address 968 * of the in-RAM copy of board_init_r() and calling it 969 */ 970 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 971 972 /* NOTREACHED - board_init_r() does not return */ 973 hang(); 974 } 975 #endif /* CONFIG_X86 */ 976