1 /* 2 * Copyright (c) 2011 The Chromium OS Authors. 3 * (C) Copyright 2002-2006 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 * 6 * (C) Copyright 2002 7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 8 * Marius Groeger <mgroeger@sysgo.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #include <common.h> 14 #include <console.h> 15 #include <environment.h> 16 #include <dm.h> 17 #include <fdtdec.h> 18 #include <fs.h> 19 #include <i2c.h> 20 #include <initcall.h> 21 #include <init_helpers.h> 22 #include <malloc.h> 23 #include <mapmem.h> 24 #include <os.h> 25 #include <post.h> 26 #include <relocate.h> 27 #include <spi.h> 28 #include <status_led.h> 29 #include <timer.h> 30 #include <trace.h> 31 #include <video.h> 32 #include <watchdog.h> 33 #ifdef CONFIG_MACH_TYPE 34 #include <asm/mach-types.h> 35 #endif 36 #if defined(CONFIG_MP) && defined(CONFIG_PPC) 37 #include <asm/mp.h> 38 #endif 39 #include <asm/io.h> 40 #include <asm/sections.h> 41 #include <dm/root.h> 42 #include <linux/errno.h> 43 #include <bidram.h> 44 #include <sysmem.h> 45 46 /* 47 * Pointer to initial global data area 48 * 49 * Here we initialize it if needed. 50 */ 51 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR 52 #undef XTRN_DECLARE_GLOBAL_DATA_PTR 53 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ 54 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); 55 #else 56 DECLARE_GLOBAL_DATA_PTR; 57 #endif 58 59 /* 60 * TODO(sjg@chromium.org): IMO this code should be 61 * refactored to a single function, something like: 62 * 63 * void led_set_state(enum led_colour_t colour, int on); 64 */ 65 /************************************************************************ 66 * Coloured LED functionality 67 ************************************************************************ 68 * May be supplied by boards if desired 69 */ 70 __weak void coloured_LED_init(void) {} 71 __weak void red_led_on(void) {} 72 __weak void red_led_off(void) {} 73 __weak void green_led_on(void) {} 74 __weak void green_led_off(void) {} 75 __weak void yellow_led_on(void) {} 76 __weak void yellow_led_off(void) {} 77 __weak void blue_led_on(void) {} 78 __weak void blue_led_off(void) {} 79 80 /* 81 * Why is gd allocated a register? Prior to reloc it might be better to 82 * just pass it around to each function in this file? 83 * 84 * After reloc one could argue that it is hardly used and doesn't need 85 * to be in a register. Or if it is it should perhaps hold pointers to all 86 * global data for all modules, so that post-reloc we can avoid the massive 87 * literal pool we get on ARM. Or perhaps just encourage each module to use 88 * a structure... 89 */ 90 91 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) 92 static int init_func_watchdog_init(void) 93 { 94 # if defined(CONFIG_HW_WATCHDOG) && \ 95 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ 96 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ 97 defined(CONFIG_DESIGNWARE_WATCHDOG) || \ 98 defined(CONFIG_IMX_WATCHDOG)) 99 hw_watchdog_init(); 100 puts(" Watchdog enabled\n"); 101 # endif 102 WATCHDOG_RESET(); 103 104 return 0; 105 } 106 107 int init_func_watchdog_reset(void) 108 { 109 WATCHDOG_RESET(); 110 111 return 0; 112 } 113 #endif /* CONFIG_WATCHDOG */ 114 115 __weak void board_add_ram_info(int use_default) 116 { 117 /* please define platform specific board_add_ram_info() */ 118 } 119 120 static int init_baud_rate(void) 121 { 122 if (gd && gd->serial.using_pre_serial) 123 gd->baudrate = env_get_ulong("baudrate", 10, gd->serial.baudrate); 124 else 125 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE); 126 127 return 0; 128 } 129 130 static int display_text_info(void) 131 { 132 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) 133 ulong bss_start, bss_end, text_base; 134 135 bss_start = (ulong)&__bss_start; 136 bss_end = (ulong)&__bss_end; 137 138 #ifdef CONFIG_SYS_TEXT_BASE 139 text_base = CONFIG_SYS_TEXT_BASE; 140 #else 141 text_base = CONFIG_SYS_MONITOR_BASE; 142 #endif 143 144 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", 145 text_base, bss_start, bss_end); 146 #endif 147 148 return 0; 149 } 150 151 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) 152 static int announce_pre_serial(void) 153 { 154 if (gd && gd->serial.using_pre_serial) 155 printf("PreSerial: %d\n", gd->serial.id); 156 157 return 0; 158 } 159 #endif 160 161 static int announce_dram_init(void) 162 { 163 puts("DRAM: "); 164 return 0; 165 } 166 167 static int show_dram_config(void) 168 { 169 unsigned long long size; 170 171 #ifdef CONFIG_NR_DRAM_BANKS 172 int i; 173 174 debug("\nRAM Configuration:\n"); 175 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { 176 size += gd->bd->bi_dram[i].size; 177 debug("Bank #%d: %llx ", i, 178 (unsigned long long)(gd->bd->bi_dram[i].start)); 179 #ifdef DEBUG 180 print_size(gd->bd->bi_dram[i].size, "\n"); 181 #endif 182 } 183 debug("\nDRAM: "); 184 #else 185 size = gd->ram_size; 186 #endif 187 188 #ifdef CONFIG_BIDRAM 189 size += bidram_append_size(); 190 #endif 191 print_size(size, ""); 192 board_add_ram_info(0); 193 putc('\n'); 194 195 return 0; 196 } 197 198 __weak int dram_init_banksize(void) 199 { 200 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) 201 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; 202 gd->bd->bi_dram[0].size = get_effective_memsize(); 203 #endif 204 205 return 0; 206 } 207 208 #if defined(CONFIG_SYS_I2C) 209 static int init_func_i2c(void) 210 { 211 puts("I2C: "); 212 #ifdef CONFIG_SYS_I2C 213 i2c_init_all(); 214 #else 215 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 216 #endif 217 puts("ready\n"); 218 return 0; 219 } 220 #endif 221 222 #if defined(CONFIG_HARD_SPI) 223 static int init_func_spi(void) 224 { 225 puts("SPI: "); 226 spi_init(); 227 puts("ready\n"); 228 return 0; 229 } 230 #endif 231 232 static int setup_mon_len(void) 233 { 234 #if defined(__ARM__) || defined(__MICROBLAZE__) 235 gd->mon_len = (ulong)&__bss_end - (ulong)_start; 236 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) 237 gd->mon_len = (ulong)&_end - (ulong)_init; 238 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) 239 gd->mon_len = CONFIG_SYS_MONITOR_LEN; 240 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV) 241 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); 242 #elif defined(CONFIG_SYS_MONITOR_BASE) 243 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ 244 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; 245 #endif 246 return 0; 247 } 248 249 __weak int arch_cpu_init(void) 250 { 251 return 0; 252 } 253 254 __weak int mach_cpu_init(void) 255 { 256 return 0; 257 } 258 259 /* Get the top of usable RAM */ 260 __weak ulong board_get_usable_ram_top(ulong total_size) 261 { 262 #ifdef CONFIG_SYS_SDRAM_BASE 263 /* 264 * Detect whether we have so much RAM that it goes past the end of our 265 * 32-bit address space. If so, clip the usable RAM so it doesn't. 266 */ 267 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) 268 /* 269 * Will wrap back to top of 32-bit space when reservations 270 * are made. 271 */ 272 return 0; 273 #endif 274 return gd->ram_top; 275 } 276 277 static int setup_dest_addr(void) 278 { 279 debug("Monitor len: %08lX\n", gd->mon_len); 280 /* 281 * Ram is setup, size stored in gd !! 282 */ 283 debug("Ram size: %08lX\n", (ulong)gd->ram_size); 284 #if defined(CONFIG_SYS_MEM_TOP_HIDE) 285 /* 286 * Subtract specified amount of memory to hide so that it won't 287 * get "touched" at all by U-Boot. By fixing up gd->ram_size 288 * the Linux kernel should now get passed the now "corrected" 289 * memory size and won't touch it either. This should work 290 * for arch/ppc and arch/powerpc. Only Linux board ports in 291 * arch/powerpc with bootwrapper support, that recalculate the 292 * memory size from the SDRAM controller setup will have to 293 * get fixed. 294 */ 295 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; 296 #endif 297 #ifdef CONFIG_SYS_SDRAM_BASE 298 gd->ram_top = CONFIG_SYS_SDRAM_BASE; 299 #endif 300 gd->ram_top += get_effective_memsize(); 301 gd->ram_top = board_get_usable_ram_top(gd->mon_len); 302 gd->relocaddr = gd->ram_top; 303 debug("Ram top: %08lX\n", (ulong)gd->ram_top); 304 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) 305 /* 306 * We need to make sure the location we intend to put secondary core 307 * boot code is reserved and not used by any part of u-boot 308 */ 309 if (gd->relocaddr > determine_mp_bootpg(NULL)) { 310 gd->relocaddr = determine_mp_bootpg(NULL); 311 debug("Reserving MP boot page to %08lx\n", gd->relocaddr); 312 } 313 #endif 314 return 0; 315 } 316 317 #ifdef CONFIG_PRAM 318 /* reserve protected RAM */ 319 static int reserve_pram(void) 320 { 321 ulong reg; 322 323 reg = env_get_ulong("pram", 10, CONFIG_PRAM); 324 gd->relocaddr -= (reg << 10); /* size is in kB */ 325 debug("Reserving %ldk for protected RAM at %08lx\n", reg, 326 gd->relocaddr); 327 return 0; 328 } 329 #endif /* CONFIG_PRAM */ 330 331 /* Round memory pointer down to next 4 kB limit */ 332 static int reserve_round_4k(void) 333 { 334 gd->relocaddr &= ~(4096 - 1); 335 return 0; 336 } 337 338 #ifdef CONFIG_ARM 339 __weak int reserve_mmu(void) 340 { 341 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) 342 /* reserve TLB table */ 343 gd->arch.tlb_size = PGTABLE_SIZE; 344 gd->relocaddr -= gd->arch.tlb_size; 345 346 /* round down to next 64 kB limit */ 347 gd->relocaddr &= ~(0x10000 - 1); 348 349 gd->arch.tlb_addr = gd->relocaddr; 350 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, 351 gd->arch.tlb_addr + gd->arch.tlb_size); 352 353 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 354 /* 355 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten 356 * with location within secure ram. 357 */ 358 gd->arch.tlb_allocated = gd->arch.tlb_addr; 359 #endif 360 #endif 361 362 return 0; 363 } 364 #endif 365 366 static int reserve_video(void) 367 { 368 #ifdef CONFIG_DM_VIDEO 369 ulong addr; 370 int ret; 371 372 addr = gd->relocaddr; 373 ret = video_reserve(&addr); 374 if (ret) 375 return ret; 376 gd->relocaddr = addr; 377 #elif defined(CONFIG_LCD) 378 # ifdef CONFIG_FB_ADDR 379 gd->fb_base = CONFIG_FB_ADDR; 380 # else 381 /* reserve memory for LCD display (always full pages) */ 382 gd->relocaddr = lcd_setmem(gd->relocaddr); 383 gd->fb_base = gd->relocaddr; 384 # endif /* CONFIG_FB_ADDR */ 385 #elif defined(CONFIG_VIDEO) && \ 386 (!defined(CONFIG_PPC)) && \ 387 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ 388 !defined(CONFIG_M68K) 389 /* reserve memory for video display (always full pages) */ 390 gd->relocaddr = video_setmem(gd->relocaddr); 391 gd->fb_base = gd->relocaddr; 392 #endif 393 394 return 0; 395 } 396 397 static int reserve_trace(void) 398 { 399 #ifdef CONFIG_TRACE 400 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; 401 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); 402 debug("Reserving %dk for trace data at: %08lx\n", 403 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); 404 #endif 405 406 return 0; 407 } 408 409 static int reserve_uboot(void) 410 { 411 /* 412 * reserve memory for U-Boot code, data & bss 413 * round down to next 4 kB limit 414 */ 415 gd->relocaddr -= gd->mon_len; 416 gd->relocaddr &= ~(4096 - 1); 417 #if defined(CONFIG_E500) || defined(CONFIG_MIPS) 418 /* round down to next 64 kB limit so that IVPR stays aligned */ 419 gd->relocaddr &= ~(65536 - 1); 420 #endif 421 422 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, 423 gd->relocaddr); 424 425 gd->start_addr_sp = gd->relocaddr; 426 427 return 0; 428 } 429 430 /* reserve memory for malloc() area */ 431 static int reserve_malloc(void) 432 { 433 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; 434 debug("Reserving %dk for malloc() at: %08lx\n", 435 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); 436 return 0; 437 } 438 439 /* (permanently) allocate a Board Info struct */ 440 static int reserve_board(void) 441 { 442 if (!gd->bd) { 443 gd->start_addr_sp -= sizeof(bd_t); 444 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); 445 memset(gd->bd, '\0', sizeof(bd_t)); 446 debug("Reserving %zu Bytes for Board Info at: %08lx\n", 447 sizeof(bd_t), gd->start_addr_sp); 448 } 449 return 0; 450 } 451 452 static int setup_machine(void) 453 { 454 #ifdef CONFIG_MACH_TYPE 455 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ 456 #endif 457 return 0; 458 } 459 460 static int reserve_global_data(void) 461 { 462 gd->start_addr_sp -= sizeof(gd_t); 463 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); 464 debug("Reserving %zu Bytes for Global Data at: %08lx\n", 465 sizeof(gd_t), gd->start_addr_sp); 466 return 0; 467 } 468 469 static int reserve_fdt(void) 470 { 471 #ifndef CONFIG_OF_EMBED 472 /* 473 * If the device tree is sitting immediately above our image then we 474 * must relocate it. If it is embedded in the data section, then it 475 * will be relocated with other data. 476 */ 477 if (gd->fdt_blob) { 478 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 479 480 gd->start_addr_sp -= gd->fdt_size; 481 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); 482 debug("Reserving %lu Bytes for FDT at: %08lx\n", 483 gd->fdt_size, gd->start_addr_sp); 484 } 485 #endif 486 487 return 0; 488 } 489 490 static int reserve_bootstage(void) 491 { 492 #ifdef CONFIG_BOOTSTAGE 493 int size = bootstage_get_size(); 494 495 gd->start_addr_sp -= size; 496 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size); 497 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size, 498 gd->start_addr_sp); 499 #endif 500 501 return 0; 502 } 503 504 int arch_reserve_stacks(void) 505 { 506 return 0; 507 } 508 509 static int reserve_stacks(void) 510 { 511 /* make stack pointer 16-byte aligned */ 512 gd->start_addr_sp -= 16; 513 gd->start_addr_sp &= ~0xf; 514 515 /* 516 * let the architecture-specific code tailor gd->start_addr_sp and 517 * gd->irq_sp 518 */ 519 return arch_reserve_stacks(); 520 } 521 522 static int display_new_sp(void) 523 { 524 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); 525 526 return 0; 527 } 528 529 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 530 defined(CONFIG_SH) 531 static int setup_board_part1(void) 532 { 533 bd_t *bd = gd->bd; 534 535 /* 536 * Save local variables to board info struct 537 */ 538 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ 539 bd->bi_memsize = gd->ram_size; /* size in bytes */ 540 541 #ifdef CONFIG_SYS_SRAM_BASE 542 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ 543 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ 544 #endif 545 546 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx) 547 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ 548 #endif 549 #if defined(CONFIG_M68K) 550 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ 551 #endif 552 #if defined(CONFIG_MPC83xx) 553 bd->bi_immrbar = CONFIG_SYS_IMMR; 554 #endif 555 556 return 0; 557 } 558 #endif 559 560 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 561 static int setup_board_part2(void) 562 { 563 bd_t *bd = gd->bd; 564 565 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ 566 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ 567 #if defined(CONFIG_CPM2) 568 bd->bi_cpmfreq = gd->arch.cpm_clk; 569 bd->bi_brgfreq = gd->arch.brg_clk; 570 bd->bi_sccfreq = gd->arch.scc_clk; 571 bd->bi_vco = gd->arch.vco_out; 572 #endif /* CONFIG_CPM2 */ 573 #if defined(CONFIG_M68K) && defined(CONFIG_PCI) 574 bd->bi_pcifreq = gd->pci_clk; 575 #endif 576 #if defined(CONFIG_EXTRA_CLOCK) 577 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ 578 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ 579 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ 580 #endif 581 582 return 0; 583 } 584 #endif 585 586 #ifdef CONFIG_POST 587 static int init_post(void) 588 { 589 post_bootmode_init(); 590 post_run(NULL, POST_ROM | post_bootmode_get(0)); 591 592 return 0; 593 } 594 #endif 595 596 static int reloc_fdt(void) 597 { 598 #ifndef CONFIG_OF_EMBED 599 if (gd->flags & GD_FLG_SKIP_RELOC) 600 return 0; 601 if (gd->new_fdt) { 602 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 603 gd->fdt_blob = gd->new_fdt; 604 #ifdef CONFIG_USING_KERNEL_DTB 605 gd->ufdt_blob = gd->new_fdt; 606 #endif 607 } 608 #endif 609 610 return 0; 611 } 612 613 static int reloc_bootstage(void) 614 { 615 #ifdef CONFIG_BOOTSTAGE 616 if (gd->flags & GD_FLG_SKIP_RELOC) 617 return 0; 618 if (gd->new_bootstage) { 619 int size = bootstage_get_size(); 620 621 debug("Copying bootstage from %p to %p, size %x\n", 622 gd->bootstage, gd->new_bootstage, size); 623 memcpy(gd->new_bootstage, gd->bootstage, size); 624 gd->bootstage = gd->new_bootstage; 625 } 626 #endif 627 628 return 0; 629 } 630 631 static int setup_reloc(void) 632 { 633 if (gd->flags & GD_FLG_SKIP_RELOC) { 634 debug("Skipping relocation due to flag\n"); 635 return 0; 636 } 637 638 #ifndef CONFIG_SKIP_RELOCATE_UBOOT 639 #ifdef CONFIG_SYS_TEXT_BASE 640 #ifdef ARM 641 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start; 642 #elif defined(CONFIG_M68K) 643 /* 644 * On all ColdFire arch cpu, monitor code starts always 645 * just after the default vector table location, so at 0x400 646 */ 647 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); 648 #else 649 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; 650 #endif 651 #endif 652 653 #else 654 gd->reloc_off = 0; 655 #endif 656 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); 657 658 printf("Relocation Offset: %08lx, fdt: %08lx\n", 659 gd->reloc_off, (ulong)gd->new_fdt); 660 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", 661 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), 662 gd->start_addr_sp); 663 664 return 0; 665 } 666 667 #ifdef CONFIG_OF_BOARD_FIXUP 668 static int fix_fdt(void) 669 { 670 return board_fix_fdt((void *)gd->fdt_blob); 671 } 672 #endif 673 674 /* ARM calls relocate_code from its crt0.S */ 675 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 676 !CONFIG_IS_ENABLED(X86_64) 677 678 static int jump_to_copy(void) 679 { 680 if (gd->flags & GD_FLG_SKIP_RELOC) 681 return 0; 682 /* 683 * x86 is special, but in a nice way. It uses a trampoline which 684 * enables the dcache if possible. 685 * 686 * For now, other archs use relocate_code(), which is implemented 687 * similarly for all archs. When we do generic relocation, hopefully 688 * we can make all archs enable the dcache prior to relocation. 689 */ 690 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 691 /* 692 * SDRAM and console are now initialised. The final stack can now 693 * be setup in SDRAM. Code execution will continue in Flash, but 694 * with the stack in SDRAM and Global Data in temporary memory 695 * (CPU cache) 696 */ 697 arch_setup_gd(gd->new_gd); 698 board_init_f_r_trampoline(gd->start_addr_sp); 699 #else 700 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); 701 #endif 702 703 return 0; 704 } 705 #endif 706 707 /* Record the board_init_f() bootstage (after arch_cpu_init()) */ 708 static int initf_bootstage(void) 709 { 710 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) && 711 IS_ENABLED(CONFIG_BOOTSTAGE_STASH); 712 int ret; 713 714 ret = bootstage_init(!from_spl); 715 if (ret) 716 return ret; 717 if (from_spl) { 718 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR, 719 CONFIG_BOOTSTAGE_STASH_SIZE); 720 721 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE); 722 if (ret && ret != -ENOENT) { 723 debug("Failed to unstash bootstage: err=%d\n", ret); 724 return ret; 725 } 726 } 727 728 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); 729 730 return 0; 731 } 732 733 static int initf_console_record(void) 734 { 735 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN) 736 return console_record_init(); 737 #else 738 return 0; 739 #endif 740 } 741 742 static int initf_dm(void) 743 { 744 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN) 745 int ret; 746 747 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f"); 748 ret = dm_init_and_scan(true); 749 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F); 750 if (ret) 751 return ret; 752 #endif 753 #ifdef CONFIG_TIMER_EARLY 754 ret = dm_timer_init(); 755 if (ret) 756 return ret; 757 #endif 758 759 return 0; 760 } 761 762 /* Architecture-specific memory reservation */ 763 __weak int reserve_arch(void) 764 { 765 return 0; 766 } 767 768 __weak int arch_cpu_init_dm(void) 769 { 770 return 0; 771 } 772 773 static const init_fnc_t init_sequence_f[] = { 774 setup_mon_len, 775 #ifdef CONFIG_OF_CONTROL 776 fdtdec_setup, 777 #endif 778 #ifdef CONFIG_TRACE 779 trace_early_init, 780 #endif 781 initf_malloc, 782 log_init, 783 initf_bootstage, /* uses its own timer, so does not need DM */ 784 initf_console_record, 785 #if defined(CONFIG_HAVE_FSP) 786 arch_fsp_init, 787 #endif 788 arch_cpu_init, /* basic arch cpu dependent setup */ 789 mach_cpu_init, /* SoC/machine dependent CPU setup */ 790 initf_dm, 791 arch_cpu_init_dm, 792 #if defined(CONFIG_BOARD_EARLY_INIT_F) 793 board_early_init_f, 794 #endif 795 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) 796 /* get CPU and bus clocks according to the environment variable */ 797 get_clocks, /* get CPU and bus clocks (etc.) */ 798 #endif 799 #if !defined(CONFIG_M68K) 800 timer_init, /* initialize timer */ 801 #endif 802 #if defined(CONFIG_BOARD_POSTCLK_INIT) 803 board_postclk_init, 804 #endif 805 env_init, /* initialize environment */ 806 init_baud_rate, /* initialze baudrate settings */ 807 serial_init, /* serial communications setup */ 808 console_init_f, /* stage 1 init of console */ 809 display_options, /* say that we are here */ 810 display_text_info, /* show debugging info if required */ 811 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ 812 defined(CONFIG_X86) 813 checkcpu, 814 #endif 815 #if defined(CONFIG_DISPLAY_CPUINFO) 816 print_cpuinfo, /* display cpu info (and speed) */ 817 #endif 818 #if defined(CONFIG_DTB_RESELECT) 819 embedded_dtb_select, 820 #endif 821 #if defined(CONFIG_DISPLAY_BOARDINFO) 822 show_board_info, 823 #endif 824 INIT_FUNC_WATCHDOG_INIT 825 #if defined(CONFIG_MISC_INIT_F) 826 misc_init_f, 827 #endif 828 INIT_FUNC_WATCHDOG_RESET 829 #if defined(CONFIG_SYS_I2C) 830 init_func_i2c, 831 #endif 832 #if defined(CONFIG_HARD_SPI) 833 init_func_spi, 834 #endif 835 #if defined(CONFIG_ROCKCHIP_PRELOADER_SERIAL) 836 announce_pre_serial, 837 #endif 838 announce_dram_init, 839 dram_init, /* configure available RAM banks */ 840 #ifdef CONFIG_POST 841 post_init_f, 842 #endif 843 INIT_FUNC_WATCHDOG_RESET 844 #if defined(CONFIG_SYS_DRAM_TEST) 845 testdram, 846 #endif /* CONFIG_SYS_DRAM_TEST */ 847 INIT_FUNC_WATCHDOG_RESET 848 849 #ifdef CONFIG_POST 850 init_post, 851 #endif 852 INIT_FUNC_WATCHDOG_RESET 853 /* 854 * Now that we have DRAM mapped and working, we can 855 * relocate the code and continue running from DRAM. 856 * 857 * Reserve memory at end of RAM for (top down in that order): 858 * - area that won't get touched by U-Boot and Linux (optional) 859 * - kernel log buffer 860 * - protected RAM 861 * - LCD framebuffer 862 * - monitor code 863 * - board info struct 864 */ 865 setup_dest_addr, 866 #ifdef CONFIG_PRAM 867 reserve_pram, 868 #endif 869 reserve_round_4k, 870 #ifdef CONFIG_ARM 871 reserve_mmu, 872 #endif 873 reserve_video, 874 reserve_trace, 875 reserve_uboot, 876 reserve_malloc, 877 reserve_board, 878 setup_machine, 879 reserve_global_data, 880 reserve_fdt, 881 reserve_bootstage, 882 reserve_arch, 883 reserve_stacks, 884 dram_init_banksize, 885 show_dram_config, 886 #ifdef CONFIG_SYSMEM 887 sysmem_init, /* Validate above reserve memory */ 888 #endif 889 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ 890 defined(CONFIG_SH) 891 setup_board_part1, 892 #endif 893 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) 894 INIT_FUNC_WATCHDOG_RESET 895 setup_board_part2, 896 #endif 897 display_new_sp, 898 #ifdef CONFIG_OF_BOARD_FIXUP 899 fix_fdt, 900 #endif 901 INIT_FUNC_WATCHDOG_RESET 902 reloc_fdt, 903 reloc_bootstage, 904 setup_reloc, 905 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 906 copy_uboot_to_ram, 907 do_elf_reloc_fixups, 908 clear_bss, 909 #endif 910 #if defined(CONFIG_XTENSA) 911 clear_bss, 912 #endif 913 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 914 !CONFIG_IS_ENABLED(X86_64) 915 jump_to_copy, 916 #endif 917 NULL, 918 }; 919 920 void board_init_f(ulong boot_flags) 921 { 922 gd->flags = boot_flags; 923 gd->have_console = 0; 924 925 #if defined(CONFIG_DISABLE_CONSOLE) 926 gd->flags |= GD_FLG_DISABLE_CONSOLE; 927 #endif 928 929 if (initcall_run_list(init_sequence_f)) 930 hang(); 931 932 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ 933 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) 934 /* NOTREACHED - jump_to_copy() does not return */ 935 hang(); 936 #endif 937 } 938 939 #if defined(CONFIG_X86) || defined(CONFIG_ARC) 940 /* 941 * For now this code is only used on x86. 942 * 943 * init_sequence_f_r is the list of init functions which are run when 944 * U-Boot is executing from Flash with a semi-limited 'C' environment. 945 * The following limitations must be considered when implementing an 946 * '_f_r' function: 947 * - 'static' variables are read-only 948 * - Global Data (gd->xxx) is read/write 949 * 950 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if 951 * supported). It _should_, if possible, copy global data to RAM and 952 * initialise the CPU caches (to speed up the relocation process) 953 * 954 * NOTE: At present only x86 uses this route, but it is intended that 955 * all archs will move to this when generic relocation is implemented. 956 */ 957 static const init_fnc_t init_sequence_f_r[] = { 958 #if !CONFIG_IS_ENABLED(X86_64) 959 init_cache_f_r, 960 #endif 961 962 NULL, 963 }; 964 965 void board_init_f_r(void) 966 { 967 if (initcall_run_list(init_sequence_f_r)) 968 hang(); 969 970 /* 971 * The pre-relocation drivers may be using memory that has now gone 972 * away. Mark serial as unavailable - this will fall back to the debug 973 * UART if available. 974 * 975 * Do the same with log drivers since the memory may not be available. 976 */ 977 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY); 978 #ifdef CONFIG_TIMER 979 gd->timer = NULL; 980 #endif 981 982 /* 983 * U-Boot has been copied into SDRAM, the BSS has been cleared etc. 984 * Transfer execution from Flash to RAM by calculating the address 985 * of the in-RAM copy of board_init_r() and calling it 986 */ 987 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); 988 989 /* NOTREACHED - board_init_r() does not return */ 990 hang(); 991 } 992 #endif /* CONFIG_X86 */ 993